Wow, only one day and all this already! Thank you!
This reads like above my current capabilities, seems I need to study more.
Anyways, in the meantime I managed to hack-dump the DTS from the original UnifiOS. I am not entirely sure how useful this actually is, but here it is:
/dts-v1/;
/ {
#address-cells = < 0x01 >;
#size-cells = < 0x01 >;
compatible = "mediatek,mt7621-soc";
model = "Ubiquiti Networks, Inc. U6-Lite";
hnat@1e100000 {
reset-names = "mtketh";
resets = < 0x0c 0x00 >;
compatible = "mediatek,mtk-hnat_v1";
mtketh-ppd = "eth0";
ext-devices = "rax0\0ra0\0rax1\0ra1\0rax2\0ra2\0rax3\0ra3\0apclix0\0apcli0";
mtketh-max-gmac = < 0x02 >;
status = "okay";
mtketh-wan = "eth1";
reg = < 0x1e100000 0x3000 >;
};
apll {
#clock-cells = < 0x00 >;
linux,phandle = < 0x03 >;
compatible = "fixed-clock";
phandle = < 0x03 >;
clock-frequency = < 0x1017df80 >;
};
rstctrl {
linux,phandle = < 0x04 >;
compatible = "ralink,rt2880-reset";
phandle = < 0x04 >;
#reset-cells = < 0x01 >;
};
cpus {
#address-cells = < 0x01 >;
#size-cells = < 0x00 >;
cpu@1 {
compatible = "mips,mips1004Kc";
device_type = "cpu";
reg = < 0x01 >;
};
cpu@0 {
compatible = "mips,mips1004Kc";
device_type = "cpu";
reg = < 0x00 >;
};
};
cpuclock {
#clock-cells = < 0x00 >;
linux,phandle = < 0x15 >;
compatible = "mtk,mt7621-cpu-clock";
phandle = < 0x15 >;
};
ethernet@1e100000 {
mediatek,ethsys = < 0x0c >;
#address-cells = < 0x01 >;
interrupt-parent = < 0x05 >;
mtd-mac-address = < 0x0d 0x00 >;
#size-cells = < 0x00 >;
mac-address = [ d0 21 f9 b3 53 b0 ];
compatible = "mediatek,mt7621-eth\0syscon";
status = "okay";
interrupts = < 0x00 0x03 0x04 >;
reg = < 0x1e100000 0xe000 >;
mac@1 {
phy-mode = "rgmii";
compatible = "mediatek,eth-mac";
reg = < 0x01 >;
fixed-link {
pause;
full-duplex;
speed = < 0x3e8 >;
};
};
mdio-bus {
#address-cells = < 0x01 >;
linux,phandle = < 0x0e >;
#size-cells = < 0x00 >;
phandle = < 0x0e >;
ethernet-phy@1f {
phy-mode = "rgmii";
reg = < 0x1f >;
};
};
mac@0 {
phy-mode = "trgmii";
compatible = "mediatek,eth-mac";
reg = < 0x00 >;
fixed-link {
pause;
full-duplex;
speed = < 0x3e8 >;
};
};
};
gpio-leds {
compatible = "gpio-leds";
wifi {
gpios = < 0x01 0x03 0x00 >;
label = "ubnt:blue:personality";
linux,default-trigger = "external1";
};
power {
gpios = < 0x01 0x04 0x00 >;
label = "ubnt:white:personality";
linux,default-trigger = "external0";
};
};
sysbusclock {
#clock-cells = < 0x00 >;
linux,phandle = < 0x07 >;
compatible = "mtk,mt7621-sys-bus-clock";
phandle = < 0x07 >;
};
ethsys@1e000000 {
linux,phandle = < 0x0c >;
compatible = "mediatek,mt7621-ethsys\0syscon";
phandle = < 0x0c >;
reg = < 0x1e000000 0x8000 >;
};
raeth@1e100000 {
mediatek,ethsys = < 0x0c >;
interrupt-parent = < 0x05 >;
compatible = "mediatek,mt7621-eth";
status = "disabled";
interrupts = < 0x00 0x03 0x04 >;
reg = < 0x1e100000 0xe000 >;
};
pinctrl {
pinctrl-0 = < 0x16 >;
compatible = "mtk,mtkmips-pinmux";
pinctrl-names = "default";
pinctrl0 {
linux,phandle = < 0x16 >;
phandle = < 0x16 >;
gpio {
mtk,group = "i2c\0uart2\0rgmii2\0jtag";
mtk,function = "gpio";
};
uart3 {
mtk,group = "uart3";
mtk,function = "uart3";
};
};
rgmii1 {
rgmii1 {
mtk,group = "rgmii1";
mtk,function = "rgmii1";
};
};
mdio {
mdio {
mtk,group = "mdio";
mtk,function = "mdio";
};
};
uart3 {
uart3 {
mtk,group = "uart3";
mtk,function = "uart3";
};
};
nand {
linux,phandle = < 0x0b >;
phandle = < 0x0b >;
sdhci-nand {
mtk,group = "sdhci";
mtk,function = "nand2";
};
spi-nand {
mtk,group = "spi";
mtk,function = "nand1";
};
};
spi {
linux,phandle = < 0x08 >;
phandle = < 0x08 >;
spi {
mtk,group = "spi";
mtk,function = "spi";
};
};
i2c {
linux,phandle = < 0x02 >;
phandle = < 0x02 >;
i2c {
mtk,group = "i2c";
mtk,function = "gpio";
};
};
sdhci {
sdhci {
mtk,group = "sdhci";
mtk,function = "sdhci";
};
};
uart2 {
uart2 {
mtk,group = "uart2";
mtk,function = "uart2";
};
};
pcie {
linux,phandle = < 0x0f >;
phandle = < 0x0f >;
pcie {
mtk,group = "pcie";
mtk,function = "gpio";
};
};
rgmii2 {
rgmii2 {
mtk,group = "rgmii2";
mtk,function = "rgmii2";
};
};
uart1 {
uart1 {
mtk,group = "uart1";
mtk,function = "uart1";
};
};
};
gpio-keys-polled {
#address-cells = < 0x01 >;
#size-cells = < 0x00 >;
compatible = "gpio-keys-polled";
poll-interval = < 0x14 >;
reset {
gpios = < 0x01 0x0c 0x01 >;
linux,code = < 0x198 >;
label = "reset";
};
};
sdhci@1e130000 {
interrupt-parent = < 0x05 >;
compatible = "mediatek,mt7621-sdhci";
status = "disabled";
interrupts = < 0x00 0x14 0x04 >;
reg = < 0x1e130000 0x4000 >;
};
interrupt-controller@1fbc0000 {
interrupt-controller;
linux,phandle = < 0x05 >;
compatible = "mti,gic";
#interrupt-cells = < 0x03 >;
phandle = < 0x05 >;
mti,reserved-cpu-vectors = < 0x07 >;
reg = < 0x1fbc0000 0x2000 >;
timer {
compatible = "mti,gic-timer";
interrupts = < 0x01 0x01 0x00 >;
clocks = < 0x15 >;
};
};
cpuintc {
interrupt-controller;
#address-cells = < 0x00 >;
compatible = "mti,cpu-interrupt-controller";
#interrupt-cells = < 0x01 >;
};
clkctrl {
#clock-cells = < 0x01 >;
linux,phandle = < 0x10 >;
compatible = "ralink,rt2880-clock";
phandle = < 0x10 >;
};
sysclock125M {
#clock-cells = < 0x00 >;
linux,phandle = < 0x11 >;
compatible = "fixed-clock";
phandle = < 0x11 >;
clock-frequency = < 0x7735940 >;
};
palmbus@1e000000 {
#address-cells = < 0x01 >;
#size-cells = < 0x01 >;
compatible = "palmbus";
ranges = < 0x00 0x1e000000 0xfffff >;
reg = < 0x1e000000 0x100000 >;
uartfull@e00 {
reg-io-width = < 0x04 >;
interrupt-parent = < 0x05 >;
compatible = "mediatek,mt6577-uart\0ns16550a";
reg-shift = < 0x02 >;
status = "okay";
clock-frequency = < 0x2faf080 >;
interrupts = < 0x00 0x1c 0x04 >;
no-loopback-test;
clocks = < 0x09 >;
reg = < 0xe00 0x100 >;
};
gdma@2800 {
reset-names = "dma";
#dma-channels = < 0x10 >;
linux,phandle = < 0x06 >;
interrupt-parent = < 0x05 >;
resets = < 0x04 0x0e >;
compatible = "mtk,rt3883-gdma";
phandle = < 0x06 >;
#dma-cells = < 0x01 >;
status = "disabled";
interrupts = < 0x00 0x0d 0x04 >;
#dma-requests = < 0x10 >;
reg = < 0x2800 0x800 >;
};
ecc@3800 {
linux,phandle = < 0x0a >;
compatible = "mediatek,mt7621-ecc";
phandle = < 0x0a >;
status = "disabled";
reg = < 0x3800 0x800 >;
};
hsdma@7000 {
reset-names = "hsdma";
#dma-channels = < 0x01 >;
interrupt-parent = < 0x05 >;
resets = < 0x04 0x05 >;
compatible = "mediatek,mt7621-hsdma";
#dma-cells = < 0x01 >;
status = "disabled";
interrupts = < 0x00 0x0b 0x04 >;
#dma-requests = < 0x01 >;
reg = < 0x7000 0x1000 >;
};
nand@3000 {
#address-cells = < 0x01 >;
pinctrl-0 = < 0x0b >;
#size-cells = < 0x01 >;
compatible = "mediatek,mt7621-nfc";
status = "disabled";
pinctrl-names = "default";
ecc-engine = < 0x0a >;
reg = < 0x3000 0x800 >;
};
spi@b00 {
reset-names = "spi";
#address-cells = < 0x01 >;
pinctrl-0 = < 0x08 >;
#size-cells = < 0x00 >;
resets = < 0x04 0x12 >;
compatible = "mediatek,mt7621-spi";
status = "okay";
pinctrl-names = "default";
clocks = < 0x07 >;
reg = < 0xb00 0x100 >;
mx25l12805d@0 {
#address-cells = < 0x01 >;
#size-cells = < 0x01 >;
compatible = "jedec,spi-nor";
m25p,chunked-io = < 0x20 >;
spi-max-frequency = < 0x17d7840 >;
reg = < 0x00 >;
partition@70000 {
read-only;
label = "Factory";
reg = < 0x70000 0x40000 >;
};
partition@90000 {
label = "bs";
reg = < 0xc0000 0x10000 >;
};
partition@60000 {
label = "u-boot-env";
reg = < 0x60000 0x10000 >;
};
partition@0 {
label = "u-boot";
reg = < 0x00 0x60000 >;
};
partition@80000 {
linux,phandle = < 0x0d >;
read-only;
phandle = < 0x0d >;
label = "EEPROM";
reg = < 0xb0000 0x10000 >;
};
partition@1a0000 {
label = "kernel0";
reg = < 0x1d0000 0xf10000 >;
};
partition@10d0000 {
label = "kernel1";
reg = < 0x10e0000 0xf10000 >;
};
partition@a0000 {
label = "cfg";
reg = < 0xd0000 0x100000 >;
};
};
};
i2c@0 {
gpios = < 0x01 0x03 0x01 0x01 0x04 0x01 >;
#address-cells = < 0x01 >;
i2c-gpio,delay-us = < 0x03 >;
pinctrl-0 = < 0x02 >;
#size-cells = < 0x00 >;
compatible = "i2c-gpio";
status = "disabled";
pinctrl-names = "default";
};
memc@5000 {
compatible = "mtk,mt7621-memc";
reg = < 0x5000 0x1000 >;
};
sysc@0 {
compatible = "mtk,mt7621-sysc";
reg = < 0x00 0x100 >;
};
uartfull@d00 {
reg-io-width = < 0x04 >;
interrupt-parent = < 0x05 >;
compatible = "mediatek,mt6577-uart\0ns16550a";
reg-shift = < 0x02 >;
status = "disabled";
clock-frequency = < 0x2faf080 >;
interrupts = < 0x00 0x1b 0x04 >;
no-loopback-test;
clocks = < 0x09 >;
reg = < 0xd00 0x100 >;
};
wdt@100 {
compatible = "mtk,mt7621-wdt";
reg = < 0x100 0x100 >;
};
uartlite@c00 {
reg-io-width = < 0x04 >;
interrupt-parent = < 0x05 >;
compatible = "mediatek,mt6577-uart\0ns16550a";
reg-shift = < 0x02 >;
clock-frequency = < 0x2faf080 >;
interrupts = < 0x00 0x1a 0x04 >;
no-loopback-test;
clocks = < 0x09 >;
reg = < 0xc00 0x100 >;
};
gpio@600 {
#address-cells = < 0x01 >;
#size-cells = < 0x00 >;
compatible = "mtk,mt7621-gpio";
reg = < 0x600 0x100 >;
bank@2 {
#gpio-cells = < 0x02 >;
compatible = "mtk,mt7621-gpio-bank";
gpio-controller;
reg = < 0x02 >;
};
bank@0 {
#gpio-cells = < 0x02 >;
linux,phandle = < 0x01 >;
compatible = "mtk,mt7621-gpio-bank";
gpio-controller;
phandle = < 0x01 >;
reg = < 0x00 >;
};
bank@1 {
#gpio-cells = < 0x02 >;
compatible = "mtk,mt7621-gpio-bank";
gpio-controller;
reg = < 0x01 >;
};
};
i2s@a00 {
reset-names = "i2s";
interrupt-parent = < 0x05 >;
dma-names = "tx\0rx";
resets = < 0x04 0x11 >;
compatible = "mediatek,mt7621-i2s";
txdma-req = < 0x02 >;
status = "disabled";
interrupts = < 0x00 0x10 0x04 >;
dmas = < 0x06 0x04 0x06 0x06 >;
clocks = < 0x03 >;
rxdma-req = < 0x03 >;
reg = < 0xa00 0x100 >;
};
};
memory@0 {
device_type = "memory";
reg = < 0x00 0x8000000 >;
};
sysclock50M {
#clock-cells = < 0x00 >;
linux,phandle = < 0x09 >;
compatible = "fixed-clock";
phandle = < 0x09 >;
clock-frequency = < 0x2faf080 >;
};
usb@1e1c0000 {
interrupt-parent = < 0x05 >;
compatible = "mediatek,mt7621-xhci\0mediatek,mt2701-xhci";
phys = < 0x12 0x03 0x13 0x04 0x14 0x03 >;
clock-names = "sys_ck\0free_ck\0ahb_ck\0dma_ck";
status = "okay";
interrupts = < 0x00 0x16 0x04 >;
clocks = < 0x11 0x11 0x11 0x11 >;
reg-names = "mac\0ippc";
reg = < 0x1e1c0000 0x1000 0x1e1d0700 0x100 >;
};
gsw@1e110000 {
reset-names = "mcm";
#address-cells = < 0x01 >;
mediatek,portmap = "lllll";
#size-cells = < 0x00 >;
resets = < 0x04 0x02 >;
compatible = "mediatek,mt753x";
mediatek,mdio = < 0x0e >;
mediatek,mcm;
reg = < 0x1e110000 0x8000 >;
mdio-bus {
#address-cells = < 0x01 >;
#size-cells = < 0x00 >;
};
port@6 {
phy-mode = "trgmii";
compatible = "mediatek,mt753x-port";
reg = < 0x06 >;
fixed-link {
full-duplex;
speed = < 0x3e8 >;
};
};
};
pcie@1e140000 {
reset-names = "pcie0\0pcie1\0pcie2";
#address-cells = < 0x03 >;
bus-range = < 0x00 0xff >;
interrupt-parent = < 0x05 >;
pinctrl-0 = < 0x0f >;
#size-cells = < 0x02 >;
resets = < 0x04 0x18 0x04 0x19 0x04 0x1a >;
compatible = "mediatek,mt7621-pci";
ranges = < 0x2000000 0x00 0x00 0x60000000 0x00 0x10000000 0x1000000 0x00 0x00 0x1e160000 0x00 0x10000 >;
clock-names = "pcie0\0pcie1\0pcie2";
reset-gpios = < 0x01 0x08 0x01 0x01 0x07 0x01 >;
status = "okay";
pinctrl-names = "default";
interrupts = < 0x00 0x04 0x04 0x00 0x18 0x04 0x00 0x19 0x04 >;
clocks = < 0x10 0x18 0x10 0x19 0x10 0x1a >;
device_type = "pci";
reset-gpio-names = "pcie0\0pcie1\0pcie2";
reg = < 0x1e140000 0x100 0x1e142000 0x100 >;
pcie@2,0 {
#address-cells = < 0x03 >;
#size-cells = < 0x02 >;
ranges;
reg = < 0x1000 0x00 0x00 0x00 0x00 >;
};
pcie@1,0 {
#address-cells = < 0x03 >;
#size-cells = < 0x02 >;
ranges;
reg = < 0x800 0x00 0x00 0x00 0x00 >;
};
pcie@0,0 {
#address-cells = < 0x03 >;
#size-cells = < 0x02 >;
ranges;
reg = < 0x00 0x00 0x00 0x00 0x00 >;
};
};
sysclock225M {
#clock-cells = < 0x00 >;
compatible = "fixed-clock";
clock-frequency = < 0xd693a40 >;
};
chosen {
bootargs = "ubootver=v1.1.40.71 ramoops.mem_address=0xfff8000 ramoops.mem_size=32768 ramoops.ecc=1 mem=262111K ubntbootid=0";
};
aliases {
serial0 = "/palmbus@1e000000/uartlite@c00";
};
usb-phy@1e1d0000 {
#address-cells = < 0x01 >;
#size-cells = < 0x01 >;
compatible = "mediatek,mt7621-u3phy\0mediatek,mt2701-u3phy";
ranges;
status = "disabled";
reg = < 0x1e1d0000 0x300 >;
usb-phy@0x1e1d0900 {
linux,phandle = < 0x13 >;
phandle = < 0x13 >;
#phy-cells = < 0x01 >;
clock-names = "ref";
clocks = < 0x11 >;
reg = < 0x1e1d0900 0x700 >;
};
usb-phy@0x1e1d1000 {
linux,phandle = < 0x14 >;
phandle = < 0x14 >;
#phy-cells = < 0x01 >;
clock-names = "ref";
clocks = < 0x11 >;
reg = < 0x1e1d1000 0x100 >;
};
usb-phy@0x1e1d0800 {
linux,phandle = < 0x12 >;
phandle = < 0x12 >;
#phy-cells = < 0x01 >;
clock-names = "ref";
clocks = < 0x11 >;
reg = < 0x1e1d0800 0x100 >;
};
};
};