Zyxel (spharion) 5501(=VMG8546-D70A) + 6501 . Anyone has tried to launch openwrt on that?

Overall seems good devices for lede-based router ...

this 2 devices share the same base firmware and almost same hardware

  • (5501 have WANoE port ... but 6501 have incoming ISDN line port)
  • 4 LAN ports
  • S0-out phone ports
  • ISDN-out
  • 2 USB
  • 2 wifi Antenne
  • VDSL2

what i have currently researched (on 5501 /alternative model name VMG8546-D70A /):
hardware : Lantiq XWAY / VR9 / MIPS 34Kc (info got from dmesg)
RT5392 (chip onboard) / in dmesg driver say RT3662 /
Flash: 64M /chip FL512SA/
RAM : 128M

onboard exist headers :
4pin - RS232 - pinout labeled
second 4-pin - unknown
14pin - Possible JTAG - not labeled

uBoot
variables that show current layout :
mtdids=nor0=spi0.4
mtdparts=mtdparts=spi0.4:512k(uboot_fix),256k(uboot_cfg),10m(data),27136k(images1),27136k(images2)
partition=nor0,0

stock firmware is linux, but too limited (not possible to use full flash space, specific layout ... non-standart configuration way)

how safely can backup existing firmware before any tries with openwrt/lede builds ?

info from uboot:

ROM VER: 1.1.4
CFG 05

U-Boot SPL 2013.04-sphairon4.21.3 (Jan 04 2017 - 08:39:38)
SPL: probing SPI flash
SPL: reading memory controller config
SPL: DDR Echo DLL delay:  20/20
SPL: DDR Write DQS delay: 65/65
SPL: DDR Read DQS delay:  1f/1f
SPL: applying tuned DDR SDRAM settings
SPL: checking U-Boot image
SPL: loading U-Boot to RAM
SPL: decompressing U-Boot with LZO
SPL: jumping to U-Boot


U-Boot 2013.04-sphairon4.21.3 (Jan 04 2017 - 08:39:38) SPHSL550X

Board: Sphairon Speedlink **4501/5501/6501** IAD
SoC:   Lantiq VRX288 v1.2
CPU:   500 MHz
IO:    250 MHz
BUS:   250 MHz
BOOT:  SPI
DRAM:  128 MiB
NAND:  No NAND device found!!!
0 MiB
SPI:   ready
SF:    S25FL512S_256K, page size 256 KiB, total 64 MiB
SF:    S25FL512S_256K, page size 256 KiB, total 64 MiB
Reloc: offset @ 0x07e7c000
In:    serial
Out:   serial
Err:   serial
Net:   ltq-eth
Setting content of image 1 to 3
Setting state of image 1 to 'inactive,working'
Setting content of image 2 to 3
Setting state of image 2 to 'active,working'
Setting state of image 3 to 'not available'
Setting content of image 3 to 0

****************************************************************
* Sphairon type label v2                                       *
* ------------------------------------------------------------ *
* Product name             Speedlink 5501                      *
* Ident number             SL5501                              *
* Base platform            0420                                *
* Flash layout             psmd                                *
* Data partition size                                          *
* Data partition location  1                                   *
* ------------------------------------------------------------ *
****************************************************************
* Flash partition info                                         *
* ------------------------------------------------------------ *
* Used layout              Platform/Service/Data - mirrored    *
* ------------------------------------------------------------ *
*  nor0: uboot_fix           80000 @ 00000000                  *
*  nor0: uboot_cfg           40000 @ 00080000                  *
*  nor0: data               a00000 @ 000c0000                  *
*  nor0: images1           1a80000 @ 00ac0000                  *
*  nor0: images2           1a80000 @ 02540000                  *
****************************************************************

****************************************************************
* Boot info                                                    *
* ------------------------------------------------------------ *
* images1  @ 00000000      kernel#Linux-2.6.32.61-sphairon5    *
* images1  @ 001ba000      rootfs#5.0.10.0.3_r97694_heinzm     *
* images1  @ 00a80000      servfs#1.0.0_r97694_heinzm          *
* images1  @ 01180000      defcfg#1.0.0_r97694_heinzm          *
* images2  @ 00000000      kernel#Linux-2.6.32.61-sphairon5    *
* images2  @ 001ba000      rootfs#5.0.10.0.3_r0_heinzm         *
* images2  @ 00a40000      servfs#1.0.0_r0_heinzm              *
* images2  @ 01180000      defcfg#1.0.0_r0_heinzm              *
* ------------------------------------------------------------ *
* Boot image 1             inactive,working                    *
* Boot image 2             active,working                      *
* Boot count               0                                   *
* Boot try                 2                                   *
****************************************************************
SPHSL550X # ?
?       - alias for 'help'
base    - print or set address offset
bdinfo  - print Board Info structure
bootm   - boot application image from memory
bootp   - boot image via network using BOOTP/TFTP protocol
chpart  - change active partition
cmp     - memory compare
cp      - memory copy
crc32   - checksum calculation
echo    - echo args to console
editenv - edit environment variable
env     - environment handling commands
exit    - exit script
false   - do nothing, unsuccessfully
go      - start application at address 'addr'
gpio    - input/set/clear/toggle gpio pins
help    - print command description/usage
iminfo  - print header information for application image
loadb   - load binary file over serial line (kermit mode)
loads   - load S-Record file over serial line
loady   - load binary file over serial line (ymodem mode)
loop    - infinite loop on address range
md      - memory display
mdio    - MDIO utility commands
mii     - MII utility commands
mm      - memory modify (auto-incrementing address)
mtd     - MTD sub-system
mtdparts- define flash/nand partitions
mw      - memory write (fill)
nand    - NAND sub-system
nboot   - boot from NAND device
nm      - memory modify (constant address)
ping    - send ICMP ECHO_REQUEST to network host
printenv- print environment variables
reset   - Perform RESET of the CPU
run     - run commands in an environment variable
sas_boot- Sphairon kernel and rootfs loader
sas_controlfile- Sphairon control file execution
sas_erase_data- Erase data partition in flash
sas_erase_etl- Erase ETL in flash
sas_erase_images- Erase images partition in flash
sas_erase_syscfg- Erase sysconfig in flash
sas_erase_uboot_cfg- Erase U-Boot config in flash
sas_etl - Sphairon ETL commands
sas_test_sf- Sphairon test program for SPI flash
sas_upgrade_etl- Update ETL in flash
sas_upgrade_platform- Update kernel and rootfs in flash
sas_upgrade_service- Update servicefs and defconfig in flash
sas_upgrade_uboot- Update U-Boot in flash
saveenv - save environment variables to persistent storage
setenv  - set environment variables
sf      - SPI flash sub-system
showvar - print local hushshell variables
sleep   - delay execution for some time
sspi    - SPI utility command
test    - minimal test like /bin/sh
tftpboot- boot image via network using TFTP protocol
true    - do nothing, successfully
ubi     - ubi commands
version - print monitor, compiler and linker version

SPHSL550X # mtd info
nor0             - NOR flash, 64 MiB
uboot_fix        - NOR flash, 512 KiB
uboot_cfg        - NOR flash, 256 KiB
data             - NOR flash, 10 MiB
images1          - NOR flash, 26.5 MiB
images2          - NOR flash, 26.5 MiB

SPHSL550X # bdinfo
boot_params = 0x87E59F60
memstart    = 0x80000000
memsize     = 0x08000000
flashstart  = 0x00000000
flashsize   = 0x00000000
flashoffset = 0x00000000
ethaddr     = B8:EC:A3:XX:XX:XX
ip_addr     = 192.168.100.1
baudrate    = 115200 bps
SPHSL550X # version

U-Boot 2013.04-sphairon4.21.3 (Jan 04 2017 - 08:39:38) SPHSL550X
mips-sphairon-linux-uclibc-gcc (crosstool-NG 1.18.0 - sphairon-2013.03) 4.7.2
GNU ld (crosstool-NG 1.18.0 - sphairon-2013.03) 2.22

SPHSL550X # mdio list
ltq-mdio:
0 - Lantiq XWAY PEF7071 <--> ltq-eth
1 - Lantiq XWAY PEF7071 <--> ltq-eth
17 - Lantiq XWAY XRX PHY22F v1.4 and later <--> ltq-eth
18 - Lantiq XWAY XRX PHY22F v1.4 and later <--> ltq-eth
19 - Lantiq XWAY XRX PHY11G v1.4 and later <--> ltq-eth

could you kindly explain how have you got the posted "infos from uboot" - via serial i got nothing useful (115200-1N1, sometimes with 1ms TxDelay)

Quite simple - connected - opened terminal on COM port (i use FT4232 driver for usb to serial) 115200 - powered on zyxel - and all is shown.
So - firsty - check your connection:
GND,RX,TX - must be
3,3v - often better leave in the air
RX of one device must be connected to TX of another device ... (and vice versa)

  • 1-N-1 ? sure ? Must be 8(bit)-N(o parity)-1(stop)

JTAG Header on-board is standard

nTRST 1 2 GND
TDI 3 4 GND
TDO 5 6 GND
TMS 7 8 GND
TCK 9 10 GND
nSRST 11 12 (NOT Checked)-key
(NOT Checked)DINT 13 14 VCC

Hello. as a success with the installation of openwrt on this router? we are also trying to flash this router. we using the programmer ch341 made a memory dump. But how to flash on openwrt do not understand. help us with this device.

Currently no any success story ...

What i'm see in your dump - that is not fully readable as "dump"
first 0x800 bytes - is almost equal to u-boot that dumped from /dev/mtd0 (+added first byte).
/ dumps from /dev/mtd devices is not encrypted - therefore suppose that in flash will be also unencrypted /
but further seems somewhat "screwed/scrambled" - too oft sequence
80FFC8AC 80FFCCAC 80FFD0AC 80FFD4AC
80FFD8AC 80FFDCAC 80FFE0AC 80FFE4AC
80FFE8AC 80FFECAC 80FFF0AC 80FFF4AC
and when searching for that in file - dynamic view show that as "broken read of flash" ...
check your dump procedure ... think there was something not as must ...

i'm currently only at research stage ...
as jtag is functional /working with RAM is ok/ - so may try to load code in memory and start it ...

as currently no clear where is connected Flash - so can not currently say how it's must be activated, would be nice so that will be directly accessible from jtag ...

one more bad point - lack of lantiq chip documentation ...

sorry. its was bad dump. this dump tested https://drive.google.com/open?id=14AKIy0pzc5zoJzR-U8yJIrZwB7NzFX-9 and work 100%. if you install openwrt on this router plz do full flash dump and share with us.

So... current progress.
have built U-Boot-RAM for SL5501 ...
dump and tftpput for installed /stock/ firmware and configuration is possible ...
require JTAG and COM port connected, but link is possible only via LAN3 port
flash writing while not tested

cool, you already tried to install openwrt???

openwrt - firstly need to write some device specific code ... think you not ??? or in your mind - all exist already ?
Progress u-boot ... flashing also tested -> seems work ...

strange point with actiwating of Ethernet ports ... can not bring so all of them works simultaneosly ... operational in modes :

  • only 3-rd
  • 1+2+4+WANoE
    ... think second will is more reliable ... as multiple connectors is better as only one ...
1 Like

hello, can you please provide me with a copy of everything you have (uboot, open wrt configuaration / files, etc) to download

Did any of you try it already on the Speedlink 5501? This device is not mentioned in the "supported devices list". Makes me wonder if you got it to work. If so, which Openwrt release did you use?

I have the source gpl from zyxel. it's working! ... now just porting to openwrt ... can someone help?

https://mega.nz/file/fNdBQYiQ#k7CLkMZHClqiwAqPA-Gml0WLnq3h2KaOzG1_Fa6umfA


OEM Bootlog Firmware

booting with: kernel flash, rootfs flash, servicefs flash, boot_logic 1 ptest 0
Using first active,working image 1
Setting state of image 1 to 'active,working'
Setting boot_count to 0
Setting boot_try to 1
Fixup console device to ttyS0
## Booting kernel from Legacy Image at 81000000 ...
   Image Name:   kernel#Linux-2.6.32.61-sphairon5
   Created:      2017-08-22  12:06:16 UTC
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
   Data Size:    1815880 Bytes = 1.7 MiB
   Load Address: 80002000
   Entry Point:  80006230
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
[    0.000000] Linux version 2.6.32.61-sphairon5.8.8 (heinzm@slvshb13) (gcc version 4.7.2 (crosstool-NG 1.18.0 - sphairon-2013.03) ) #2 Tue Aug 22 14:02:43 CEST 2017
[    0.000000] prom: Lantiq xDSL CPE VR9
[    0.000000] CPU revision is: 00019556 (MIPS 34Kc)
[    0.000000] Add mem region from PROM with size 134217728
[    0.000000] Determined physical RAM map:
[    0.000000]  memory: 08000000 @ 00000000 (usable)
[    0.000000] User-defined physical RAM map:
[    0.000000]  memory: 08000000 @ 00000000 (usable)
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] Zone PFN ranges:
[    0.000000]   Normal   0x00000000 -> 0x00008000
[    0.000000] Movable zone start PFN for each node
[    0.000000] early_node_map[1] active PFN ranges
[    0.000000]     0: 0x00000000 -> 0x00008000
[    0.000000] On node 0 totalpages: 32768
[    0.000000] free_area_init_node: node 0, pgdat 803e61c0, node_mem_map 81000000
[    0.000000]   Normal zone: 256 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 32512 pages, LIFO batch:7
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32512
[    0.000000] Kernel command line: mem=128M console=ttyS0,115200 ip=192.168.100.1:192.168.100.100::::eth0:off ethaddr=1C:74:0D:BA:28:10 machtype=SPHSL550X base_platform=0x000001a4 debug mtdparts=spi0.4:512k(uboot_fix),256k(uboot_cfg),10m(data),27136k(images1),8804k@13090880(rootfs)ro,7220k@22282304(servicefs)ro,200k@29884480(defconfig)ro,27136k@38144k(images2) flash_layout=psmd rootfs=flash servicefs=flash defconfig=flash
[    0.000000] Sphairon base platform: 0x000001a4
[    0.000000] Sphairon machine: SPHSL550X
[    0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, VIPT, cache aliases, linesize 32 bytes
[    0.000000] Writing ErrCtl register=00021520
[    0.000000] Readback ErrCtl register=00021520
[    0.000000] Memory: 123660k/131072k available (3038k kernel code, 7240k reserved, 960k data, 1836k init, 0k highmem)
[    0.000000] SLUB: Genslabs=7, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] Hierarchical RCU implementation.
[    0.000000] NR_IRQS:185
[    0.000000] ltq-irq: Lantiq ICU driver, version 3.0.1, (c) 2001-2011 Lantiq Deutschland GmbH
[    0.000000] mips_hpt_frequency = 250000000, counter_resolution = 2
[    0.000000] console [ttyS0] enabled
[    0.013000] Calibrating delay loop... 332.80 BogoMIPS (lpj=166400)
[    0.035000] Mount-cache hash table entries: 512
[    0.036000] devtmpfs: initialized
[    0.041000] NET: Registered protocol family 16
[    0.043000] MIPS: machine is Speedlink 5501
[    0.056000] bio: create slab <bio-0> at 0
[    0.059000] usbcore: registered new interface driver usbfs
[    0.060000] usbcore: registered new interface driver hub
[    0.061000] usbcore: registered new device driver usb
[    0.063000] NET: Registered protocol family 8
[    0.064000] NET: Registered protocol family 20
[    0.065000] Switching to clocksource MIPS
[    0.069000] NET: Registered protocol family 2
[    0.072000] IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.079000] TCP established hash table entries: 4096 (order: 3, 32768 bytes)
[    0.086000] TCP bind hash table entries: 4096 (order: 2, 16384 bytes)
[    0.092000] TCP: Hash tables configured (established 4096 bind 4096)
[    0.098000] TCP reno registered
[    0.102000] NET: Registered protocol family 1
[    0.123000] gptu: totally 6 16-bit timers/counters
[    0.126000] gptu: misc_register on minor 63
[    0.130000] gptu: succeeded to request irq 118
[    0.135000] gptu: succeeded to request irq 119
[    0.139000] gptu: succeeded to request irq 120
[    0.143000] gptu: succeeded to request irq 121
[    0.148000] gptu: succeeded to request irq 122
[    0.152000] gptu: succeeded to request irq 123
[    0.157000] IFX DMA driver, version ifxmips_dma_core.c:v1.1.5
[    0.157000] ,(c)2009 Infineon Technologies AG
[    0.172000] Lantiq CGU driver, version 1.1.38, (c) 2001-2011 Lantiq Deutschland GmbH
[    0.179000] VPE loader: vpe1_load_addr = 0xa7b00000, vpe1_mem = 0x100000
[    0.185000] Wired TLB entries for Linux read_c0_wired() = 0
[    0.193000] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.198000] aufs 2.1-32
[    0.200000] msgmni has been set to 241
[    0.204000] alg: No test for cipher_null (cipher_null-generic)
[    0.210000] alg: No test for ecb(cipher_null) (ecb-cipher_null)
[    0.216000] alg: No test for digest_null (digest_null-generic)
[    0.221000] alg: No test for compress_null (compress_null-generic)
[    0.231000] alg: No test for stdrng (krng)
[    0.234000] alg: No test for ghash (ghash-generic)
[    0.239000] io scheduler noop registered
[    0.242000] io scheduler deadline registered (default)
[    0.250000] ifx_pmu_init: Major 253
[    0.252000] Lantiq PMU driver, version 1.2.6, (c) 2001-2011 Lantiq Deutschland GmbH
[    0.260000] Infineon Technologies RCU driver version 1.1.1
[    0.265000] Lantiq LED Controller driver, version 1.1.3, (c) 2001-2011 Lantiq Deutschland GmbH
[    0.274000] ifx-ledc ifx-ledc: ifx_ledc_probe
[    0.279000] Lantiq PMON driver, version 1.2.3, (c) 2001-2011 Lantiq Deutschland GmbH
[    0.286000] Lantiq Thermal Sensor driver, version 1.0.3, (c) 2001-2011 Lantiq Deutschland GmbH
[    0.294000] ttyS0 at MMIO 0xbe100c00 (irq = 105) is a IFX_ASC
[    0.301000] Lantiq ASC (UART) driver, version 1.0.14, (c) 2001-2011 Lantiq Deutschland GmbH
[    0.315000] loop: module loaded
[    0.318000] Probe for NAND flash...
[    0.321000] No NAND device found!!!
[    0.325000] m25p80 spi0.4: s25fl512s (65536 Kbytes)
[    0.329000] 8 cmdlinepart partitions found on MTD device spi0.4
[    0.335000] Creating 8 MTD partitions on "spi0.4":
[    0.339000] 0x000000000000-0x000000080000 : "uboot_fix"
[    0.346000] 0x000000080000-0x0000000c0000 : "uboot_cfg"
[    0.352000] 0x0000000c0000-0x000000ac0000 : "data"
[    0.356000] 0x000000ac0000-0x000002540000 : "images1"
[    0.361000] 0x000000c7c040-0x000001515040 : "rootfs"
[    0.366000] 0x000001540040-0x000001c4d040 : "servicefs"
[    0.372000] 0x000001c80040-0x000001cb2040 : "defconfig"
[    0.377000] 0x000002540000-0x000003fc0000 : "images2"
[    0.382000] ltq-spi ltq-spi.0: Lantiq XWAY SoC SPI driver (TXFS 8, RXFS 8, DMA 32)
[    0.390000] ltq-usif-spi ltq-usif-spi.1: Lantiq XWAY SoC USIF SPI driver (TXFS 8, RXFS 8)
[    0.398000] PPP generic driver version 2.4.2
[    0.401000] NET: Registered protocol family 24
[    0.405000] IFX SWITCH API, Version 1.2.5
[    0.409000] SWAPI: Registered character device [switch_api] with major no [251]
[    0.417000] Switch API: PCE MicroCode loaded !!
[    0.422000] vr9_switch vr9_switch: firmware: using built-in firmware lantiq/vr9_phy22f_a2x.bin
[    0.430000] vr9_switch vr9_switch: booting GPHY0 firmware lantiq/vr9_phy22f_a2x.bin at a7ac0000
[    0.438000] vr9_switch vr9_switch: firmware: using built-in firmware lantiq/vr9_phy11g_a2x.bin
[    0.447000] vr9_switch vr9_switch: booting GPHY1 firmware lantiq/vr9_phy11g_a2x.bin at a7ae0000
[    0.557000] sl550x_phy_fixup: phydev->addr 0
[    0.560000] sl550x_phy_fixup: phydev->addr 1
[    0.565000] sl550x_phy_fixup: phydev->addr 11
[    0.569000] sl550x_phy_fixup: phydev->addr 12
[    0.573000] sl550x_phy_fixup: phydev->addr 13
[    0.578000] vr9_switch_mii: probed
[    0.581000] sl550x_phy_fixup: phydev->addr 0
[    0.586000] sl550x_phy_fixup: phydev->addr 1
[    0.591000] sl550x_phy_fixup: phydev->addr 11
[    0.595000] sl550x_phy_fixup: phydev->addr 12
[    0.599000] sl550x_phy_fixup: phydev->addr 13
[    0.604000] input: gpio-buttons as /devices/platform/gpio-buttons/input/input0
[    0.611000] ltq_wdt ltq_wdt.0: Last boot was caused by power-on-reset
[    0.617000] Registered led device: green:power
[    0.621000] Registered led device: red:power
[    0.625000] Registered led device: green:info
[    0.630000] Registered led device: red:info
[    0.634000] Registered led device: green:wlan
[    0.638000] Registered led device: green:wps
[    0.642000] Registered led device: green:web
[    0.647000] Registered led device: red:web
[    0.651000] Registered led device: green:usb2
[    0.655000] Lantiq LED driver, version 1.1.4, (c) 2001-2011 Lantiq Deutschland GmbH
[    0.662000] ifx-led ifx-led: ifx_led_probe
[    0.667000] Registered led device: green:phone
[    0.671000] Registered led device: red:phone
[    0.675000] Registered led device: green:usb1
[    0.680000] Registered led device: green:dsl-led1
[    0.684000] Netfilter messages via NETLINK v0.30.
[    0.689000] nf_conntrack version 0.5.0 (1934 buckets, 7736 max)
[    0.695000] ip_tables: (C) 2000-2006 Netfilter Core Team
[    0.700000] TCP westwood registered
[    0.704000] NET: Registered protocol family 10
[    0.709000] ip6_tables: (C) 2000-2006 Netfilter Core Team
[    0.714000] NET: Registered protocol family 17
[    0.718000] NET: Registered protocol family 15
[    0.722000] Bridge firewalling registered
[    0.726000] Ebtables v2.0 registered
[    0.730000] KOAM is loaded successfully.
[    0.734000] 802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
[    0.740000] All bugs added by David S. Miller <davem@redhat.com>
[    0.754000] Freeing unused kernel memorykernel.hostname = localhost
kernel.domainname = localdomain
kernel.panic_on_oops = 1
kernel.panic = 3
vm.swappiness = 0
vm.overcommit_memory = 2
vm.overcommit_ratio = 100
vm.drop_caches = 0
vm.oom_dump_tasks = 1
vm.oom_kill_allocating_task = 1
vm.panic_on_oom = 0
vm.vfs_cache_pressure = 0
vm.min_free_kbytes = 4096
net.ipv4.ip_forward = 0
net.ipv6.conf.all.disable_ipv6 = 1
net.ipv6.conf.default.disable_ipv6 = 1
net.ipv6.conf.all.accept_ra = 0
net.ipv6.conf.all.accept_ra_defrtr = 0
net.ipv6.conf.all.accept_ra_pinfo = 0
net.ipv6.conf.all.accept_ra_rtr_pref = 0
net.ipv6.conf.all.accept_redirects = 0
net.ipv6.conf.all.autoconf = 0
net.ipv6.conf.default.accept_ra = 0
net.ipv6.conf.default.accept_ra_defrtr = 0
net.ipv6.conf.default.accept_ra_pinfo = 0
net.ipv6.conf.default.accept_ra_rtr_pref = 0
net.ipv6.conf.default.accept_redirects = 0
net.ipv6.conf.default.autoconf = 0
net.ipv6.conf.all.forwarding = 1
net.ipv6.conf.default.forwarding = 1
kernel.printk = 8 6 1 7
net.ipv6.conf.lo.disable_ipv6 = 0
-e initramfs:info:  Mounting /dev/mtdblock4 to ./rootfs
-e initramfs:info:  Mounting /dev/mtdblock5 to ./rootfs/usr
-e initramfs:info:  Mounting /dev/mtdblock6 to ./rootfs/config
init started: BusyBox v1.22.1-sphairon10 (2017-08-22 13:53:59 CEST)
rcS:info: Initializing kernel hotplug
rcS:info: Using udev for kernel hotplug                             [ SUCCESS ]
[    2.796000] <30>udevd[285]: starting version 175
rcS:info: Initializing kernel sysctl settings
kernel.printk = 7 4 1 7
rcS:info: Running init start scripts
rc:info: S01init-timezone.start                                     [ SUCCESS ]
rc:info: S02readbconf.start                                         [ SUCCESS ]
rc:info: S02readbtl.start                                           [ SUCCESS ]
rc:info: S02readetl.start                                           [ SUCCESS ]
rc:info: S04accounts.start                                          [ SUCCESS ]
rc:info: S05dbus-daemon.start                                       [ SUCCESS ]
rc:info: S05logging.start                                           [ SUCCESS ]
init-data-storage:info: initializing data storage
UBI device number 0, total 40 LEBs (10480640 bytes, 10.0 MiB), available 0 LEBs (0 bytes), LEB size 262016 bytes (255.9 KiB)
Adding job: */1 * * * * /srv/ubifs_rw_check

Mon May  4 03:23:13 MESZ 2020
rc:info: S06init-data-storage.start                                 [ SUCCESS ]
logging_store:info: stop service logging
plat-restore-log-files:info: restore log files
rc:info: S07logging_store.start                                     [ SUCCESS ]
1+0 records in
1+0 records out
512 bytes (512B) copied, 0.004350 seconds, 114.9KB/s
rc:info: S08init-entropy.start                                      [ SUCCESS ]
rc:info: S09init-ip6-config.start                                   [ SUCCESS ]
rc:info: S11input-daemon.start                                      [ SUCCESS ]
rc:info: S12init-dsp-api.start                                      [ SUCCESS ]
rc:info: S13init-wlan-api.start                                     [ SUCCESS ]
rc:info: S14init-dsl-api.start                                      [ SUCCESS ]
rc:info: S19init-services-interface.start                           [ SUCCESS ]
datapath.srv:info: Start AUTO
datapath.srv:info: restore previous datapath mode ETH
hwqos:info: Set wan pq map to reverse
hwqos:info: Set wan qos scheduler to strictRR
rc:info: S20init-switch.start                                       [ SUCCESS ]
rc:info: S30update-bootloader.start                                 [ SKIPPED ]
rc:info: S40validate-platform-image.start                           [ SKIPPED ]
rc:info: S41init-ptest.start                                        [ SKIPPED ]
rc:info: S51ifstatusd.start                                         [ SUCCESS ]
Suggested rootfs Version is 5.0.10.0.3_r0_heinzm - currently using
rc:info: S83readversion.start                                       [ SUCCESS ]
rc:info: S85init-post.start                                         [ SKIPPED ]
May  4 03:23:17:463:info:ApiCheck   Checking API: deviceinfo-api-1.4.4
May  4 03:23:17:464:info:ApiCheck   Checking API: dsl-api-1.8.3
May  4 03:23:17:464:info:ApiCheck   Checking API: fwdownload-api-1.6.0
May  4 03:23:17:465:info:ApiCheck   Checking API: flash-api-1.6.14
May  4 03:23:17:465:info:ApiCheck   Checking API: hwcap-1.0.0
May  4 03:23:17:466:info:ApiCheck   Checking API: userlib-1.1.0
May  4 03:23:17:467:info:ApiCheck   Checking API: wlan-api-1.34.3
rc:info: S02check-api-version.start                                 [ SUCCESS ]
rc:info: S03cron-daemon.start                                       [ SUCCESS ]
init-config:info: creating databases from slot config-active
init-config:info: slot config-active is configured with reset mode none and reset source none
init-config:info: initializing downgrade migrations (config-active)
init-config:info: migrating databases (config-active)
May  4 03:23:23:593:info:CfgMigrat   persistent-phone (V1Compat) @ 24.45 is up-to-date
May  4 03:23:23:594:info:CfgMigrat   persistent-common (V1Compat) @ 24.12 is up-to-date
May  4 03:23:23:595:info:CfgMigrat   persistent-network (V1Compat) @ 24.44 is up-to-date
May  4 03:23:23:596:info:CfgMigrat   persistent-web (V1Compat) @ 24.11 is up-to-date
May  4 03:23:23:597:info:CfgMigrat   persistent-tr069 (V1Compat) @ 24.13 is up-to-date
May  4 03:23:23:598:info:CfgMigrat   services (V1Compat) @ 24.1 is up-to-date
May  4 03:23:23:600:info:CfgMigrat   persistent-tr069 (V2Schemata) @ 24.4 is up-to-date
May  4 03:23:23:601:info:CfgMigrat   persistent-common (V2Schemata) @ 24.5 is up-to-date
May  4 03:23:23:602:info:CfgMigrat   persistent-network (V2Schemata) @ 24.15 is up-to-date
May  4 03:23:23:603:info:CfgMigrat   persistent-web (V2Schemata) @ 24.5 is up-to-date
May  4 03:23:23:604:info:CfgMigrat   persistent-phone (V2Schemata) @ 24.15 is up-to-date
May  4 03:23:23:605:info:CfgMigrat   services (V2Schemata) @ 24.0 is up-to-date
May  4 03:23:23:606:info:CfgMigrat   persistent-area (V2Schemata) @ 24.0 is up-to-date
May  4 03:23:23:607:info:CfgMigrat   persistent-common (V2Config) @ 24.12 is up-to-date
May  4 03:23:23:609:info:CfgMigrat   persistent-network (V2Config) @ 24.44 is up-to-date
May  4 03:23:23:610:info:CfgMigrat   persistent-phone (V2Config) @ 24.45 is up-to-date
May  4 03:23:23:611:info:CfgMigrat   persistent-tr069 (V2Config) @ 24.13 is up-to-date
May  4 03:23:23:612:info:CfgMigrat   persistent-web (V2Config) @ 24.11 is up-to-date
May  4 03:23:23:613:info:CfgMigrat   persistent-area (V2Config) @ 24.80 is up-to-date
May  4 03:23:23:614:info:CfgMigrat   services (V2Config) @ 24.1 is up-to-date
init-config:info: activating databases (config-active)
init-config:info: activating time zone settings
rc:info: S04init-config.start                                       [ SUCCESS ]
rc:info: S06init-versioninfo.start                                  [ SUCCESS ]
rc:info: S07init-snmp.start                                         [ SUCCESS ]
rc:info: S07init-ssh.start                                          [ SUCCESS ]
rc:info: S08init-audiodsamples.start                                [ SUCCESS ]
rc:info: S09init-certificates.start                                 [ SUCCESS ]
config-manager:info: Starting config-manager
Dump path: /tmp/sql_dump
Flash wait time: 4
rc:info: S10config-manager.start                                    [ SUCCESS ]
init-bridgemode.start:info: bridge mode not enabled, skip...
rc:info: S18init-bridgemode.start                                   [ SKIPPED ]
init-deviceinfo:info: init table DeviceInfo
rc:info: S18init-deviceinfo.start                                   [ SUCCESS ]
init-wlan:info: init table WlanGlobals
rc:info: S18init-wlan.start                                         [ SUCCESS ]
Daemonize: 1
rc:info: S19wland.start                                             [ SUCCESS ]
Daemonize: 1
timeout to bringup nodes: 600
rc:info: S20network-manager.start                                   [ SUCCESS ]
service-manager:info: Starting service-manager
service-manager:info: using config from /config/sas-services
[   25.391000] net sw-p5-wifi: this is only a dummy interface!
rc:info: S21service-manager.start                                   [ SUCCESS ]
rc:info: S86init-servicefs.start                                    [ SUCCESS ]
May  4 03:23:31:628:info:BOOTIMAGE   No changes on configuration done
rc:info: S89validate-service-image.start                            [ SUCCESS ]
rc:info: S99init-post.start                                         [ SKIPPED ]
rcS:info: System init                                               [ SUCCESS ]

Please press Enter to activate this console. [   32.234000] net sw-p5-wifi: this is only a dummy interface!

[    0.335000] Creating 6 MTD partitions on "spi0.4":
[    0.339000] 0x000000000000-0x000000080000 : "uboot_fix"
[    0.346000] 0x000000080000-0x0000000c0000 : "uboot_cfg"
[    0.352000] 0x0000000c0000-0x000000ac0000 : "data"
[    0.356000] 0x000000ac0000-0x000002540000 : "images1"
[    0.361000] 0x000000c7c040-0x000001515040 : "rootfs"
[    0.366000] 0x000002540000-0x000003fc0000 : "images2"

can someone do something with it to port to openwrt ?


sl550x.h

/*
 * This file is released under the terms of GPL v2 and any later version.
 * See the file COPYING in the root directory of the source tree for details.
 *
 * Copyright (C) 2012-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_MACH_TYPE	"SPHSL550X"
#define CONFIG_IDENT_STRING	" "CONFIG_MACH_TYPE
#define CONFIG_BOARD_NAME	"Sphairon Speedlink 4501/5501/6501 IAD"

/* Configure SoC */
#define CONFIG_LTQ_SUPPORT_UART		/* Enable ASC and UART */

#define CONFIG_LTQ_SUPPORT_ETHERNET	/* Enable ethernet */

#define CONFIG_LTQ_SSIO_SHIFT_REGS	1
#define CONFIG_LTQ_SSIO_EDGE_FALLING
#define CONFIG_LTQ_SSIO_GPHY1_MODE	0x3
#define CONFIG_LTQ_SSIO_GPHY2_MODE	0x3
#define CONFIG_LTQ_SSIO_INIT_VALUE	0x0

#define CONFIG_LTQ_SUPPORT_SPI_FLASH
#define CONFIG_SPI_FLASH_MACRONIX	/* Supports MX29LV620 serial flash */
#define CONFIG_SPI_FLASH_SPANSION	/* Supports SF25FL256S serial flash */
#define CONFIG_SPI_FLASH_EON		/* Supports EN25QH256 serial flash */
#define CONFIG_SPI_FLASH_4BYTE_MODE

#define CONFIG_LTQ_SUPPORT_NAND_FLASH

#define CONFIG_LTQ_SUPPORT_SPL_SPI_FLASH	/* Build SPI flash SPL */
#define CONFIG_SPL_SPI_BUS		0
#define CONFIG_SPL_SPI_CS		4
#define CONFIG_SPL_SPI_MAX_HZ		25000000
#define CONFIG_SPL_SPI_MODE		0
#define CONFIG_LTQ_SPL_COMP_LZO
#define CONFIG_LTQ_SPL_CONSOLE

/* MTD devices */
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_SPI_FLASH_MTD
#define CONFIG_CMD_MTD
#define MTDIDS_DEFAULT			"nor0=spi0.4,nand0=nand-xway"

/* Environment */
#define CONFIG_ENV_SPI_BUS		CONFIG_SPL_SPI_BUS
#define CONFIG_ENV_SPI_CS		CONFIG_SPL_SPI_CS
#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SPL_SPI_MAX_HZ
#define CONFIG_ENV_SPI_MODE		CONFIG_SPL_SPI_MODE

#if defined(CONFIG_SYS_BOOT_SFSPL)
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_OFFSET		(512 * 1024)
#define CONFIG_ENV_SECT_SIZE		(256 * 1024)

#define MTDPARTS_DEFAULT		\
	"mtdparts=spi0.4:512k(uboot_fix),256k(uboot_cfg)"
#else
#define CONFIG_ENV_IS_NOWHERE

#define MTDPARTS_DEFAULT		"mtdparts="
#endif

#define CONFIG_ENV_SIZE			(8 * 1024)

#define CONFIG_LOADADDR			CONFIG_SYS_LOAD_ADDR

/* Console */
#define CONFIG_LTQ_ADVANCED_CONSOLE
#define CONFIG_BAUDRATE			115200
#define CONFIG_CONSOLE_ASC		1
#define CONFIG_CONSOLE_DEV		"ttyLTQ1"

/* Commands */
#define CONFIG_CMD_PING

/* Pull in default board configs for Lantiq XWAY VRX200 */
#include <asm/lantiq/config.h>
#include <asm/arch/config.h>

/* Pull in additional Sphairon board config options */
#include <configs/sphairon_env.h>

#define CONFIG_ENV_UPDATE_UBOOT_SF					\
	"update-uboot-sf=run load-uboot-sfspl-lzo write-uboot-sf\0"

#define CONFIG_EXTRA_ENV_SETTINGS	\
	CONFIG_ENV_LANTIQ_DEFAULTS	\
	CONFIG_ENV_UPDATE_UBOOT_SF	\
	CONFIG_ENV_SPHAIRON_GENERIC

/* Default flash layout */
#define CONFIG_SPHAIRON_FLASHLAYOUT	"pss"
#define CONFIG_SPHAIRON_NO_UBOOT_UPDATE

#endif /* __CONFIG_H */


sl550x.c

/*
 * This file is released under the terms of GPL v2 and any later version.
 * See the file COPYING in the root directory of the source tree for details.
 *
 * Copyright (C) 2012-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
 */

#include <common.h>
#include <spi.h>
#include <asm/gpio.h>
#include <asm/lantiq/eth.h>
#include <asm/lantiq/chipid.h>
#include <asm/lantiq/cpu.h>
#include <asm/arch/gphy.h>
#include <sas/controlfile.h>
#include <sas/etl.h>

#if defined(CONFIG_SPL_BUILD)
#define do_gpio_init	1
#define do_pll_init	1
#define do_dcdc_init	0
#elif defined(CONFIG_SYS_BOOT_RAM)
#define do_gpio_init	1
#define do_pll_init	0
#define do_dcdc_init	1
#else
#define do_gpio_init	0
#define do_pll_init	0
#define do_dcdc_init	1
#endif

static inline void gpio_init(void)
{
	/* GPIO button WLAN enable (low-active) */
	gpio_direction_input(45);
	/* GPIO button WPS enable (low-active) */
	gpio_direction_input(46);
	/* GPIO button board reset (low-active) */
	gpio_direction_input(47);

	/* LED Power green */
	gpio_direction_output(3, 1);
	/* LED FXO green */
	gpio_direction_output(14, 0);
	/* LED Power red */
	gpio_direction_output(19, 0);
	/* LED Info green */
	gpio_direction_output(20, 1);
	/* LED Info red */
	gpio_direction_output(21, 1);
	/* LED Internet green */
	gpio_direction_output(27, 1);
	/* LED Internet red */
	gpio_direction_output(28, 1);
	/* LED WLAN green */
	gpio_direction_output(29, 1);
	/* LED WPS green */
	gpio_direction_output(30, 1);
	/* LED USB2 green */
	gpio_direction_output(32, 1);

	/* SPI CS 0.4 to serial flash */
	gpio_direction_output(10, 1);

	/* SPI CS 1.0 to ISAC-SX */
	gpio_direction_output(39, 1);
	/* SPI CS 1.1 to IPAC-X FXO */
	gpio_direction_output(22, 1);

	/* USB port0 power enable, disabled at startup */
	gpio_direction_output(41, 0);
	/* USB port1 power enable, disabled at startup */
	gpio_direction_output(33, 0);

	/* EBU.FL_CS1 as output for NAND CE */
	gpio_set_altfunc(23, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);
	/* EBU.FL_A23 as output for NAND CLE */
	gpio_set_altfunc(24, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);
	/* EBU.FL_A24 as output for NAND ALE */
	gpio_set_altfunc(13, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);
	/* GPIO 3.0 as input for NAND Ready Busy */
	gpio_set_altfunc(48, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_IN);
	/* GPIO 3.1 as output for NAND Read */
	gpio_set_altfunc(49, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);

	/* LEDC/LED_ST for LED shift register */
	gpio_set_altfunc(4, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);
	/* LEDC/LED_D for LED shift register */
	gpio_set_altfunc(5, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);
	/* LEDC/LED_SH for LED shift register */
	gpio_set_altfunc(6, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);

	/* Ralink iNIC WLAN reset, low-active, asserted at startup */
	gpio_direction_output(15, 0);
	/* Ralink iNIC WLAN power, disabled at startup */
	gpio_direction_output(37, 0);

	/* TDM/FSC as input, internal pull-up */
	gpio_direction_input(0);
	gpio_set_pull(0, GPIO_PULL_UP);
	/* TDM/DCL as input, internal pull-up */
	gpio_direction_input(40);
	gpio_set_pull(40, GPIO_PULL_UP);
	/* TDM/DI as input */
	gpio_direction_input(26);
	/* TDM/DO as input */
	gpio_direction_input(25);
}

int board_early_init_f(void)
{
	if (do_gpio_init) {
		ltq_gpio_init();
		gpio_init();
	}

	if (do_pll_init)
		ltq_pll_init();

	if (do_dcdc_init)
		ltq_dcdc_init(0x7F);

	return 0;
}

int checkboard(void)
{
	puts("Board: " CONFIG_BOARD_NAME "\n");
	ltq_chip_print_info();

	return 0;
}

static const struct ltq_eth_port_config eth_port_sl4501[] = {
	/* GMAC0: unused */
	{ 0, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC1: unused */
	{ 1, 0x1, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC2: internal GPHY0 with 10/100/1000 firmware for LAN port 1 */
	{ 2, 0x11, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_GMII },
	/* GMAC3: unused */
	{ 3, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC4: internal GPHY0 with 10/100/1000 firmware for LAN port 2 */
	{ 4, 0x13, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_GMII },
	/* GMAC5: Ralink iNIC */
	{ 5, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
};

static const struct ltq_eth_board_config eth_board_sl4501 = {
	.ports = eth_port_sl4501,
	.num_ports = ARRAY_SIZE(eth_port_sl4501),
};

static const struct ltq_eth_port_config eth_port_sl5501[] = {
	/* GMAC0: external Lantiq PEF7071 10/100/1000 PHY for WANoE port */
	{ 0, 0x0, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_RGMII },
	/* GMAC1: external Lantiq PEF7071 10/100/1000 PHY for LAN port 3/4 */
	{ 1, 0x1, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_RGMII },
	/* GMAC2: internal GPHY1 with 10/100 firmware for LAN port 1/2 */
	{ 2, 0x11, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_MII },
	/* GMAC3: internal GPHY0 with 10/100 firmware for LAN port 1/2 */
	{ 3, 0x12, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_MII },
	/* GMAC4: internal GPHY0 with 10/100/1000 firmware for LAN port 3/4 */
	{ 4, 0x13, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_GMII },
	/* GMAC5: Ralink iNIC */
	{ 5, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
};

static const struct ltq_eth_board_config eth_board_sl5501 = {
	.ports = eth_port_sl5501,
	.num_ports = ARRAY_SIZE(eth_port_sl5501),
};

static const struct ltq_eth_port_config eth_port_sl6501[] = {
	/* GMAC0: unused */
	{ 0, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC1: external Lantiq PEF7071 10/100/1000 PHY for LAN port 3/4 */
	{ 1, 0x1, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_RGMII },
	/* GMAC2: internal GPHY1 with 10/100 firmware for LAN port 1/2 */
	{ 2, 0x11, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_MII },
	/* GMAC3: internal GPHY0 with 10/100 firmware for LAN port 1/2 */
	{ 3, 0x12, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_MII },
	/* GMAC4: internal GPHY0 with 10/100/1000 firmware for LAN port 3/4 */
	{ 4, 0x13, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_GMII },
	/* GMAC5: Ralink iNIC */
	{ 5, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
};

static const struct ltq_eth_board_config eth_board_sl6501 = {
	.ports = eth_port_sl6501,
	.num_ports = ARRAY_SIZE(eth_port_sl6501),
};

static const struct ltq_eth_port_config eth_port_compat[] = {
	/* GMAC0: unused */
	{ 0, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC1: unused */
	{ 1, 0x1, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC2: unused */
	{ 2, 0x11, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC3: unused */
	{ 3, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC4: internal GPHY0 with 10/100/1000 firmware for LAN port 2 */
	{ 4, 0x13, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_GMII },
	/* GMAC5: Ralink iNIC */
	{ 5, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
};

static const struct ltq_eth_board_config eth_board_compat = {
	.ports = eth_port_compat,
	.num_ports = ARRAY_SIZE(eth_port_compat),
};

int board_eth_init(bd_t * bis)
{
	const enum ltq_gphy_clk clk = LTQ_GPHY_CLK_25MHZ_PLL0;
	const ulong fw_ge_addr = 0x80FE0000;
	const ulong fw_fe_addr = 0x80FF0000;
	unsigned int base_platform = sas_etl_base_platform();

	ltq_gphy_phy11g_a2x_load(fw_ge_addr);
	ltq_gphy_phy22f_a2x_load(fw_fe_addr);

	ltq_cgu_gphy_clk_src(clk);

	switch (base_platform) {
	case 425:
		ltq_rcu_gphy_boot(0, fw_ge_addr);
		ltq_rcu_gphy_boot(1, fw_ge_addr);
		return ltq_eth_initialize(&eth_board_sl4501);
	case 420:
		ltq_rcu_gphy_boot(0, fw_fe_addr);
		ltq_rcu_gphy_boot(1, fw_ge_addr);
		return ltq_eth_initialize(&eth_board_sl5501);
	case 424:
		ltq_rcu_gphy_boot(0, fw_fe_addr);
		ltq_rcu_gphy_boot(1, fw_ge_addr);
		return ltq_eth_initialize(&eth_board_sl6501);
	default:
		ltq_rcu_gphy_boot(1, fw_ge_addr);
		return ltq_eth_initialize(&eth_board_compat);
	}
}

int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
	if (bus)
		return 0;

	if (cs == 4)
		return 1;

	return 0;
}

void spi_cs_activate(struct spi_slave *slave)
{
	int gpio = -1;

	/* Serial flash at bus 0 (SPI) */
	if (slave->bus == 0 && slave->cs == 4)
		gpio = 10;

	if (gpio >= 0)
		gpio_set_value(gpio, 0);
}

void spi_cs_deactivate(struct spi_slave *slave)
{
	int gpio = -1;

	/* Serial flash at bus 0 (SPI) */
	if (slave->bus == 0 && slave->cs == 4)
		gpio = 10;

	if (gpio >= 0)
		gpio_set_value(gpio, 1);
}

int sas_cf_check_board(void)
{
	/* check if reset button is pressed */
	return 0 == gpio_get_value(47);
}

void sas_cf_led_action(enum sas_cf_state state)
{
	switch (state) {
	case CF_STARTED:
		/* LED Power green on */
		gpio_direction_output(3, 0);
		break;
	case CF_FINISHED:
		/* LED Power green off */
		gpio_direction_output(3, 1);
		break;
	case CF_FAILED:
		/* LED Info red on */
		gpio_direction_output(21, 0);
		/* LED Power green off */
		gpio_direction_output(3, 0);
		break;
	}
	return;
}


mach-sphsl550x.c

/*
 *   This program is free software; you can redistribute it and/or modify
 *   it under the terms of the GNU General Public License as published by
 *   the Free Software Foundation; either version 2 of the License, or
 *   (at your option) any later version.
 *
 *   This program is distributed in the hope that it will be useful,
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *   GNU General Public License for more details.
 *
 *   You should have received a copy of the GNU General Public License
 *   along with this program; if not, write to the Free Software
 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
 *
 *   Copyright (C) 2012-2014 Daniel Schwierzeck <daniel.schwierzeck@sphairon.com>
 */

#include <linux/spi/spi.h>
#include <linux/interrupt.h>
#include <linux/gpio.h>
#include <linux/gpio_buttons.h>
#include <linux/input.h>
#include <asm/mips_machine.h>
#include <asm/ifx/machtypes.h>

#include <ifx_devices.h>
#include <ifx_led.h>
#include <ifx_ledc.h>
#include <lantiq_spi.h>
#include <pef7071.h>

static struct ltq_spi_controller_data spi_cdata_m25p80 = {
	.gpio = 10,
};

static struct ltq_spi_controller_data spi_cdata_psb21150_fxs = {
	.gpio = 39,
};

static struct ltq_spi_controller_data spi_cdata_psb21150_fxo = {
	.gpio = 22,
};

static const struct peb3086_platform_data psb21150_pdata_fxs = {
	.irq_flags = IRQF_TRIGGER_LOW,
	.iom2_chan = 0,
	.mode = MODE_LTS,
	.dps = 1,
};

static const struct peb3086_platform_data psb21150_pdata_fxo = {
	.irq_flags = IRQF_TRIGGER_LOW,
	.iom2_chan = 1,
	.mode = MODE_TE,
	.pwr_src_pin = 1,
};

static struct spi_board_info spi_boardinfo_sl550x[] __initdata = {
	{
		.modalias = "m25p80",	/* SPI flash */
		.bus_num = 0,
		.chip_select = 4,
		.mode = SPI_MODE_0,
		.max_speed_hz = 25000000,
		.controller_data = &spi_cdata_m25p80,
	},
	{
		.modalias = "psb21150",	/* IPAC-X PSB 21150 FXS */
		.bus_num = 1,
		.chip_select = 0,
		.mode = SPI_MODE_3,
		.max_speed_hz = 1000000,
		.platform_data = &psb21150_pdata_fxs,
		.controller_data = &spi_cdata_psb21150_fxs,
		.irq = IFX_EIU_IR1,	/* EXIN1 on GPIO1 */
	},
};

static struct spi_board_info spi_boardinfo_sl6501[] __initdata = {
	{
		.modalias = "m25p80",	/* SPI flash */
		.bus_num = 0,
		.chip_select = 4,
		.mode = SPI_MODE_0,
		.max_speed_hz = 25000000,
		.controller_data = &spi_cdata_m25p80,
	},
	{
		.modalias = "psb21150",	/* IPAC-X PSB 21150 FXS */
		.bus_num = 1,
		.chip_select = 0,
		.mode = SPI_MODE_3,
		.max_speed_hz = 1000000,
		.platform_data = &psb21150_pdata_fxs,
		.controller_data = &spi_cdata_psb21150_fxs,
		.irq = IFX_EIU_IR1,	/* EXIN1 on GPIO1 */
	},
	{
		.modalias = "psb21150",	/* IPAC-X PSB 21150 FXO */
		.bus_num = 1,
		.chip_select = 1,
		.mode = SPI_MODE_3,
		.max_speed_hz = 1000000,
		.platform_data = &psb21150_pdata_fxo,
		.controller_data = &spi_cdata_psb21150_fxo,
		.irq = IFX_EIU_IR1,	/* EXIN1 on GPIO1 */
	},
};

static struct spi_board_info spi_boardinfo_sl4501[] __initdata = {
	{
		.modalias = "m25p80",	/* SPI flash */
		.bus_num = 0,
		.chip_select = 4,
		.mode = SPI_MODE_0,
		.max_speed_hz = 25000000,
		.controller_data = &spi_cdata_m25p80,
	},
};

static struct gpio_button gpio_buttons[] = {
	/* Reset */
	{
		.gpio = 47,
		.active_low = 1,
		.desc = "reset-btn",
		.type = EV_KEY,
		.code = BTN_0,
		.threshold = 0,
	},
	/* WLAN */
	{
		.gpio = 45,
		.active_low = 1,
		.desc = "wlan-btn",
		.type = EV_KEY,
		.code = BTN_1,
		.threshold = 0,
	},
	/* WPS */
	{
		.gpio = 46,
		.active_low = 1,
		.desc = "wps-btn",
		.type = EV_KEY,
		.code = BTN_2,
		.threshold = 0,
	},
};

static struct gpio_buttons_platform_data gpio_button_pdata __initdata = {
	.buttons = gpio_buttons,
	.nbuttons = ARRAY_SIZE(gpio_buttons),
	.poll_interval = 101,
};

static const struct stg_gpio_config stg_gpios[] = {
	{
		.name = "wlan-pwr",
		.gpio = 37,
		.active_low = 0,
		.default_state = STG_GPIO_DEFSTATE_OFF,
	},
	{
		.name = "wlan-rst",
		.gpio = 15,
		.active_low = 1,
		.default_state = STG_GPIO_DEFSTATE_ON,
	},
	{
		.name = "slic-rst",
		.gpio = 31,
		.active_low = 1,
		.default_state = STG_GPIO_DEFSTATE_ON,
	},
};

static struct stg_platform_data stg_gpio_pdata __initdata = {
	.gpios = stg_gpios,
	.gpio_num = ARRAY_SIZE(stg_gpios),
};

static struct ifx_ledc_config_param ledc_hw_config = {
	.operation_mask = IFX_LEDC_CFG_OP_UPDATE_SOURCE |
				IFX_LEDC_CFG_OP_BLINK |
				IFX_LEDC_CFG_OP_UPDATE_CLOCK |
				IFX_LEDC_CFG_OP_STORE_MODE |
				IFX_LEDC_CFG_OP_SHIFT_CLOCK |
				IFX_LEDC_CFG_OP_DATA_OFFSET |
				IFX_LEDC_CFG_OP_NUMBER_OF_LED |
				IFX_LEDC_CFG_OP_DATA |
				IFX_LEDC_CFG_OP_MIPS0_ACCESS |
				IFX_LEDC_CFG_OP_DATA_CLOCK_EDGE,
	.source_mask = (1 << 8) - 1,
	.source = (1 << IFX_LED_EXT_SRC_GPHY1_LED0) |
			(1 << IFX_LED_EXT_SRC_GPHY1_LED1) |
			(1 << IFX_LED_EXT_SRC_GPHY0_LED0) |
			(1 << IFX_LED_EXT_SRC_GPHY0_LED1),
	.blink_mask = (1 << 8) - 1,
	.blink = 0,
	.update_clock = LED_CON1_UPDATE_SRC_GPT,
	.fpid = 8 * 16 * 4,	/* 8 pins * 16 Hz * 4 */
	.store_mode = 0,
	.fpis = 0,
	.data_offset = 0,
	.number_of_enabled_led = 8,
	.data_mask = (1 << 8) - 1,
	.data = 0,
	.mips0_access_mask = (1 << 8) - 1,
	.mips0_access = (1 << 8) - 1,
	.f_data_clock_on_rising = 0,
};

static struct ifx_led_device led_hw_config[] = {
	{
		.name			= "green:phone",
		.phys_id		= 7,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
	{
		.name			= "red:phone",
		.phys_id		= 4,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
#if 0
	{
		.name			= "green:lan3",
		.phys_id		= 6,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
	{
		.name			= "green:lan1",
		.phys_id		= 3,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
	{
		.name			= "green:lan2",
		.phys_id		= 2,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
#endif
	{
		.name			= "green:usb1",
		.phys_id		= 1,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
	{
		.name			= "green:dsl-led1",
		.phys_id		= 0,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
	{
		.flags			= IFX_LED_DEVICE_FLAG_INVALID,
	}
};

static struct gpio_led gpio_leds_sl550x[] = {
	{
		.name = "green:power",
		.gpio = 3,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:power",
		.gpio = 19,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_ON,
	},
	{
		.name = "green:info",
		.gpio = 20,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:info",
		.gpio = 21,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:wlan",
		.gpio = 29,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:wps",
		.gpio = 30,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:web",
		.gpio = 27,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:web",
		.gpio = 28,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:usb2",
		.gpio = 32,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
};

static struct gpio_led gpio_leds_sl6501[] = {
	{
		.name = "green:power",
		.gpio = 3,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:power",
		.gpio = 19,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_ON,
	},
	{
		.name = "green:info",
		.gpio = 20,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:info",
		.gpio = 21,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:wlan",
		.gpio = 29,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:wps",
		.gpio = 30,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:web",
		.gpio = 27,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:web",
		.gpio = 28,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:usb2",
		.gpio = 32,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:fxo",
		.gpio = 14,
		.active_low = 0,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
};

static struct gpio_led gpio_leds_sl4501[] = {
	{
		.name = "green:power",
		.gpio = 3,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:power",
		.gpio = 19,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_ON,
	},
	{
		.name = "green:info",
		.gpio = 20,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:info",
		.gpio = 21,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:wlan",
		.gpio = 29,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:wps",
		.gpio = 30,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:web",
		.gpio = 27,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:web",
		.gpio = 28,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
};

static struct gpio_led_platform_data gpio_led_pdata_sl550x __initdata = {
	.leds = gpio_leds_sl550x,
	.num_leds = ARRAY_SIZE(gpio_leds_sl550x),
};

static struct gpio_led_platform_data gpio_led_pdata_sl6501 __initdata = {
	.leds = gpio_leds_sl6501,
	.num_leds = ARRAY_SIZE(gpio_leds_sl6501),
};

static struct gpio_led_platform_data gpio_led_pdata_sl4501 __initdata = {
	.leds = gpio_leds_sl4501,
	.num_leds = ARRAY_SIZE(gpio_leds_sl4501),
};

static struct xway_switch_phy xmii0_phy_ge = {
	.interface = PHY_INTERFACE_MODE_RGMII,
	.irq = IFX_EIU_IR2,
	.irq_flags = IRQF_TRIGGER_LOW,
	.addr = 0x0,
};

static struct xway_switch_phy xmii1_phy_ge = {
	.interface = PHY_INTERFACE_MODE_RGMII,
	.irq = IFX_EIU_IR2,
	.irq_flags = IRQF_TRIGGER_LOW,
	.addr = 0x1,
};

static struct xway_switch_phy gphy0_fe0 = {
	.interface = PHY_INTERFACE_MODE_MII,
	.irq = INT_NUM_IM3_IRL18,
	.addr = 0x11,
};

static struct xway_switch_phy gphy0_fe1 = {
	.interface = PHY_INTERFACE_MODE_MII,
	.irq = INT_NUM_IM3_IRL18,
	.addr = 0x12,
};

static struct xway_switch_phy gphy0_ge = {
	.interface = PHY_INTERFACE_MODE_GMII,
	.irq = INT_NUM_IM3_IRL18,
	.addr = 0x11,
};

static struct xway_switch_phy gphy1_ge = {
	.interface = PHY_INTERFACE_MODE_GMII,
	.irq = INT_NUM_IM3_IRL17,
	.addr = 0x13,
};

static struct xway_switch_mac xmii2_mac_ge = {
	.interface = PHY_INTERFACE_MODE_RGMII,
	.speed = SPEED_1000,
	.duplex = DUPLEX_FULL,
};

static struct xway_switch_xmii switch_xmii_sl550x[] = {
	{
		.dev_name = "sw-p0-wanoe",
		.ppid = 0,
		.phy = &xmii0_phy_ge,
	},
	{
		.dev_name = "sw-p1-lan4",
		.ppid = 1,
		.phy = &xmii1_phy_ge,
	},
	{
		.dev_name = "sw-p5-wifi",
		.ppid = 5,
		.rgmii_tx_delay = 3,
		.mac = &xmii2_mac_ge,
	},
};

static struct xway_switch_xmii switch_xmii_sl6501[] = {
	{
		.dev_name = "sw-p1-lan4",
		.ppid = 1,
		.phy = &xmii1_phy_ge,
	},
	{
		.dev_name = "sw-p5-wifi",
		.ppid = 5,
		.rgmii_tx_delay = 3,
		.mac = &xmii2_mac_ge,
	},
};

static struct xway_switch_xmii switch_xmii_sl4501[] = {
	{
		.dev_name = "sw-p5-wifi",
		.ppid = 5,
		.rgmii_tx_delay = 3,
		.mac = &xmii2_mac_ge,
	},
};

static struct xway_switch_gphy switch_gphy_sl550x[] = {
	{
		.dev_name = "sw-p2-lan1",
		.ppid = 2,
		.phy = &gphy0_fe0,
	},
	{
		.dev_name = "sw-p3-lan2",
		.ppid = 3,
		.phy = &gphy0_fe1,
	},
	{
		.dev_name = "sw-p4-lan3",
		.ppid = 4,
		.phy = &gphy1_ge,
	},
};

static struct xway_switch_gphy switch_gphy_sl4501[] = {
	{
		.dev_name = "sw-p2-lan1",
		.ppid = 2,
		.phy = &gphy0_ge,
	},
	{
		.dev_name = "sw-p4-lan2",
		.ppid = 4,
		.phy = &gphy1_ge,
	},
};

static struct xway_switch_gphy_core switch_gphy_core_sl550x[] = {
	{
		.mode = GPHY_22F,
		.id = 0,
	},
	{
		.mode = GPHY_11G,
		.id = 1,
	},
};

static struct xway_switch_gphy_core switch_gphy_core_sl4501[] = {
	{
		.mode = GPHY_11G,
		.id = 0,
	},
	{
		.mode = GPHY_11G,
		.id = 1,
	},
};

static struct xway_switch_data switch_data_sl550x = {
	.xmii = switch_xmii_sl550x,
	.num_xmii = ARRAY_SIZE(switch_xmii_sl550x),
	.gphy = switch_gphy_sl550x,
	.num_gphy = ARRAY_SIZE(switch_gphy_sl550x),
	.gphy_core = switch_gphy_core_sl550x,
	.num_gphy_core = ARRAY_SIZE(switch_gphy_core_sl550x),
};

static struct xway_switch_data switch_data_sl6501 = {
	.xmii = switch_xmii_sl6501,
	.num_xmii = ARRAY_SIZE(switch_xmii_sl6501),
	.gphy = switch_gphy_sl550x,
	.num_gphy = ARRAY_SIZE(switch_gphy_sl550x),
	.gphy_core = switch_gphy_core_sl550x,
	.num_gphy_core = ARRAY_SIZE(switch_gphy_core_sl550x),
};

static struct xway_switch_data switch_data_sl4501 = {
	.xmii = switch_xmii_sl4501,
	.num_xmii = ARRAY_SIZE(switch_xmii_sl4501),
	.gphy = switch_gphy_sl4501,
	.num_gphy = ARRAY_SIZE(switch_gphy_sl4501),
	.gphy_core = switch_gphy_core_sl4501,
	.num_gphy_core = ARRAY_SIZE(switch_gphy_core_sl4501),
};

static struct sph_usb_oc_data usb0_oc_data = {
	.oc_irq = IFX_USB0_OCIR,
	.port_power_gpio = {
		.name = "usb0-pwr",
		.gpio = 41,
		.active_low = 0,
		.default_state = STG_GPIO_DEFSTATE_OFF,
	},
};

static struct sph_usb_oc_data usb1_oc_data = {
	.oc_irq = IFX_USB1_OCIR,
	.port_power_gpio = {
		.name = "usb1-pwr",
		.gpio = 33,
		.active_low = 0,
		.default_state = STG_GPIO_DEFSTATE_OFF,
	},
};

static int sl550x_phy_fixup(struct phy_device *phydev)
{
	unsigned int led0h = 0, led0l = 0, led1h = 0, led1l = 0;

	pr_info("%s: phydev->addr %0x\n", __func__, phydev->addr);

	switch (phydev->addr) {
	case 0x00:
	case 0x01:
		led0h = 0x70;
		led0l = 0x03;
		break;
	case 0x11:
	/*
	 *  case 0x12: both FE PHYs share the same LED interface thus only one
	 *      	setup is necessary
	 */
		/* FE PHY0 works on LED0 */
		led0h = 0x30;
		led0l = 0x03;
		/* FE PHY1 works on LED1 */
		led1h = 0x30;
		led1l = 0x03;
		break;
	case 0x13:
		led0h = 0x70;
		led0l = 0x03;
		break;
	default:
		return 0;
	}

	/* LED0 */
	pef7071_mmd_write(phydev, 0x1e2, led0h);
	pef7071_mmd_write(phydev, 0x1e3, led0l);

	/* LED1 */
	pef7071_mmd_write(phydev, 0x1e4, led1h);
	pef7071_mmd_write(phydev, 0x1e5, led1l);

	/* LED2 */
	pef7071_mmd_write(phydev, 0x1e6, 0x00);
	pef7071_mmd_write(phydev, 0x1e7, 0x00);

	return 0;
}

static int sl4501_phy_fixup(struct phy_device *phydev)
{
	pr_info("%s: phydev->addr %0x\n", __func__, phydev->addr);

	/* LED0 */
	pef7071_mmd_write(phydev, 0x1e2, 0x70);
	pef7071_mmd_write(phydev, 0x1e3, 0x03);

	/* LED1 */
	pef7071_mmd_write(phydev, 0x1e4, 0x00);
	pef7071_mmd_write(phydev, 0x1e5, 0x00);

	/* LED2 */
	pef7071_mmd_write(phydev, 0x1e6, 0x00);
	pef7071_mmd_write(phydev, 0x1e7, 0x00);

	return 0;
}

static void __init sl550x_phy_init(void)
{
	phy_register_fixup_for_uid(0xd565a400, 0xffffff00, sl550x_phy_fixup);
}

static void __init sl4501_phy_init(void)
{
	phy_register_fixup_for_uid(0xd565a408, 0xfffffff8, sl4501_phy_fixup);
}

static void __init sl4501_gpio_init(void)
{
	/* LEDC/LED_ST for LED shift register */
	gpio_set_altfunc(4, 1, 0, 1);
	gpio_set_opendrain(4, LTQ_GPIO_OD_NORMAL);
	/* LEDC/LED_D for LED shift register */
	gpio_set_altfunc(5, 1, 0, 1);
	gpio_set_opendrain(5, LTQ_GPIO_OD_NORMAL);
	/* LEDC/LED_SH for LED shift register */
	gpio_set_altfunc(6, 1, 0, 1);
	gpio_set_opendrain(6, LTQ_GPIO_OD_NORMAL);

	/* TDM/FSC as input, internal pull-up */
	gpio_set_altfunc(0, 0, 0, 0);
	gpio_set_pull(0, LTQ_GPIO_PULL_UP);
	/* TDM/DCL as input, internal pull-up */
	gpio_set_altfunc(40, 0, 0, 0);
	gpio_set_pull(40, LTQ_GPIO_PULL_UP);
	/* TDM/DI as input */
	gpio_set_altfunc(26, 0, 0, 0);
	/* TDM/DO as input */
	gpio_set_altfunc(25, 0, 0, 0);

	/* SLIC/SSIO_CLK as input */
	gpio_set_altfunc(36, 0, 1, 1);
	/* SLIC/SSIO_TX as output */
	gpio_set_altfunc(34, 0, 1, 1);
	/* SLIC/SSIO_RX as input */
	gpio_set_altfunc(35, 0, 1, 1);
	/* SLIC/CLKOUT0 as output */
	gpio_set_altfunc(8, 1, 0, 1);
}

static void __init sl550x_gpio_init(void)
{
	/* EXIN1 on GPIO1 for Lantiq IPAC-X PSB 21150 */
	gpio_set_altfunc(1, 1, 0, 0);

	/* EXIN2 on GPIO2 for Lantiq PEF7071 PHYs */
	gpio_set_altfunc(2, 0, 1, 0);
}

static void __init sl550x_setup(void)
{
	sl4501_gpio_init();
	sl550x_gpio_init();
	sl550x_phy_init();
	ifx_register_spi(NULL, spi_boardinfo_sl550x,
		ARRAY_SIZE(spi_boardinfo_sl550x));
	ifx_register_usif_spi(NULL);
	ifx_register_ledc(&ledc_hw_config);
	ifx_register_led(led_hw_config, sizeof(led_hw_config));
	ifx_register_gpio_buttons(&gpio_button_pdata);
	ifx_register_gpio_leds(&gpio_led_pdata_sl550x);
	ifx_register_stg_platform(&stg_gpio_pdata);
	ifx_register_dma();
	ifx_register_wdt();
	ifx_register_vr9_switch(&switch_data_sl550x);
	ifx_register_vmmc();
	ifx_register_usb_oc(0, &usb0_oc_data);
	ifx_register_usb_oc(1, &usb1_oc_data);
}

static void __init sl6501_setup(void)
{
	sl4501_gpio_init();
	sl550x_gpio_init();
	sl550x_phy_init();
	ifx_register_spi(NULL, spi_boardinfo_sl6501,
		ARRAY_SIZE(spi_boardinfo_sl6501));
	ifx_register_usif_spi(NULL);
	ifx_register_ledc(&ledc_hw_config);
	ifx_register_led(led_hw_config, sizeof(led_hw_config));
	ifx_register_gpio_buttons(&gpio_button_pdata);
	ifx_register_gpio_leds(&gpio_led_pdata_sl6501);
	ifx_register_stg_platform(&stg_gpio_pdata);
	ifx_register_dma();
	ifx_register_wdt();
	ifx_register_vr9_switch(&switch_data_sl6501);
	ifx_register_vmmc();
	ifx_register_usb_oc(0, &usb0_oc_data);
	ifx_register_usb_oc(1, &usb1_oc_data);
}

static void __init sl4501_setup(void)
{
	sl4501_gpio_init();
	sl4501_phy_init();
	ifx_register_spi(NULL, spi_boardinfo_sl4501,
		ARRAY_SIZE(spi_boardinfo_sl4501));
	ifx_register_ledc(&ledc_hw_config);
	ifx_register_led(led_hw_config, sizeof(led_hw_config));
	ifx_register_gpio_buttons(&gpio_button_pdata);
	ifx_register_gpio_leds(&gpio_led_pdata_sl4501);
	ifx_register_stg_platform(&stg_gpio_pdata);
	ifx_register_dma();
	ifx_register_wdt();
	ifx_register_vr9_switch(&switch_data_sl4501);
	ifx_register_vmmc();
}

MIPS_MACHINE(LTQ_MACH_SPHSL550X,
		"SPHSL550X", "Speedlink 5501", sl550x_setup);

MIPS_MACHINE(LTQ_MACH_SPHSL6501,
		"SPHSL6501", "Speedlink 6501", sl6501_setup);

MIPS_MACHINE(LTQ_MACH_SPHSL4501,
		"SPHSL4501", "Speedlink 4501", sl4501_setup);


1 Like

What is the progress on this if any? Would love to see this working.

Hi, I currently have little time to continue the project to port the SL5501 and SL6501 to Openwrt. I have already come so far that you can create a ram image, but Wlan and Lan4 do not work, the rest but already and have taken everything important from the OSC/GPL and uploaded to my Github page, link: https://github.com/tobyw121/Zyxel-SL5501-and-SL6501-openwrt

2 Likes

Let me know when the wifi is working. I need it to set up a wifi repeater.

can someone please help because I don't have time to deal with the project further .my problem is I have all the important information from the Zyxel SL5501 , can't use it in openwrt because I lack the knowledge. I need to create a clean U-boot !

all hardware information can be found here on my Github page: https://github.com/tobyw121/Zyxel-SL5501-and-SL6501-openwrt/tree/master/Device%20info-SL5501

2 Likes

This is my first post here, I just signed to OpenWRT. Among other routers I own a Speedlink 5501 and want to express my interest in getting OpenWRT running on this machine (and getting rid of the stock crippleware that's installed on it). As said, I'm very, very new to this forum, so I don't know yet how to contribute, but this might change over time.