Kernel_menuconfig "Bus support" opens wrong page

Can someone confirm this bug:

  • clone openwrt git
  • checkout branch 21.02 or master
  • install feeds
  • make menuconfig and select arm / marvel / armada xp / wrt1900ac-v1 (mamba), save
  • make kernel_menuconfig
  • enter "Bus support" menu
  • instead of PCI / PCI-E options, the page contains some option about arm errata, probably from the menu just above Bus support

Likely a bug in upstream Linux kernel

Looks like the one ARM errata item has been wrongly placed, and the remaining stuff in the menu is not relevant to us or is disabled (no ISA bus etc.)

Linux 5.4

Linux 5.10:

(It has been introduced in June 2019. The section is placed to the wrong menu:

But the PCI bus options are missing too. Armada XP does have PCI Express.

Did you look at the upstream Linux kernel source...
Not sure what you expect to find there, but the "Bus support" menu offers only this bunch of options:

menu "Bus support"

config ISA
	  Find out whether you have ISA slots on your motherboard.  ISA is the
	  name of a bus system, i.e. the way the CPU talks to the other stuff
	  inside your box.  Other bus systems are PCI, EISA, MicroChannel
	  (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
	  newer boards don't support it.  If you have ISA, say Y, otherwise N.

# Select ISA DMA controller support
config ISA_DMA
	select ISA_DMA_API

# Select ISA DMA interface
config ISA_DMA_API

	bool "BSE nanoEngine PCI support"
	depends on SA1100_NANOENGINE
	  Enable PCI on the BSE nanoEngine board.

config PCI_HOST_ITE8152
	depends on PCI && MACH_ARMCORE
	default y

config ARM_ERRATA_814220
	bool "ARM errata: Cache maintenance by set/way operations can execute out of order"
	depends on CPU_V7
	  The v7 ARM states that all cache and branch predictor maintenance
	  operations that do not specify an address execute, relative to
	  each other, in program order.
	  However, because of this erratum, an L2 set/way cache maintenance
	  operation can overtake an L1 set/way cache maintenance operation.
	  This ERRATA only affected the Cortex-A7 and present in r0p2, r0p3,
	  r0p4, r0p5.


Sorry, you're right. They moved it. PCI is now in Drivers menu.

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