Yeah, AQR is C45 only so they dont have a C22 ID.
You can confirm its ID with: mdio 9* mmd 0:1 3
IOCTL issue was fixed way back in March, I recently used tha AQR loader to test something so its still working.
Yeah, AQR is C45 only so they dont have a C22 ID.
You can confirm its ID with: mdio 9* mmd 0:1 3
IOCTL issue was fixed way back in March, I recently used tha AQR loader to test something so its still working.
mdio does seem to find it and the ID corresponds with AQR111B0:
root@OpenWrt:/# mdio 9* mmd 7:1 3
0xb612
root@OpenWrt:/# mdio 9* mmd 7:1
CTRL1(0x00): 0xa040
flags: +reset -low-power -remote-loopback -local-loopback
speed: 10g
STAT1(0x01): 0x0002
capabilities: -pias -peas +low-power
flags: -fault -link
DEVID(0x02/0x03): 0x03a1b612
SPEED(0x04): 0x6031
capabilities: -100g -40g -10g/1g -10 +100 +1000 -10-ts -2-tl +10g
DEVS(0x06/0x05): 0xe000009a
devices: +vendor2 +vendor1 +c22-ext -pma4 -pma3 -pma2 -pma1
+aneg -tc -dte-xs +phy-xs +pcs -wis +pma/pmd -c22
CTRL2(0x07): 0x0009
flags: -pias -peas
type: 10g-t
STAT2(0x08): 0xb301
capabilities: +tx-fault +rx-fault +ext-register +tx-disable +local-loopback
-10g-sr -10g-lr -10g-er -10g-lx4 -10g-sw -10g-lw -10g-ew
flags: +present -tx-fault -rx-fault
EXTABLE(0x0B): 0x40fc
capabilities: -10g-cx4 -10g-lrm +10g-t +10g-kx4 +10g-kr +1000-t
+1000-kx +100-tx -10-t +2.5g/5g-t
PKGID(0x0E/0x0F): 0x03a1b612
Great, so if the IOCTL patch is there for NSS-DP and firmware blob then it should work
Mmmh, the nss-dp patch for the IOCTL is there (0007-NSS-DP-implement-ethernet-IOCTL-s.patch
) in the source code but aq-fw-download
won't work.
I assume there is then something wrong with the device tree for eth5, would that be a possibility?
Not really, as long as netdev exists and PHY is attached to it, it should work.
Sure but since ethtool
is not working I can't be sure if linux really can see that eth5 is attached to the correct PHY.
Can you post your current DTS?
Sure, it's going to be a bit long:
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include "ipq8074.dtsi"
#include "ipq8074-ess.dtsi"
#include "ipq8074-hk-cpu.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
/ {
#address-cells = <2>;
#size-cells = <2>;
model = "Netgear RAX120v2";
compatible = "netgear,rax120v2", "qcom,ipq8074";
interrupt-parent = <&intc>;
aliases {
serial0 = &blsp1_uart5;
led-running = &led_system_white;
led-upgrade = &led_system_white;
led-internet = &led_wan_white;
label-mac-device = &dp1;
ethernet0 = &dp1;
ethernet1 = &dp2;
ethernet2 = &dp3;
ethernet3 = &dp4;
ethernet4 = &dp5;
ethernet5 = &dp6;
};
chosen {
stdout-path = "serial0";
};
keys {
compatible = "gpio-keys";
rfkill {
label = "rfkill";
gpios = <&tlmm 25 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
wps {
label = "wps";
gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
reset {
label = "reset";
gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
led_spi {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
sck-gpios = <&tlmm 18 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&tlmm 19 GPIO_ACTIVE_HIGH>;
led_gpio: led_gpio@0 {
compatible = "fairchild,74hc595";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
registers-number = <2>;
enable-gpios = <&tlmm 20 GPIO_ACTIVE_HIGH>;
spi-max-frequency = <1000000>;
};
};
leds {
compatible = "gpio-leds";
led_system_white: system-white {
label = "white:system";
gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_WHITE>;
};
led_24g_white {
label = "white:24g";
gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_WHITE>;
linux,default-trigger = "phy1radio";
};
led_5g_white {
label = "white:5g";
gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_WHITE>;
linux,default-trigger = "phy0radio";
};
led_usb1_white {
label = "white:usb0";
gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_WHITE>;
trigger-sources = <&usb3_port1>;
linux,default-trigger = "usbport";
};
led_usb2_white {
label = "white:usb1";
gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_WHITE>;
trigger-sources = <&usb3_port2>;
linux,default-trigger = "usbport";
};
led_wan_white: wan-white {
label = "white:wan";
gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_WHITE>;
};
led_aqn_green {
label = "green:aqn";
gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
};
led_aqn_red {
label = "red:aqn";
gpios = <&led_gpio 10 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
};
led_aqn_white {
label = "white:aqn";
gpios = <&led_gpio 11 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_WHITE>;
};
led_wps_white {
label = "white:wps";
gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_WHITE>;
};
};
};
&clocks {
g762_clk: fixedclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
};
&tlmm {
mdio_pins: mdio-pins {
mdc {
pins = "gpio68";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio {
pins = "gpio69";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
};
&edma {
status = "okay";
};
&mdio {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
ethphy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
ethphy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
ethphy@2 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <2>;
};
ethphy@3 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <3>;
};
ethphy@4 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <4>;
};
aqr111_7: ethernet-phy@7 {
compatible ="ethernet-phy-ieee802.3-c45";
reg = <7>;
reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
};
};
&switch {
status = "okay";
switch_lan_bmp = <0x3e>; /* lan port bitmap */
switch_wan_bmp = <0x40>; /* wan port bitmap */
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xd>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
mdio-bus = <&mdio>;
qcom,port_phyinfo {
port@1 {
port_id = <1>;
phy_address = <0>;
};
port@2 {
port_id = <2>;
phy_address = <1>;
};
port@3 {
port_id = <3>;
phy_address = <2>;
};
port@4 {
port_id = <4>;
phy_address = <3>;
};
port@5 {
port_id = <5>;
phy_address = <4>;
};
port@6 {
port_id = <6>;
phy_address = <7>;
compatible = "ethernet-phy-ieee802.3-c45";
ethernet-phy-ieee802.3-c45;
};
};
port_scheduler_resource {
port@0 {
port_id = <0>;
ucast_queue = <0 143>;
mcast_queue = <256 271>;
l0sp = <0 35>;
l0cdrr = <0 47>;
l0edrr = <0 47>;
l1cdrr = <0 7>;
l1edrr = <0 7>;
};
port@1 {
port_id = <1>;
ucast_queue = <144 159>;
mcast_queue = <272 275>;
l0sp = <36 39>;
l0cdrr = <48 63>;
l0edrr = <48 63>;
l1cdrr = <8 11>;
l1edrr = <8 11>;
};
port@2 {
port_id = <2>;
ucast_queue = <160 175>;
mcast_queue = <276 279>;
l0sp = <40 43>;
l0cdrr = <64 79>;
l0edrr = <64 79>;
l1cdrr = <12 15>;
l1edrr = <12 15>;
};
port@3 {
port_id = <3>;
ucast_queue = <176 191>;
mcast_queue = <280 283>;
l0sp = <44 47>;
l0cdrr = <80 95>;
l0edrr = <80 95>;
l1cdrr = <16 19>;
l1edrr = <16 19>;
};
port@4 {
port_id = <4>;
ucast_queue = <192 207>;
mcast_queue = <284 287>;
l0sp = <48 51>;
l0cdrr = <96 111>;
l0edrr = <96 111>;
l1cdrr = <20 23>;
l1edrr = <20 23>;
};
port@5 {
port_id = <5>;
ucast_queue = <208 223>;
mcast_queue = <288 291>;
l0sp = <52 55>;
l0cdrr = <112 127>;
l0edrr = <112 127>;
l1cdrr = <24 27>;
l1edrr = <24 27>;
};
port@6 {
port_id = <6>;
ucast_queue = <224 239>;
mcast_queue = <292 295>;
l0sp = <56 59>;
l0cdrr = <128 143>;
l0edrr = <128 143>;
l1cdrr = <28 31>;
l1edrr = <28 31>;
};
port@7 {
port_id = <7>;
ucast_queue = <240 255>;
mcast_queue = <296 299>;
l0sp = <60 63>;
l0cdrr = <144 159>;
l0edrr = <144 159>;
l1cdrr = <32 35>;
l1edrr = <32 35>;
};
};
port_scheduler_config {
port@0 {
port_id = <0>;
l1scheduler {
group@0 {
sp = <0 1>; /*L0 SPs*/
/*cpri cdrr epri edrr*/
cfg = <0 0 0 0>;
};
};
l0scheduler {
group@0 {
/*unicast queues*/
ucast_queue = <0 4 8>;
/*multicast queues*/
mcast_queue = <256 260>;
/*sp cpri cdrr epri edrr*/
cfg = <0 0 0 0 0>;
};
group@1 {
ucast_queue = <1 5 9>;
mcast_queue = <257 261>;
cfg = <0 1 1 1 1>;
};
group@2 {
ucast_queue = <2 6 10>;
mcast_queue = <258 262>;
cfg = <0 2 2 2 2>;
};
group@3 {
ucast_queue = <3 7 11>;
mcast_queue = <259 263>;
cfg = <0 3 3 3 3>;
};
};
};
port@1 {
port_id = <1>;
l1scheduler {
group@0 {
sp = <36>;
cfg = <0 8 0 8>;
};
group@1 {
sp = <37>;
cfg = <1 9 1 9>;
};
};
l0scheduler {
group@0 {
ucast_queue = <144>;
ucast_loop_pri = <16>;
mcast_queue = <272>;
mcast_loop_pri = <4>;
cfg = <36 0 48 0 48>;
};
};
};
port@2 {
port_id = <2>;
l1scheduler {
group@0 {
sp = <40>;
cfg = <0 12 0 12>;
};
group@1 {
sp = <41>;
cfg = <1 13 1 13>;
};
};
l0scheduler {
group@0 {
ucast_queue = <160>;
ucast_loop_pri = <16>;
mcast_queue = <276>;
mcast_loop_pri = <4>;
cfg = <40 0 64 0 64>;
};
};
};
port@3 {
port_id = <3>;
l1scheduler {
group@0 {
sp = <44>;
cfg = <0 16 0 16>;
};
group@1 {
sp = <45>;
cfg = <1 17 1 17>;
};
};
l0scheduler {
group@0 {
ucast_queue = <176>;
ucast_loop_pri = <16>;
mcast_queue = <280>;
mcast_loop_pri = <4>;
cfg = <44 0 80 0 80>;
};
};
};
port@4 {
port_id = <4>;
l1scheduler {
group@0 {
sp = <48>;
cfg = <0 20 0 20>;
};
group@1 {
sp = <49>;
cfg = <1 21 1 21>;
};
};
l0scheduler {
group@0 {
ucast_queue = <192>;
ucast_loop_pri = <16>;
mcast_queue = <284>;
mcast_loop_pri = <4>;
cfg = <48 0 96 0 96>;
};
};
};
port@5 {
port_id = <5>;
l1scheduler {
group@0 {
sp = <52>;
cfg = <0 24 0 24>;
};
group@1 {
sp = <53>;
cfg = <1 25 1 25>;
};
};
l0scheduler {
group@0 {
ucast_queue = <208>;
ucast_loop_pri = <16>;
mcast_queue = <288>;
mcast_loop_pri = <4>;
cfg = <52 0 112 0 112>;
};
};
};
port@6 {
port_id = <6>;
l1scheduler {
group@0 {
sp = <56>;
cfg = <0 28 0 28>;
};
group@1 {
sp = <57>;
cfg = <1 29 1 29>;
};
};
l0scheduler {
group@0 {
ucast_queue = <224>;
ucast_loop_pri = <16>;
mcast_queue = <292>;
mcast_loop_pri = <4>;
cfg = <56 0 128 0 128>;
};
};
};
port@7 {
port_id = <7>;
l1scheduler {
group@0 {
sp = <60>;
cfg = <0 32 0 32>;
};
group@1 {
sp = <61>;
cfg = <1 33 1 33>;
};
};
l0scheduler {
group@0 {
ucast_queue = <240>;
ucast_loop_pri = <16>;
mcast_queue = <296>;
cfg = <60 0 144 0 144>;
};
};
};
};
};
&soc {
dp1: dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a001000 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <0>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp2: dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a001200 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <1>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp3: dp3 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <3>;
reg = <0x3a001400 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <2>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp4: dp4 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <4>;
reg = <0x3a001600 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <3>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp5: dp5 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <5>;
reg = <0x3a001800 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <4>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp6: dp6 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <6>;
reg = <0x3a007000 0x3fff>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
phy-mode = "sgmii";
phy-handle = <&aqr111_7>;
mdio-bus = <&mdio>;
};
};
&blsp1_uart5 {
status = "okay";
};
&blsp1_i2c2 {
status = "okay";
fan: g762@3e {
compatible = "gmt,g762";
reg = <0x3e>;
clocks =<&g762_clk>;
fan_gear_mode = <0>;
fan_start = <1>;
pwm_polarity = <0>;
};
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
status = "okay";
nand@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partition@0 {
label = "0:sbl1";
reg = <0x00 0x100000>;
};
partition@100000 {
label = "0:mibib";
reg = <0x100000 0x100000>;
};
partition@200000 {
label = "0:bootconfig";
reg = <0x200000 0x80000>;
};
partition@280000 {
label = "0:bootconfig_1";
reg = <0x280000 0x80000>;
};
partition@300000 {
label = "0:qsee";
reg = <0x300000 0x300000>;
};
partition@600000 {
label = "0:qsee_1";
reg = <0x600000 0x300000>;
};
partition@900000 {
label = "0:devcfg";
reg = <0x900000 0x80000>;
};
partition@980000 {
label = "0:devcfg_1";
reg = <0x980000 0x80000>;
};
partition@a00000 {
label = "0:apdp";
reg = <0xa00000 0x80000>;
};
partition@a80000 {
label = "0:apdp_1";
reg = <0xa80000 0x80000>;
};
partition@b00000 {
label = "0:rpm";
reg = <0xb00000 0x80000>;
};
partition@b80000 {
label = "0:rpm_1";
reg = <0xb80000 0x80000>;
};
partition@c00000 {
label = "0:cdt";
reg = <0xc00000 0x80000>;
};
partition@c80000 {
label = "0:cdt_1";
reg = <0xc80000 0x80000>;
};
partition@d00000 {
label = "0:appsblenv";
reg = <0xd00000 0x80000>;
};
partition@d80000 {
label = "0:appsbl";
reg = <0xd80000 0x100000>;
};
partition@e80000 {
label = "0:appsbl_1";
reg = <0xe80000 0x100000>;
};
partition@f80000 {
label = "0:art";
reg = <0xf80000 0x80000>;
};
partition@1000000 {
label = "0:art.bak";
reg = <0x1000000 0x0080000>;
};
partition@1080000 {
label = "config";
reg = <0x1080000 0x0100000>;
};
partition@1180000 {
label = "boarddata1";
reg = <0x1180000 0x0100000>;
};
partition@1280000 {
label = "boarddata2";
reg = <0x1280000 0x0100000>;
};
partition@1380000 {
label = "pot";
reg = <0x1380000 0x0100000>;
};
partition@1480000 {
label = "dnidata";
reg = <0x1480000 0x0500000>;
};
partition@1980000 {
label = "firmware";
reg = <0x1980000 0x6400000>;
};
kernel@1980000 {
label = "kernel";
reg = <0x1980000 0x01D00000>;
};
rootfs@3680000 {
label = "rootfs";
reg = <0x3680000 0x4700000>;
};
partition@7e00000 {
label = "ethphyfw";
reg = <0x7e00000 0x0080000>;
};
partition@8100000 {
label = "cert";
reg = <0x8100000 0x0100000>;
};
partition@8200000 {
label = "mtdoops";
reg = <0x8200000 0x0080000>;
};
partition@8280000 {
label = "router_analytics";
reg = <0x8280000 0x0200000>;
};
partition@8480000 {
label = "ntgrdata";
reg = <0x8480000 0x6400000>;
};
partition@E880000 {
label = "reserved";
reg = <0xE880000 0x11780000>;
};
};
};
&qusb_phy_0 {
status = "okay";
};
&qusb_phy_1 {
status = "okay";
};
&ssphy_0 {
status = "okay";
};
&ssphy_1 {
status = "okay";
};
&usb_0 {
status = "okay";
};
&dwc_0 {
#address-cells = <1>;
#size-cells = <0>;
usb3_port2: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&usb_1 {
status = "okay";
};
&dwc_1 {
#address-cells = <1>;
#size-cells = <0>;
usb3_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&wifi{
status = "okay";
qcom,ath11k-calibration-variant = "Netgear-RAX120v2";
};
&cryptobam {
status = "okay";
};
&crypto {
status = "okay";
};
&prng {
status = "okay";
};
Yeah, DP nodes are broken, you need to pass a phandle for PHY-s, the old crappy QCA way to manually do things has been removed
Like it's done (only) for dp6
, phy-handle
?
dp6: dp6 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <6>;
reg = <0x3a007000 0x3fff>;
qcom,mactype = <1>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
phy-mode = "sgmii";
phy-handle = <&aqr111_7>;
mdio-bus = <&mdio>;
};
If not, could you point me to a device that does it? (I used the QNAP 301w as a template for dp6)
Yes, you pass the phandle for PHY via phy-handle
.
You can remove the link poll and mdio-addr as they are not used.
Thanks a million @robimarko, now it work! The 5Gbit port and ethtool
for all the ports.
root@OpenWrt:/# [ 64.473755] nss-dp 3a001200.dp2 eth1: PHY Link is down
[ 64.474044] br-lan: port 2(eth1) entered disabled state
[ 70.793717] nss-dp 3a007000.dp6 eth5: PHY Link up speed: 5000
[ 70.793804] br-lan: port 5(eth5) entered blocking state
[ 70.798453] br-lan: port 5(eth5) entered forwarding state
root@OpenWrt:/# ethtool eth5
Settings for eth5:
Supported ports: [ ]
Supported link modes: 100baseT/Half 100baseT/Full
1000baseT/Full
10000baseT/Full
1000baseKX/Full
10000baseKX4/Full
10000baseKR/Full
2500baseT/Full
5000baseT/Full
Supported pause frame use: Symmetric Receive-only
Supports auto-negotiation: Yes
Supported FEC modes: Not reported
Advertised link modes: 100baseT/Half 100baseT/Full
1000baseT/Full
10000baseT/Full
1000baseKX/Full
10000baseKX4/Full
10000baseKR/Full
2500baseT/Full
5000baseT/Full
Advertised pause frame use: Symmetric Receive-only
Advertised auto-negotiation: Yes
Advertised FEC modes: Not reported
Link partner advertised link modes: 100baseT/Full
2500baseT/Full
5000baseT/Full
Link partner advertised pause frame use: Symmetric Receive-only
Link partner advertised auto-negotiation: Yes
Link partner advertised FEC modes: Not reported
Speed: 5000Mb/s
Duplex: Full
Auto-negotiation: on
Port: MII
PHYAD: 7
Transceiver: external
Link detected: yes
I clean it up and then try add the mbn header to the firmware and flash it to the ethphyfw partition.
The 5Gbit port is now mostly works thanks to @robimarko's help.
I pushed the branch with the changes to my github OpenWrt repo, branch rax120v2-5G-port. Maybe someone with the device could give it a go?
It's @jewest code adjusted to have eth5
mostly working and ethtool
does now work for all the ports.
Limitation of the 5GbE port:
ethtool
but only 5G and 2.5G workethtool -s eth5 speed 5000
# ethtool -s eth5 speed 1000 duplex full
[ 174.313489] nss-dp 3a007000.dp6 eth5: PHY Link is down
[ 177.433632] nss-dp 3a007000.dp6 eth5: PHY Link up speed: -1
[Addition]: For the 5GbE port to work one has to upload the firmware for the AQR111B0. For it to work you have to include qca-ssdk-shell
in your build:
/lib/firmware/
. The filename for me is AQR-G3_v4.3.C-AQR_DNI_DR-EQ35AX8-R-prov1_ID23888_VER1311.cld
/lib/firmware
, the filename seems not to matter (maybe shorten it )aq-fw-download /lib/firmware/AQR-G3_v4.3.C-AQR_DNI_DR-EQ35AX8-R-prov1_ID23888_VER1311.cld eth5 7
ssdk_sh debug phy set 7 0x4004c441 0x8
@kirdes : I tried to follow your advise in how to flash the AQR firmware to the mtd but failed. What I tried:
python2 mkheader.py 0x7e00000 0x13 AQR-G3_v4.3.C-AQR_DNI_DR-EQ35AX8-R-prov1_ID23888_VER1311.cld aqr_5.5.6.mbn
and then flashed it:
nandwrite /dev/mtd27 --autoplace --pad /tmp/aqr_5.5.6.mbn
... but after reboot u-boot reports:
NAND read: device 0 offset 0x7e00000, size 0x80000
qpic_nand_read_oob: ecc failure while reading from 7e00000
NAND read from offset 7e00000 failed -74
Would you have any idea what the case could be?
Can you try to erase the partition first and use nandwrite without --autoplace and --pad option?
Without the --pad
option it won't work:
nandwrite /dev/mtd27 /tmp/aqr_5.5.6.mbn
Input file is not page-aligned. Use the padding option.
nandwrite: error!: Data was only partially written due to error
error 0 (No error information)
Can you try using mtd write (I know bad idea on nand, but actually it's SPI-NOR)
This is what zyxel is doing during the fw_upgrade (/usr/bin/fw_upgrade)
mtd -e write ...
Hi all,
Sorry for the question but its kinda hard for me to get a view on what the state of the build is from this thread for this router.
Is it at a point where its stable enough and has support for all or most feature that its worth buying?
thanks
Following:
I have 2 RAX 120 but V1 currently in use as as APs, facilitated by Netgear's "VLAN by tag group" and using the 5G port as trunk but there are lots of limitations in this work around.
They'll likely continue in service as APs but I'll like to have OpenWrt on them instead due to real VLAN support in OpenWrt and the horrible limitations in my "VLAN by tag group workaround.
When the state of the build becomes reasonably reliable, I'll be prepared to flash on my RAX 120 V1 at the risk of ending up with a brick
Do not even try, v1 SoC is completely unsupported upstream and ath11k will never support it
Thanks for the reply @robimarko, not sure what do with the units if OpenWrt won't be supported someday