Zyxel (spharion) 5501(=VMG8546-D70A) + 6501 . Anyone has tried to launch OpenWrt on that?

can someone do something with it to port to openwrt ?


sl550x.h

/*
 * This file is released under the terms of GPL v2 and any later version.
 * See the file COPYING in the root directory of the source tree for details.
 *
 * Copyright (C) 2012-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
 */

#ifndef __CONFIG_H
#define __CONFIG_H

#define CONFIG_MACH_TYPE	"SPHSL550X"
#define CONFIG_IDENT_STRING	" "CONFIG_MACH_TYPE
#define CONFIG_BOARD_NAME	"Sphairon Speedlink 4501/5501/6501 IAD"

/* Configure SoC */
#define CONFIG_LTQ_SUPPORT_UART		/* Enable ASC and UART */

#define CONFIG_LTQ_SUPPORT_ETHERNET	/* Enable ethernet */

#define CONFIG_LTQ_SSIO_SHIFT_REGS	1
#define CONFIG_LTQ_SSIO_EDGE_FALLING
#define CONFIG_LTQ_SSIO_GPHY1_MODE	0x3
#define CONFIG_LTQ_SSIO_GPHY2_MODE	0x3
#define CONFIG_LTQ_SSIO_INIT_VALUE	0x0

#define CONFIG_LTQ_SUPPORT_SPI_FLASH
#define CONFIG_SPI_FLASH_MACRONIX	/* Supports MX29LV620 serial flash */
#define CONFIG_SPI_FLASH_SPANSION	/* Supports SF25FL256S serial flash */
#define CONFIG_SPI_FLASH_EON		/* Supports EN25QH256 serial flash */
#define CONFIG_SPI_FLASH_4BYTE_MODE

#define CONFIG_LTQ_SUPPORT_NAND_FLASH

#define CONFIG_LTQ_SUPPORT_SPL_SPI_FLASH	/* Build SPI flash SPL */
#define CONFIG_SPL_SPI_BUS		0
#define CONFIG_SPL_SPI_CS		4
#define CONFIG_SPL_SPI_MAX_HZ		25000000
#define CONFIG_SPL_SPI_MODE		0
#define CONFIG_LTQ_SPL_COMP_LZO
#define CONFIG_LTQ_SPL_CONSOLE

/* MTD devices */
#define CONFIG_MTD_DEVICE
#define CONFIG_MTD_PARTITIONS
#define CONFIG_SPI_FLASH_MTD
#define CONFIG_CMD_MTD
#define MTDIDS_DEFAULT			"nor0=spi0.4,nand0=nand-xway"

/* Environment */
#define CONFIG_ENV_SPI_BUS		CONFIG_SPL_SPI_BUS
#define CONFIG_ENV_SPI_CS		CONFIG_SPL_SPI_CS
#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SPL_SPI_MAX_HZ
#define CONFIG_ENV_SPI_MODE		CONFIG_SPL_SPI_MODE

#if defined(CONFIG_SYS_BOOT_SFSPL)
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_OVERWRITE
#define CONFIG_ENV_OFFSET		(512 * 1024)
#define CONFIG_ENV_SECT_SIZE		(256 * 1024)

#define MTDPARTS_DEFAULT		\
	"mtdparts=spi0.4:512k(uboot_fix),256k(uboot_cfg)"
#else
#define CONFIG_ENV_IS_NOWHERE

#define MTDPARTS_DEFAULT		"mtdparts="
#endif

#define CONFIG_ENV_SIZE			(8 * 1024)

#define CONFIG_LOADADDR			CONFIG_SYS_LOAD_ADDR

/* Console */
#define CONFIG_LTQ_ADVANCED_CONSOLE
#define CONFIG_BAUDRATE			115200
#define CONFIG_CONSOLE_ASC		1
#define CONFIG_CONSOLE_DEV		"ttyLTQ1"

/* Commands */
#define CONFIG_CMD_PING

/* Pull in default board configs for Lantiq XWAY VRX200 */
#include <asm/lantiq/config.h>
#include <asm/arch/config.h>

/* Pull in additional Sphairon board config options */
#include <configs/sphairon_env.h>

#define CONFIG_ENV_UPDATE_UBOOT_SF					\
	"update-uboot-sf=run load-uboot-sfspl-lzo write-uboot-sf\0"

#define CONFIG_EXTRA_ENV_SETTINGS	\
	CONFIG_ENV_LANTIQ_DEFAULTS	\
	CONFIG_ENV_UPDATE_UBOOT_SF	\
	CONFIG_ENV_SPHAIRON_GENERIC

/* Default flash layout */
#define CONFIG_SPHAIRON_FLASHLAYOUT	"pss"
#define CONFIG_SPHAIRON_NO_UBOOT_UPDATE

#endif /* __CONFIG_H */


sl550x.c

/*
 * This file is released under the terms of GPL v2 and any later version.
 * See the file COPYING in the root directory of the source tree for details.
 *
 * Copyright (C) 2012-2013 Daniel Schwierzeck, daniel.schwierzeck@gmail.com
 */

#include <common.h>
#include <spi.h>
#include <asm/gpio.h>
#include <asm/lantiq/eth.h>
#include <asm/lantiq/chipid.h>
#include <asm/lantiq/cpu.h>
#include <asm/arch/gphy.h>
#include <sas/controlfile.h>
#include <sas/etl.h>

#if defined(CONFIG_SPL_BUILD)
#define do_gpio_init	1
#define do_pll_init	1
#define do_dcdc_init	0
#elif defined(CONFIG_SYS_BOOT_RAM)
#define do_gpio_init	1
#define do_pll_init	0
#define do_dcdc_init	1
#else
#define do_gpio_init	0
#define do_pll_init	0
#define do_dcdc_init	1
#endif

static inline void gpio_init(void)
{
	/* GPIO button WLAN enable (low-active) */
	gpio_direction_input(45);
	/* GPIO button WPS enable (low-active) */
	gpio_direction_input(46);
	/* GPIO button board reset (low-active) */
	gpio_direction_input(47);

	/* LED Power green */
	gpio_direction_output(3, 1);
	/* LED FXO green */
	gpio_direction_output(14, 0);
	/* LED Power red */
	gpio_direction_output(19, 0);
	/* LED Info green */
	gpio_direction_output(20, 1);
	/* LED Info red */
	gpio_direction_output(21, 1);
	/* LED Internet green */
	gpio_direction_output(27, 1);
	/* LED Internet red */
	gpio_direction_output(28, 1);
	/* LED WLAN green */
	gpio_direction_output(29, 1);
	/* LED WPS green */
	gpio_direction_output(30, 1);
	/* LED USB2 green */
	gpio_direction_output(32, 1);

	/* SPI CS 0.4 to serial flash */
	gpio_direction_output(10, 1);

	/* SPI CS 1.0 to ISAC-SX */
	gpio_direction_output(39, 1);
	/* SPI CS 1.1 to IPAC-X FXO */
	gpio_direction_output(22, 1);

	/* USB port0 power enable, disabled at startup */
	gpio_direction_output(41, 0);
	/* USB port1 power enable, disabled at startup */
	gpio_direction_output(33, 0);

	/* EBU.FL_CS1 as output for NAND CE */
	gpio_set_altfunc(23, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);
	/* EBU.FL_A23 as output for NAND CLE */
	gpio_set_altfunc(24, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);
	/* EBU.FL_A24 as output for NAND ALE */
	gpio_set_altfunc(13, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);
	/* GPIO 3.0 as input for NAND Ready Busy */
	gpio_set_altfunc(48, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_IN);
	/* GPIO 3.1 as output for NAND Read */
	gpio_set_altfunc(49, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);

	/* LEDC/LED_ST for LED shift register */
	gpio_set_altfunc(4, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);
	/* LEDC/LED_D for LED shift register */
	gpio_set_altfunc(5, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);
	/* LEDC/LED_SH for LED shift register */
	gpio_set_altfunc(6, GPIO_ALTSEL_SET, GPIO_ALTSEL_CLR, GPIO_DIR_OUT);

	/* Ralink iNIC WLAN reset, low-active, asserted at startup */
	gpio_direction_output(15, 0);
	/* Ralink iNIC WLAN power, disabled at startup */
	gpio_direction_output(37, 0);

	/* TDM/FSC as input, internal pull-up */
	gpio_direction_input(0);
	gpio_set_pull(0, GPIO_PULL_UP);
	/* TDM/DCL as input, internal pull-up */
	gpio_direction_input(40);
	gpio_set_pull(40, GPIO_PULL_UP);
	/* TDM/DI as input */
	gpio_direction_input(26);
	/* TDM/DO as input */
	gpio_direction_input(25);
}

int board_early_init_f(void)
{
	if (do_gpio_init) {
		ltq_gpio_init();
		gpio_init();
	}

	if (do_pll_init)
		ltq_pll_init();

	if (do_dcdc_init)
		ltq_dcdc_init(0x7F);

	return 0;
}

int checkboard(void)
{
	puts("Board: " CONFIG_BOARD_NAME "\n");
	ltq_chip_print_info();

	return 0;
}

static const struct ltq_eth_port_config eth_port_sl4501[] = {
	/* GMAC0: unused */
	{ 0, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC1: unused */
	{ 1, 0x1, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC2: internal GPHY0 with 10/100/1000 firmware for LAN port 1 */
	{ 2, 0x11, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_GMII },
	/* GMAC3: unused */
	{ 3, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC4: internal GPHY0 with 10/100/1000 firmware for LAN port 2 */
	{ 4, 0x13, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_GMII },
	/* GMAC5: Ralink iNIC */
	{ 5, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
};

static const struct ltq_eth_board_config eth_board_sl4501 = {
	.ports = eth_port_sl4501,
	.num_ports = ARRAY_SIZE(eth_port_sl4501),
};

static const struct ltq_eth_port_config eth_port_sl5501[] = {
	/* GMAC0: external Lantiq PEF7071 10/100/1000 PHY for WANoE port */
	{ 0, 0x0, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_RGMII },
	/* GMAC1: external Lantiq PEF7071 10/100/1000 PHY for LAN port 3/4 */
	{ 1, 0x1, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_RGMII },
	/* GMAC2: internal GPHY1 with 10/100 firmware for LAN port 1/2 */
	{ 2, 0x11, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_MII },
	/* GMAC3: internal GPHY0 with 10/100 firmware for LAN port 1/2 */
	{ 3, 0x12, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_MII },
	/* GMAC4: internal GPHY0 with 10/100/1000 firmware for LAN port 3/4 */
	{ 4, 0x13, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_GMII },
	/* GMAC5: Ralink iNIC */
	{ 5, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
};

static const struct ltq_eth_board_config eth_board_sl5501 = {
	.ports = eth_port_sl5501,
	.num_ports = ARRAY_SIZE(eth_port_sl5501),
};

static const struct ltq_eth_port_config eth_port_sl6501[] = {
	/* GMAC0: unused */
	{ 0, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC1: external Lantiq PEF7071 10/100/1000 PHY for LAN port 3/4 */
	{ 1, 0x1, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_RGMII },
	/* GMAC2: internal GPHY1 with 10/100 firmware for LAN port 1/2 */
	{ 2, 0x11, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_MII },
	/* GMAC3: internal GPHY0 with 10/100 firmware for LAN port 1/2 */
	{ 3, 0x12, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_MII },
	/* GMAC4: internal GPHY0 with 10/100/1000 firmware for LAN port 3/4 */
	{ 4, 0x13, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_GMII },
	/* GMAC5: Ralink iNIC */
	{ 5, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
};

static const struct ltq_eth_board_config eth_board_sl6501 = {
	.ports = eth_port_sl6501,
	.num_ports = ARRAY_SIZE(eth_port_sl6501),
};

static const struct ltq_eth_port_config eth_port_compat[] = {
	/* GMAC0: unused */
	{ 0, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC1: unused */
	{ 1, 0x1, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC2: unused */
	{ 2, 0x11, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC3: unused */
	{ 3, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
	/* GMAC4: internal GPHY0 with 10/100/1000 firmware for LAN port 2 */
	{ 4, 0x13, LTQ_ETH_PORT_PHY, PHY_INTERFACE_MODE_GMII },
	/* GMAC5: Ralink iNIC */
	{ 5, 0x0, LTQ_ETH_PORT_NONE, PHY_INTERFACE_MODE_NONE },
};

static const struct ltq_eth_board_config eth_board_compat = {
	.ports = eth_port_compat,
	.num_ports = ARRAY_SIZE(eth_port_compat),
};

int board_eth_init(bd_t * bis)
{
	const enum ltq_gphy_clk clk = LTQ_GPHY_CLK_25MHZ_PLL0;
	const ulong fw_ge_addr = 0x80FE0000;
	const ulong fw_fe_addr = 0x80FF0000;
	unsigned int base_platform = sas_etl_base_platform();

	ltq_gphy_phy11g_a2x_load(fw_ge_addr);
	ltq_gphy_phy22f_a2x_load(fw_fe_addr);

	ltq_cgu_gphy_clk_src(clk);

	switch (base_platform) {
	case 425:
		ltq_rcu_gphy_boot(0, fw_ge_addr);
		ltq_rcu_gphy_boot(1, fw_ge_addr);
		return ltq_eth_initialize(&eth_board_sl4501);
	case 420:
		ltq_rcu_gphy_boot(0, fw_fe_addr);
		ltq_rcu_gphy_boot(1, fw_ge_addr);
		return ltq_eth_initialize(&eth_board_sl5501);
	case 424:
		ltq_rcu_gphy_boot(0, fw_fe_addr);
		ltq_rcu_gphy_boot(1, fw_ge_addr);
		return ltq_eth_initialize(&eth_board_sl6501);
	default:
		ltq_rcu_gphy_boot(1, fw_ge_addr);
		return ltq_eth_initialize(&eth_board_compat);
	}
}

int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
	if (bus)
		return 0;

	if (cs == 4)
		return 1;

	return 0;
}

void spi_cs_activate(struct spi_slave *slave)
{
	int gpio = -1;

	/* Serial flash at bus 0 (SPI) */
	if (slave->bus == 0 && slave->cs == 4)
		gpio = 10;

	if (gpio >= 0)
		gpio_set_value(gpio, 0);
}

void spi_cs_deactivate(struct spi_slave *slave)
{
	int gpio = -1;

	/* Serial flash at bus 0 (SPI) */
	if (slave->bus == 0 && slave->cs == 4)
		gpio = 10;

	if (gpio >= 0)
		gpio_set_value(gpio, 1);
}

int sas_cf_check_board(void)
{
	/* check if reset button is pressed */
	return 0 == gpio_get_value(47);
}

void sas_cf_led_action(enum sas_cf_state state)
{
	switch (state) {
	case CF_STARTED:
		/* LED Power green on */
		gpio_direction_output(3, 0);
		break;
	case CF_FINISHED:
		/* LED Power green off */
		gpio_direction_output(3, 1);
		break;
	case CF_FAILED:
		/* LED Info red on */
		gpio_direction_output(21, 0);
		/* LED Power green off */
		gpio_direction_output(3, 0);
		break;
	}
	return;
}


mach-sphsl550x.c

/*
 *   This program is free software; you can redistribute it and/or modify
 *   it under the terms of the GNU General Public License as published by
 *   the Free Software Foundation; either version 2 of the License, or
 *   (at your option) any later version.
 *
 *   This program is distributed in the hope that it will be useful,
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *   GNU General Public License for more details.
 *
 *   You should have received a copy of the GNU General Public License
 *   along with this program; if not, write to the Free Software
 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
 *
 *   Copyright (C) 2012-2014 Daniel Schwierzeck <daniel.schwierzeck@sphairon.com>
 */

#include <linux/spi/spi.h>
#include <linux/interrupt.h>
#include <linux/gpio.h>
#include <linux/gpio_buttons.h>
#include <linux/input.h>
#include <asm/mips_machine.h>
#include <asm/ifx/machtypes.h>

#include <ifx_devices.h>
#include <ifx_led.h>
#include <ifx_ledc.h>
#include <lantiq_spi.h>
#include <pef7071.h>

static struct ltq_spi_controller_data spi_cdata_m25p80 = {
	.gpio = 10,
};

static struct ltq_spi_controller_data spi_cdata_psb21150_fxs = {
	.gpio = 39,
};

static struct ltq_spi_controller_data spi_cdata_psb21150_fxo = {
	.gpio = 22,
};

static const struct peb3086_platform_data psb21150_pdata_fxs = {
	.irq_flags = IRQF_TRIGGER_LOW,
	.iom2_chan = 0,
	.mode = MODE_LTS,
	.dps = 1,
};

static const struct peb3086_platform_data psb21150_pdata_fxo = {
	.irq_flags = IRQF_TRIGGER_LOW,
	.iom2_chan = 1,
	.mode = MODE_TE,
	.pwr_src_pin = 1,
};

static struct spi_board_info spi_boardinfo_sl550x[] __initdata = {
	{
		.modalias = "m25p80",	/* SPI flash */
		.bus_num = 0,
		.chip_select = 4,
		.mode = SPI_MODE_0,
		.max_speed_hz = 25000000,
		.controller_data = &spi_cdata_m25p80,
	},
	{
		.modalias = "psb21150",	/* IPAC-X PSB 21150 FXS */
		.bus_num = 1,
		.chip_select = 0,
		.mode = SPI_MODE_3,
		.max_speed_hz = 1000000,
		.platform_data = &psb21150_pdata_fxs,
		.controller_data = &spi_cdata_psb21150_fxs,
		.irq = IFX_EIU_IR1,	/* EXIN1 on GPIO1 */
	},
};

static struct spi_board_info spi_boardinfo_sl6501[] __initdata = {
	{
		.modalias = "m25p80",	/* SPI flash */
		.bus_num = 0,
		.chip_select = 4,
		.mode = SPI_MODE_0,
		.max_speed_hz = 25000000,
		.controller_data = &spi_cdata_m25p80,
	},
	{
		.modalias = "psb21150",	/* IPAC-X PSB 21150 FXS */
		.bus_num = 1,
		.chip_select = 0,
		.mode = SPI_MODE_3,
		.max_speed_hz = 1000000,
		.platform_data = &psb21150_pdata_fxs,
		.controller_data = &spi_cdata_psb21150_fxs,
		.irq = IFX_EIU_IR1,	/* EXIN1 on GPIO1 */
	},
	{
		.modalias = "psb21150",	/* IPAC-X PSB 21150 FXO */
		.bus_num = 1,
		.chip_select = 1,
		.mode = SPI_MODE_3,
		.max_speed_hz = 1000000,
		.platform_data = &psb21150_pdata_fxo,
		.controller_data = &spi_cdata_psb21150_fxo,
		.irq = IFX_EIU_IR1,	/* EXIN1 on GPIO1 */
	},
};

static struct spi_board_info spi_boardinfo_sl4501[] __initdata = {
	{
		.modalias = "m25p80",	/* SPI flash */
		.bus_num = 0,
		.chip_select = 4,
		.mode = SPI_MODE_0,
		.max_speed_hz = 25000000,
		.controller_data = &spi_cdata_m25p80,
	},
};

static struct gpio_button gpio_buttons[] = {
	/* Reset */
	{
		.gpio = 47,
		.active_low = 1,
		.desc = "reset-btn",
		.type = EV_KEY,
		.code = BTN_0,
		.threshold = 0,
	},
	/* WLAN */
	{
		.gpio = 45,
		.active_low = 1,
		.desc = "wlan-btn",
		.type = EV_KEY,
		.code = BTN_1,
		.threshold = 0,
	},
	/* WPS */
	{
		.gpio = 46,
		.active_low = 1,
		.desc = "wps-btn",
		.type = EV_KEY,
		.code = BTN_2,
		.threshold = 0,
	},
};

static struct gpio_buttons_platform_data gpio_button_pdata __initdata = {
	.buttons = gpio_buttons,
	.nbuttons = ARRAY_SIZE(gpio_buttons),
	.poll_interval = 101,
};

static const struct stg_gpio_config stg_gpios[] = {
	{
		.name = "wlan-pwr",
		.gpio = 37,
		.active_low = 0,
		.default_state = STG_GPIO_DEFSTATE_OFF,
	},
	{
		.name = "wlan-rst",
		.gpio = 15,
		.active_low = 1,
		.default_state = STG_GPIO_DEFSTATE_ON,
	},
	{
		.name = "slic-rst",
		.gpio = 31,
		.active_low = 1,
		.default_state = STG_GPIO_DEFSTATE_ON,
	},
};

static struct stg_platform_data stg_gpio_pdata __initdata = {
	.gpios = stg_gpios,
	.gpio_num = ARRAY_SIZE(stg_gpios),
};

static struct ifx_ledc_config_param ledc_hw_config = {
	.operation_mask = IFX_LEDC_CFG_OP_UPDATE_SOURCE |
				IFX_LEDC_CFG_OP_BLINK |
				IFX_LEDC_CFG_OP_UPDATE_CLOCK |
				IFX_LEDC_CFG_OP_STORE_MODE |
				IFX_LEDC_CFG_OP_SHIFT_CLOCK |
				IFX_LEDC_CFG_OP_DATA_OFFSET |
				IFX_LEDC_CFG_OP_NUMBER_OF_LED |
				IFX_LEDC_CFG_OP_DATA |
				IFX_LEDC_CFG_OP_MIPS0_ACCESS |
				IFX_LEDC_CFG_OP_DATA_CLOCK_EDGE,
	.source_mask = (1 << 8) - 1,
	.source = (1 << IFX_LED_EXT_SRC_GPHY1_LED0) |
			(1 << IFX_LED_EXT_SRC_GPHY1_LED1) |
			(1 << IFX_LED_EXT_SRC_GPHY0_LED0) |
			(1 << IFX_LED_EXT_SRC_GPHY0_LED1),
	.blink_mask = (1 << 8) - 1,
	.blink = 0,
	.update_clock = LED_CON1_UPDATE_SRC_GPT,
	.fpid = 8 * 16 * 4,	/* 8 pins * 16 Hz * 4 */
	.store_mode = 0,
	.fpis = 0,
	.data_offset = 0,
	.number_of_enabled_led = 8,
	.data_mask = (1 << 8) - 1,
	.data = 0,
	.mips0_access_mask = (1 << 8) - 1,
	.mips0_access = (1 << 8) - 1,
	.f_data_clock_on_rising = 0,
};

static struct ifx_led_device led_hw_config[] = {
	{
		.name			= "green:phone",
		.phys_id		= 7,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
	{
		.name			= "red:phone",
		.phys_id		= 4,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
#if 0
	{
		.name			= "green:lan3",
		.phys_id		= 6,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
	{
		.name			= "green:lan1",
		.phys_id		= 3,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
	{
		.name			= "green:lan2",
		.phys_id		= 2,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
#endif
	{
		.name			= "green:usb1",
		.phys_id		= 1,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
	{
		.name			= "green:dsl-led1",
		.phys_id		= 0,
		.value_on		= 1,
		.value_off		= 0,
		.flags			= IFX_LED_DEVICE_FLAG_PHYS_LEDC,
	},
	{
		.flags			= IFX_LED_DEVICE_FLAG_INVALID,
	}
};

static struct gpio_led gpio_leds_sl550x[] = {
	{
		.name = "green:power",
		.gpio = 3,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:power",
		.gpio = 19,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_ON,
	},
	{
		.name = "green:info",
		.gpio = 20,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:info",
		.gpio = 21,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:wlan",
		.gpio = 29,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:wps",
		.gpio = 30,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:web",
		.gpio = 27,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:web",
		.gpio = 28,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:usb2",
		.gpio = 32,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
};

static struct gpio_led gpio_leds_sl6501[] = {
	{
		.name = "green:power",
		.gpio = 3,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:power",
		.gpio = 19,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_ON,
	},
	{
		.name = "green:info",
		.gpio = 20,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:info",
		.gpio = 21,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:wlan",
		.gpio = 29,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:wps",
		.gpio = 30,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:web",
		.gpio = 27,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:web",
		.gpio = 28,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:usb2",
		.gpio = 32,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:fxo",
		.gpio = 14,
		.active_low = 0,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
};

static struct gpio_led gpio_leds_sl4501[] = {
	{
		.name = "green:power",
		.gpio = 3,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:power",
		.gpio = 19,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_ON,
	},
	{
		.name = "green:info",
		.gpio = 20,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:info",
		.gpio = 21,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:wlan",
		.gpio = 29,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:wps",
		.gpio = 30,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "green:web",
		.gpio = 27,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
	{
		.name = "red:web",
		.gpio = 28,
		.active_low = 1,
		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
	},
};

static struct gpio_led_platform_data gpio_led_pdata_sl550x __initdata = {
	.leds = gpio_leds_sl550x,
	.num_leds = ARRAY_SIZE(gpio_leds_sl550x),
};

static struct gpio_led_platform_data gpio_led_pdata_sl6501 __initdata = {
	.leds = gpio_leds_sl6501,
	.num_leds = ARRAY_SIZE(gpio_leds_sl6501),
};

static struct gpio_led_platform_data gpio_led_pdata_sl4501 __initdata = {
	.leds = gpio_leds_sl4501,
	.num_leds = ARRAY_SIZE(gpio_leds_sl4501),
};

static struct xway_switch_phy xmii0_phy_ge = {
	.interface = PHY_INTERFACE_MODE_RGMII,
	.irq = IFX_EIU_IR2,
	.irq_flags = IRQF_TRIGGER_LOW,
	.addr = 0x0,
};

static struct xway_switch_phy xmii1_phy_ge = {
	.interface = PHY_INTERFACE_MODE_RGMII,
	.irq = IFX_EIU_IR2,
	.irq_flags = IRQF_TRIGGER_LOW,
	.addr = 0x1,
};

static struct xway_switch_phy gphy0_fe0 = {
	.interface = PHY_INTERFACE_MODE_MII,
	.irq = INT_NUM_IM3_IRL18,
	.addr = 0x11,
};

static struct xway_switch_phy gphy0_fe1 = {
	.interface = PHY_INTERFACE_MODE_MII,
	.irq = INT_NUM_IM3_IRL18,
	.addr = 0x12,
};

static struct xway_switch_phy gphy0_ge = {
	.interface = PHY_INTERFACE_MODE_GMII,
	.irq = INT_NUM_IM3_IRL18,
	.addr = 0x11,
};

static struct xway_switch_phy gphy1_ge = {
	.interface = PHY_INTERFACE_MODE_GMII,
	.irq = INT_NUM_IM3_IRL17,
	.addr = 0x13,
};

static struct xway_switch_mac xmii2_mac_ge = {
	.interface = PHY_INTERFACE_MODE_RGMII,
	.speed = SPEED_1000,
	.duplex = DUPLEX_FULL,
};

static struct xway_switch_xmii switch_xmii_sl550x[] = {
	{
		.dev_name = "sw-p0-wanoe",
		.ppid = 0,
		.phy = &xmii0_phy_ge,
	},
	{
		.dev_name = "sw-p1-lan4",
		.ppid = 1,
		.phy = &xmii1_phy_ge,
	},
	{
		.dev_name = "sw-p5-wifi",
		.ppid = 5,
		.rgmii_tx_delay = 3,
		.mac = &xmii2_mac_ge,
	},
};

static struct xway_switch_xmii switch_xmii_sl6501[] = {
	{
		.dev_name = "sw-p1-lan4",
		.ppid = 1,
		.phy = &xmii1_phy_ge,
	},
	{
		.dev_name = "sw-p5-wifi",
		.ppid = 5,
		.rgmii_tx_delay = 3,
		.mac = &xmii2_mac_ge,
	},
};

static struct xway_switch_xmii switch_xmii_sl4501[] = {
	{
		.dev_name = "sw-p5-wifi",
		.ppid = 5,
		.rgmii_tx_delay = 3,
		.mac = &xmii2_mac_ge,
	},
};

static struct xway_switch_gphy switch_gphy_sl550x[] = {
	{
		.dev_name = "sw-p2-lan1",
		.ppid = 2,
		.phy = &gphy0_fe0,
	},
	{
		.dev_name = "sw-p3-lan2",
		.ppid = 3,
		.phy = &gphy0_fe1,
	},
	{
		.dev_name = "sw-p4-lan3",
		.ppid = 4,
		.phy = &gphy1_ge,
	},
};

static struct xway_switch_gphy switch_gphy_sl4501[] = {
	{
		.dev_name = "sw-p2-lan1",
		.ppid = 2,
		.phy = &gphy0_ge,
	},
	{
		.dev_name = "sw-p4-lan2",
		.ppid = 4,
		.phy = &gphy1_ge,
	},
};

static struct xway_switch_gphy_core switch_gphy_core_sl550x[] = {
	{
		.mode = GPHY_22F,
		.id = 0,
	},
	{
		.mode = GPHY_11G,
		.id = 1,
	},
};

static struct xway_switch_gphy_core switch_gphy_core_sl4501[] = {
	{
		.mode = GPHY_11G,
		.id = 0,
	},
	{
		.mode = GPHY_11G,
		.id = 1,
	},
};

static struct xway_switch_data switch_data_sl550x = {
	.xmii = switch_xmii_sl550x,
	.num_xmii = ARRAY_SIZE(switch_xmii_sl550x),
	.gphy = switch_gphy_sl550x,
	.num_gphy = ARRAY_SIZE(switch_gphy_sl550x),
	.gphy_core = switch_gphy_core_sl550x,
	.num_gphy_core = ARRAY_SIZE(switch_gphy_core_sl550x),
};

static struct xway_switch_data switch_data_sl6501 = {
	.xmii = switch_xmii_sl6501,
	.num_xmii = ARRAY_SIZE(switch_xmii_sl6501),
	.gphy = switch_gphy_sl550x,
	.num_gphy = ARRAY_SIZE(switch_gphy_sl550x),
	.gphy_core = switch_gphy_core_sl550x,
	.num_gphy_core = ARRAY_SIZE(switch_gphy_core_sl550x),
};

static struct xway_switch_data switch_data_sl4501 = {
	.xmii = switch_xmii_sl4501,
	.num_xmii = ARRAY_SIZE(switch_xmii_sl4501),
	.gphy = switch_gphy_sl4501,
	.num_gphy = ARRAY_SIZE(switch_gphy_sl4501),
	.gphy_core = switch_gphy_core_sl4501,
	.num_gphy_core = ARRAY_SIZE(switch_gphy_core_sl4501),
};

static struct sph_usb_oc_data usb0_oc_data = {
	.oc_irq = IFX_USB0_OCIR,
	.port_power_gpio = {
		.name = "usb0-pwr",
		.gpio = 41,
		.active_low = 0,
		.default_state = STG_GPIO_DEFSTATE_OFF,
	},
};

static struct sph_usb_oc_data usb1_oc_data = {
	.oc_irq = IFX_USB1_OCIR,
	.port_power_gpio = {
		.name = "usb1-pwr",
		.gpio = 33,
		.active_low = 0,
		.default_state = STG_GPIO_DEFSTATE_OFF,
	},
};

static int sl550x_phy_fixup(struct phy_device *phydev)
{
	unsigned int led0h = 0, led0l = 0, led1h = 0, led1l = 0;

	pr_info("%s: phydev->addr %0x\n", __func__, phydev->addr);

	switch (phydev->addr) {
	case 0x00:
	case 0x01:
		led0h = 0x70;
		led0l = 0x03;
		break;
	case 0x11:
	/*
	 *  case 0x12: both FE PHYs share the same LED interface thus only one
	 *      	setup is necessary
	 */
		/* FE PHY0 works on LED0 */
		led0h = 0x30;
		led0l = 0x03;
		/* FE PHY1 works on LED1 */
		led1h = 0x30;
		led1l = 0x03;
		break;
	case 0x13:
		led0h = 0x70;
		led0l = 0x03;
		break;
	default:
		return 0;
	}

	/* LED0 */
	pef7071_mmd_write(phydev, 0x1e2, led0h);
	pef7071_mmd_write(phydev, 0x1e3, led0l);

	/* LED1 */
	pef7071_mmd_write(phydev, 0x1e4, led1h);
	pef7071_mmd_write(phydev, 0x1e5, led1l);

	/* LED2 */
	pef7071_mmd_write(phydev, 0x1e6, 0x00);
	pef7071_mmd_write(phydev, 0x1e7, 0x00);

	return 0;
}

static int sl4501_phy_fixup(struct phy_device *phydev)
{
	pr_info("%s: phydev->addr %0x\n", __func__, phydev->addr);

	/* LED0 */
	pef7071_mmd_write(phydev, 0x1e2, 0x70);
	pef7071_mmd_write(phydev, 0x1e3, 0x03);

	/* LED1 */
	pef7071_mmd_write(phydev, 0x1e4, 0x00);
	pef7071_mmd_write(phydev, 0x1e5, 0x00);

	/* LED2 */
	pef7071_mmd_write(phydev, 0x1e6, 0x00);
	pef7071_mmd_write(phydev, 0x1e7, 0x00);

	return 0;
}

static void __init sl550x_phy_init(void)
{
	phy_register_fixup_for_uid(0xd565a400, 0xffffff00, sl550x_phy_fixup);
}

static void __init sl4501_phy_init(void)
{
	phy_register_fixup_for_uid(0xd565a408, 0xfffffff8, sl4501_phy_fixup);
}

static void __init sl4501_gpio_init(void)
{
	/* LEDC/LED_ST for LED shift register */
	gpio_set_altfunc(4, 1, 0, 1);
	gpio_set_opendrain(4, LTQ_GPIO_OD_NORMAL);
	/* LEDC/LED_D for LED shift register */
	gpio_set_altfunc(5, 1, 0, 1);
	gpio_set_opendrain(5, LTQ_GPIO_OD_NORMAL);
	/* LEDC/LED_SH for LED shift register */
	gpio_set_altfunc(6, 1, 0, 1);
	gpio_set_opendrain(6, LTQ_GPIO_OD_NORMAL);

	/* TDM/FSC as input, internal pull-up */
	gpio_set_altfunc(0, 0, 0, 0);
	gpio_set_pull(0, LTQ_GPIO_PULL_UP);
	/* TDM/DCL as input, internal pull-up */
	gpio_set_altfunc(40, 0, 0, 0);
	gpio_set_pull(40, LTQ_GPIO_PULL_UP);
	/* TDM/DI as input */
	gpio_set_altfunc(26, 0, 0, 0);
	/* TDM/DO as input */
	gpio_set_altfunc(25, 0, 0, 0);

	/* SLIC/SSIO_CLK as input */
	gpio_set_altfunc(36, 0, 1, 1);
	/* SLIC/SSIO_TX as output */
	gpio_set_altfunc(34, 0, 1, 1);
	/* SLIC/SSIO_RX as input */
	gpio_set_altfunc(35, 0, 1, 1);
	/* SLIC/CLKOUT0 as output */
	gpio_set_altfunc(8, 1, 0, 1);
}

static void __init sl550x_gpio_init(void)
{
	/* EXIN1 on GPIO1 for Lantiq IPAC-X PSB 21150 */
	gpio_set_altfunc(1, 1, 0, 0);

	/* EXIN2 on GPIO2 for Lantiq PEF7071 PHYs */
	gpio_set_altfunc(2, 0, 1, 0);
}

static void __init sl550x_setup(void)
{
	sl4501_gpio_init();
	sl550x_gpio_init();
	sl550x_phy_init();
	ifx_register_spi(NULL, spi_boardinfo_sl550x,
		ARRAY_SIZE(spi_boardinfo_sl550x));
	ifx_register_usif_spi(NULL);
	ifx_register_ledc(&ledc_hw_config);
	ifx_register_led(led_hw_config, sizeof(led_hw_config));
	ifx_register_gpio_buttons(&gpio_button_pdata);
	ifx_register_gpio_leds(&gpio_led_pdata_sl550x);
	ifx_register_stg_platform(&stg_gpio_pdata);
	ifx_register_dma();
	ifx_register_wdt();
	ifx_register_vr9_switch(&switch_data_sl550x);
	ifx_register_vmmc();
	ifx_register_usb_oc(0, &usb0_oc_data);
	ifx_register_usb_oc(1, &usb1_oc_data);
}

static void __init sl6501_setup(void)
{
	sl4501_gpio_init();
	sl550x_gpio_init();
	sl550x_phy_init();
	ifx_register_spi(NULL, spi_boardinfo_sl6501,
		ARRAY_SIZE(spi_boardinfo_sl6501));
	ifx_register_usif_spi(NULL);
	ifx_register_ledc(&ledc_hw_config);
	ifx_register_led(led_hw_config, sizeof(led_hw_config));
	ifx_register_gpio_buttons(&gpio_button_pdata);
	ifx_register_gpio_leds(&gpio_led_pdata_sl6501);
	ifx_register_stg_platform(&stg_gpio_pdata);
	ifx_register_dma();
	ifx_register_wdt();
	ifx_register_vr9_switch(&switch_data_sl6501);
	ifx_register_vmmc();
	ifx_register_usb_oc(0, &usb0_oc_data);
	ifx_register_usb_oc(1, &usb1_oc_data);
}

static void __init sl4501_setup(void)
{
	sl4501_gpio_init();
	sl4501_phy_init();
	ifx_register_spi(NULL, spi_boardinfo_sl4501,
		ARRAY_SIZE(spi_boardinfo_sl4501));
	ifx_register_ledc(&ledc_hw_config);
	ifx_register_led(led_hw_config, sizeof(led_hw_config));
	ifx_register_gpio_buttons(&gpio_button_pdata);
	ifx_register_gpio_leds(&gpio_led_pdata_sl4501);
	ifx_register_stg_platform(&stg_gpio_pdata);
	ifx_register_dma();
	ifx_register_wdt();
	ifx_register_vr9_switch(&switch_data_sl4501);
	ifx_register_vmmc();
}

MIPS_MACHINE(LTQ_MACH_SPHSL550X,
		"SPHSL550X", "Speedlink 5501", sl550x_setup);

MIPS_MACHINE(LTQ_MACH_SPHSL6501,
		"SPHSL6501", "Speedlink 6501", sl6501_setup);

MIPS_MACHINE(LTQ_MACH_SPHSL4501,
		"SPHSL4501", "Speedlink 4501", sl4501_setup);


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