Vilo 6 AX1800 support

So i had one of these open because it was thought to be defective. it wasn't just a improper install of the thermal pads causing the device to crash eventually. But while in there I noticed that there was a 3 pin header so I populated it and connected up just to see i thought everyone would get a kick out of this and while i'm at it since this company is likely going belly up soon and the cloud portal / app the only way to config the devices probably won't last long after that is there another build of openWRT that someone has for this?

U-Boot SPL 2018.09 (Nov 05 2021 - 18:50:19 +0800)
Trying to boot from NOR


U-Boot 2018.09 (Nov 05 2021 - 18:50:19 +0800)

CPU:   MediaTek MT7621AT ver 1, eco 3
Clocks: CPU: 880MHz, DDR: 1200MHz, Bus: 220MHz, XTAL: 40MHz
Model: MediaTek MT7621 reference board
DRAM:  256 MiB
Loading Environment from SPI Flash... SF: Detected gd25q128b with page size 256                        Bytes, erase size 64 KiB, total 16 MiB
OK
In:    uartlite0@1e000c00
Out:   uartlite0@1e000c00
Err:   uartlite0@1e000c00
Net:
Warning: eth@1e100000 (eth0) using random MAC address - 06:31:72:11:ed:a0
eth0: eth@1e100000
gpio: pin 13 (gpio 13) value is 0
gpio: pin 14 (gpio 14) value is 0
gpio: pin 15 (gpio 15) value is 0
gpio: pin 14 (gpio 14) value is 1
Hit any key to stop autoboot:  0

  *** U-Boot Boot Menu ***

     1. Startup system (Default)
     2. Upgrade firmware
     3. Upgrade bootloader
     4. Upgrade bootloader (advanced mode)
     5. Load image
     0. U-Boot console


  Press UP/DOWN to move, ENTER to select
## Loading kernel from FIT Image at bfc90000 ...
   Using 'config@1' configuration
   Trying 'kernel@1' kernel subimage
     Description:  MIPS OpenWrt Linux-4.4.198
     Type:         Kernel Image
     Compression:  lzma compressed
     Data Start:   0xbfc900e4
     Data Size:    3410264 Bytes = 3.3 MiB
     Architecture: MIPS
     OS:           Linux
     Load Address: 0x81001000
     Entry Point:  0x81001000
     Hash algo:    crc32
     Hash value:   b395125a
     Hash algo:    sha1
     Hash value:   954f03d45402b63293eece67744fbddea59028e2
   Verifying Hash Integrity ... crc32+ sha1+ OK
## Loading fdt from FIT Image at bfc90000 ...
   Using 'config@1' configuration
   Trying 'fdt@1' fdt subimage
     Description:  MIPS OpenWrt mt7621-rfb-ax-nor device tree blob
     Type:         Flat Device Tree
     Compression:  uncompressed
     Data Start:   0xbffd0b7c
     Data Size:    11277 Bytes = 11 KiB
     Architecture: MIPS
     Hash algo:    crc32
     Hash value:   af978edd
     Hash algo:    sha1
     Hash value:   aee3b0f283060c3e38e7d6397d6050b535cbf0b0
   Verifying Hash Integrity ... crc32+ sha1+ OK
   Booting using the fdt blob at 0xbffd0b7c
   Uncompressing Kernel Image ... OK
   Loading Device Tree to 8fe97000, end 8fe9cc0c ... OK
[    0.000000] Linux version 4.4.198 (root@ubuntu) (gcc version 5.4.0 (LEDE GCC 5.4.0 r0-84649f95) ) #0 SMP Tue Aug 1 02:55:43 UTC 2023
[    0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[    0.000000] bootconsole [early0] enabled
[    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[    0.000000] MIPS: machine is MediaTek MT7621 RFB (802.11ax,SNOR)
[    0.000000] Determined physical RAM map:
[    0.000000]  memory: 10000000 @ 00000000 (usable)
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000000000000000-0x0000000000ffffff]
[    0.000000]   Normal   [mem 0x0000000001000000-0x000000000fffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x000000000fffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x000000000fffffff]
[    0.000000] VPE topology {2,2} total 4
[    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.000000] PERCPU: Embedded 10 pages/cpu @81faa000 s8544 r8192 d24224 u40960
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 65024
[    0.000000] Kernel command line: rootfstype=squashfs,jffs2 rootfstype=squashfs,jffs2
[    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Writing ErrCtl register=00035049
[    0.000000] Readback ErrCtl register=00035049
[    0.000000] Memory: 245728K/262144K available (6923K kernel code, 4024K rwdata, 1628K rodata, 212K init, 1117K bss, 16416K reserved, 0K cma-reserved)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] Hierarchical RCU implementation.
[    0.000000] NR_IRQS:256
[    0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
[    0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns
[    0.000009] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns
[    0.007774] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
[    0.070399] pid_max: default: 32768 minimum: 301
[    0.075113] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.081639] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    1.717062] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    1.717072] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    1.717082] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    1.717226] CPU1 revision is: 0001992f (MIPS 1004Kc)
[    0.177569] Synchronize counters for CPU 1: done.
[    1.493385] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    1.493392] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    1.493398] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    1.493468] CPU2 revision is: 0001992f (MIPS 1004Kc)
[    0.267912] Synchronize counters for CPU 2: done.
[    1.583475] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    1.583481] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    1.583487] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    1.583571] CPU3 revision is: 0001992f (MIPS 1004Kc)
[    0.353088] Synchronize counters for CPU 3: done.
[    0.357825] Brought up 4 CPUs
[    0.365492] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.375295] futex hash table entries: 1024 (order: 3, 32768 bytes)
[    0.381575] pinctrl core: initialized pinctrl subsystem
[    0.387333] NET: Registered protocol family 16
[    0.427100] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    0.432753] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    0.438340] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    0.444442] mt7621-pci 1e140000.pcie: Failed to get gpio for PCIe1
[    0.450557] mt7621-pci 1e140000.pcie: Failed to get gpio for PCIe2
[    0.657033] PCIe port 2 link down
[    0.660267] PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
[    0.709876] PCI host bridge to bus 0000:00
[    0.713910] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
[    0.720774] pci_bus 0000:00: root bus resource [io  0x1e160000-0x1e16ffff]
[    0.727544] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
[    0.734301] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
[    0.742954] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.750885] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.760348] pci 0000:00:00.0: BAR 9: assigned [mem 0x60000000-0x601fffff pref]
[    0.767500] pci 0000:00:01.0: BAR 9: assigned [mem 0x60200000-0x603fffff pref]
[    0.774631] pci 0000:00:00.0: BAR 1: assigned [mem 0x60400000-0x6040ffff]
[    0.781394] pci 0000:00:01.0: BAR 1: assigned [mem 0x60410000-0x6041ffff]
[    0.788134] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit pref]
[    0.795842] pci 0000:01:00.0: BAR 2: assigned [mem 0x60100000-0x60103fff 64bit pref]
[    0.803515] pci 0000:01:00.0: BAR 4: assigned [mem 0x60104000-0x60104fff 64bit pref]
[    0.811212] pci 0000:00:00.0: PCI bridge to [bus 01]
[    0.816108] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x601fffff pref]
[    0.823302] pci 0000:02:00.0: BAR 0: assigned [mem 0x60200000-0x602fffff 64bit pref]
[    0.830990] pci 0000:02:00.0: BAR 2: assigned [mem 0x60300000-0x60303fff 64bit pref]
[    0.838690] pci 0000:02:00.0: BAR 4: assigned [mem 0x60304000-0x60304fff 64bit pref]
[    0.846358] pci 0000:00:01.0: PCI bridge to [bus 02]
[    0.851289] pci 0000:00:01.0:   bridge window [mem 0x60200000-0x603fffff pref]
[    0.860154] clocksource: Switched to clocksource GIC
[    0.867111] NET: Registered protocol family 2
[    0.872083] TCP established hash table entries: 2048 (order: 1, 8192 bytes)
[    0.878969] TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
[    0.885405] TCP: Hash tables configured (established 2048 bind 2048)
[    0.891757] UDP hash table entries: 256 (order: 1, 8192 bytes)
[    0.897506] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[    0.904017] NET: Registered protocol family 1
[    0.922690] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.928446] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    0.941521] io scheduler noop registered
[    0.945364] io scheduler deadline registered (default)
[    0.952104] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
[    0.959398] console [ttyS0] disabled
▒    0.962960] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 33, base_baud = 3125000) is a 16550A

There isn't, but device is supportable...

interesting looks like it's just a dev board and already running a version of openWRT not bad an $80 wifi 6 unit.

Not sure I agree, the WRX36 was $50, the T-56 is $40 or less, and RT1800 is $30 on eBay.

Now i want to find one of those WRX36s

It was $50 on Amazon for a couple of months, before they stopped selling it 3-4 weeks ago.

I won't have time to get openwrt loaded on this unit for log for a little bit but I wanted to leave this here

=> mtdparts

device nor0 <raspi>, # parts = 4
 #: name                size            offset          mask_flags
 0: u-boot              0x00040000      0x00000000      0
 1: u-boot-env          0x00010000      0x00040000      0
 2: factory             0x00040000      0x00050000      0
 3: firmware            0x00f70000      0x00090000      0

active partition: nor0,0 - (u-boot) 0x00040000 @ 0x00000000

defaults:
mtdids  : nor0=raspi
mtdparts: mtdparts=raspi:256k(u-boot),64k(u-boot-env),256k(factory),-(firmware)

=> fdt addr 8fff2530
=> fdt list
/ {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000001>;
        compatible = "mediatek,mt7621-rfb", "mediatek,mt7621-soc";
        model = "MediaTek MT7621 reference board";
        chosen {
        };
        aliases {
        };
        memory {
        };
        cpus {
        };
        sysclock50mhz@0 {
        };
        palmbus {
        };
        binman {
        };
};
=> fdt print
/ {
        #address-cells = <0x00000001>;
        #size-cells = <0x00000001>;
        compatible = "mediatek,mt7621-rfb", "mediatek,mt7621-soc";
        model = "MediaTek MT7621 reference board";
        chosen {
                stdout-path = "/palmbus/uartlite0@1e000c00";
        };
        aliases {
                spi0 = "/palmbus/spi@0x1e000b00";
        };
        memory {
                device_type = "memory";
                reg = <0x00000000 0x00000000>;
        };
        cpus {
                #address-cells = <0x00000001>;
                #size-cells = <0x00000000>;
                cpu@0 {
                        device_type = "cpu";
                        compatible = "mips,mips1004Kc";
                        reg = <0x00000000>;
                };
                cpu@1 {
                        device_type = "cpu";
                        compatible = "mips,mips1004Kc";
                        reg = <0x00000000>;
                };
        };
        sysclock50mhz@0 {
                compatible = "fixed-clock";
                clock-frequency = <0x02faf080>;
                #clock-cells = <0x00000000>;
                phandle = <0x00000003>;
        };
        palmbus {
                compatible = "simple-bus";
                ranges;
                #address-cells = <0x00000001>;
                #size-cells = <0x00000001>;
                reset@0x1e000034 {
                        compatible = "mediatek,mt7621-reset";
                        reg = <0x1e000034 0x00000004>;
                        status = "okay";
                        #reset-cells = <0x00000001>;
                        phandle = <0x00000002>;
                };
                pinctrl@1e000048 {
                        compatible = "mediatek,mt7621-pinctrl";
                        reg = <0x1e000048 0x00000030>;
                        pinctrl-names = "default";
                        pinctrl-0 = <0x00000001>;
                        pinmux_conf {
                                phandle = <0x00000001>;
                                uart1 {
                                        groups = "uart1";
                                        function = "uart1";
                                };
                                gpio {
                                        groups = "i2c", "uart2", "uart3", "pcie", "jtag";
                                        function = "gpio";
                                };
                                wdt {
                                        groups = "wdt";
                                        function = "wdt rst";
                                };
                                mdio {
                                        groups = "mdio";
                                        function = "mdio";
                                };
                                mdio_pconf {
                                        groups = "mdio";
                                        drive-strength = <0x00000002>;
                                };
                                rgmii2 {
                                        groups = "rgmii2";
                                        function = "rgmii2";
                                };
                                rgmii1 {
                                        groups = "rgmii1";
                                        function = "rgmii1";
                                };
                                esw {
                                        groups = "esw";
                                        function = "esw int";
                                };
                                spi {
                                        groups = "spi";
                                        function = "spi";
                                };
                                sdhci {
                                        groups = "sdhci";
                                        function = "sdhci";
                                };
                        };
                };
                gpio@0x1e000600 {
                        compatible = "mediatek,mt7621-gpio";
                        reg = <0x1e000600 0x00000100>;
                        bank-name = "mt7621-gpio";
                        resets = <0x00000002 0x0000000d>;
                        status = "okay";
                };
                spi@0x1e000b00 {
                        compatible = "mediatek,mt7621-spi";
                        reg = <0x1e000b00 0x00000100>;
                        resets = <0x00000002 0x00000012>;
                        status = "okay";
                        #address-cells = <0x00000001>;
                        #size-cells = <0x00000000>;
                        spi-max-frequency = <0x017d7840>;
                        spi-flash@0 {
                                #address-cells = <0x00000001>;
                                #size-cells = <0x00000001>;
                                compatible = "spi-flash";
                                spi-max-frequency = <0x017d7840>;
                                reg = <0x00000000>;
                        };
                };
                uartlite0@1e000c00 {
                        compatible = "mediatek,hsuart", "ns16550";
                        reg = <0x1e000c00 0x00000100>;
                        reg-shift = <0x00000002>;
                        clock-frequency = <0x02faf080>;
                        resets = <0x00000002 0x00000013>;
                        status = "okay";
                };
                uartlite0@1e000d00 {
                        compatible = "mediatek,hsuart", "ns16550";
                        reg = <0x1e000d00 0x00000100>;
                        reg-shift = <0x00000002>;
                        clock-frequency = <0x02faf080>;
                        resets = <0x00000002 0x00000014>;
                        status = "disabled";
                };
                uartlite0@1e000e00 {
                        compatible = "mediatek,hsuart", "ns16550";
                        reg = <0x1e000e00 0x00000100>;
                        reg-shift = <0x00000002>;
                        clock-frequency = <0x02faf080>;
                        resets = <0x00000002 0x00000015>;
                        status = "disabled";
                };
                eth@1e100000 {
                        compatible = "mediatek,mt7621-eth";
                        reg = <0x1e100000 0x0000e000 0x1e110000 0x00008000>;
                        reg-names = "fe", "gmac";
                        resets = <0x00000002 0x00000006 0x00000002 0x00000017 0x00000002 0x00000002>;
                        reset-names = "fe", "gsw", "mcm";
                        status = "okay";
                        #address-cells = <0x00000001>;
                        #size-cells = <0x00000000>;
                };
                mmc@1e130000 {
                        compatible = "mediatek,mt7621-mmc";
                        reg = <0x1e130000 0x00004000>;
                        r_smpl = <0x00000001>;
                        clocks = <0x00000003>;
                        clock-names = "source";
                        resets = <0x00000002 0x0000001e>;
                        status = "okay";
                };
                xhci@1e1c0000 {
                        compatible = "mediatek,mt7621-xhci";
                        reg = <0x1e1c0000 0x00040000>;
                        status = "okay";
                        #address-cells = <0x00000001>;
                        #size-cells = <0x00000000>;
                };
        };
        binman {
                filename = "u-boot-mt7621.bin";
                pad-byte = <0x000000ff>;
                blob {
                        filename = "u-boot-mt7621-spl.bin";
                        align-end = <0x00010000>;
                };
                u-boot-lzma-img {
                };
        };
};


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