Tenda TX9 (GRX500)

I just get my hands on an Tenda TX9 Pro. It runs an adapted version of Openwrt 19.07.1 (UGW). The SoC is a GRX500 v1.2 and the board identifies itself as EASY350 ANYWAN (GRX350).
It has a W25Q128BV (16M) and 128M of RAM.
4G eth ports and Wifi6 chip (Cant identify it yet) ...

U-Boot 2016.07-INTEL-v-3.1.177 (Aug 09 2021 - 15:40:36 +0000), Build: RX9Pro

interAptiv
cps cpu/ddr run in 800/666 Mhz
DRAM:  224 MiB
manuf ef, jedec 4018, ext_jedec 0000
SF: Detected W25Q128BV with page size 256 Bytes, erase size 64 KiB, total 16 MiB
*** Warning - Tenda Environment, using default environment

env size:8187, crc:2e60d285 need 2e60d285
In:    serial
Out:   serial
Err:   serial
Net:   multi type
Internal phy firmware version: 0x8548
GRX500-Switch

Type run flash_nfs to mount root filesystem over NFS

Hit ESC to stop autoboot:  0 
Wait for upgrade... use GRX500-Switch
tenda upgrade timeout.
manuf ef, jedec 4018, ext_jedec 0000
SF: Detected W25Q128BV with page size 256 Bytes, erase size 64 KiB, total 16 MiB
device 0 offset 0x100000, size 0x200000
SF: 2097152 bytes @ 0x100000 Read: OK
## Booting kernel from Legacy Image at 80800000 ...
   Image Name:   MIPS UGW Linux-4.9.206
   Created:      2021-08-10   3:52:51 UTC
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
   Data Size:    2080560 Bytes = 2 MiB
   Load Address: a0020000
   Entry Point:  a0020000
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
[    0.000000] Linux version 4.9.206 (root@ubt1-virtual-machine) (gcc version 8.3.0 (OpenWrt GCC 8.3.0 v19.07.1_intel) ) #0 SMP Mon Aug 9 16:29:17 UTC 2021
[    0.000000] SoC: GRX500 rev 1.2
[    0.000000] CPU0 revision is: 0001a120 (MIPS interAptiv (multi))
[    0.000000] Enhanced Virtual Addressing (EVA 1GB) activated
[    0.000000] MIPS: machine is EASY350 ANYWAN (GRX350) Main model
[    0.000000] Coherence Manager IOCU detected
[    0.000000] Hardware DMA cache coherency disabled
[    0.000000] earlycon: lantiq0 at MMIO 0x16600000 (options '')
[    0.000000] bootconsole [lantiq0] enabled
[    0.000000] User-defined physical RAM map:
[    0.000000]  memory: 08000000 @ 20000000 (usable)
[    0.000000] Determined physical RAM map:
[    0.000000]  memory: 08000000 @ 20000000 (usable)
[    0.000000]  memory: 00007fa4 @ 206d5450 (reserved)
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] cma: Reserved 32 MiB at 0x25c00000
[    0.000000] SMPCMP: CPU0: cmp_smp_setup
[    0.000000] VPE topology {2,2} total 4
[    0.000000] Detected 3 available secondary CPU(s)
[    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000000020000000-0x0000000027ffffff]
[    0.000000]   Normal   empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000020000000-0x0000000027ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000020000000-0x0000000027ffffff]
[    0.000000] percpu: Embedded 12 pages/cpu s17488 r8192 d23472 u49152
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32480
[    0.000000] Kernel command line: earlycon=lantiq,0x16600000 nr_cpus=4 nocoherentio clk_ignore_unused root=/dev/mtdblock6 rw rootfstype=squashfs do_overlay console=ttyLTQ0,11520 
[    0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[    0.000000] Writing ErrCtl register=00000000
[    0.000000] Readback ErrCtl register=00000000
[    0.000000] Memory: 87656K/131072K available (5089K kernel code, 293K rwdata, 1264K rodata, 1276K init, 961K bss, 10648K reserved, 32768K cma-reserved)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] Hierarchical RCU implementation.
[    0.000000] NR_IRQS:527
[    0.000000] EIC is off
[    0.000000] VINT is on
[    0.000000] CPU Clock: 800000000Hz  mips_hpt_frequency 400000000Hz
[    0.000000] clocksource: gptc: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 9556302233 ns
[    0.000011] sched_clock: 32 bits at 200MHz, resolution 5ns, wraps every 10737418237ns
[    0.008268] Calibrating delay loop... 531.66 BogoMIPS (lpj=2658304)
[    0.069297] pid_max: default: 32768 minimum: 301
[    0.074086] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.080515] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.089033] CCA is coherent, multi-core is fine
[    0.098035] [vmb_cpu_alloc]:[645] CPU vpet.cpu_status = 11

Outside WAIT got IPI interrupt to launch from cpu 01

 MSG_ID = 01[    0.108297] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.108305] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.108317] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.108544] ITC Memory is already initialised for Core 0 at address 1c300000 !!!
[    0.108546] CPU1 revision is: 0001a120 (MIPS interAptiv (multi))
[    0.169111] [vmb_cpu_alloc]:[645] CPU vpet.cpu_status = 11

Outside WAIT got IPI interrupt to launch from cpu 02

 MSG_ID = 01[    0.212947] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.212956] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.212968] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.213128] CPU2 revision is: 0001a120 (MIPS interAptiv (multi))
[    0.268463] Brought up 3 CPUs
[    0.307559] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.316022] futex hash table entries: 1024 (order: 3, 32768 bytes)
[    0.324955] pinctrl core: initialized pinctrl subsystem
[    0.330354] NET: Registered protocol family 16
[    0.345804] intel-pinctrl 16c80000.pinctrl: pinbank id: 0, reg: 0xb6c80000, pinbase: 0, pin number: 32, pinmap: 0xf1efefff
[    0.355497] intel-pinctrl 16c80000.pinctrl: pinbank id: 1, reg: 0xb6c80100, pinbase: 32, pin number: 32, pinmap: 0x3bff0c1f
[    0.366773] intel-pinctrl 16c80000.pinctrl: Total 18 groups, 18 functions
[    0.373539] intel-pinctrl 16c80000.pinctrl: gpiochip membase: 0xb6c00000
[    0.380435] intel-pinctrl 16c80000.pinctrl: gpiochip membase: 0xb6c00100
[    0.428204] Lantiq MIPSInterAptiv MPS driver, version 1.0.0.0, (c) 2006-2013 Lantiq Deutschland GmbH
[    0.436542] MPS: major Id 253
[    0.439959] dma0-grx500 16e00000.dma: base address b6e00000 chained_irq 72 irq_base 109
[    0.446833] dma0-grx500 16e00000.dma: Init done - hw rev: A, ports: 4, channels: 16
[    0.455128] dma-grx500 1e300000.dma: dma3 base address be300000 chained_irq 29 irq_base 125
[    0.464684] dma-grx500 1e300000.dma: Init done - rev: a, ports: 1, channels: 64
[    0.534035] Unable to get node cqm for prx300-cqm
[    0.538430] add_cqm_dev(#153): parse_dts fail for prx300-cqm
[    0.544256] No rcu reset for cbm
[    0.547248] No syscon phandle specified for wan mux
[    0.622568] [cbm] { cbm_xrx500_probe : 5355 }reserving 18874368 bytes @ 65c00000 for CBM
[    0.660749] [cbm] { cbm_xrx500_probe : 5365 }reserving 8388608 bytes @ 66e00000 for CBM
[    0.667292] [cbm] { cbm_xrx500_probe : 5376 }30 irq
[    0.672388] [cbm] { cbm_xrx500_probe : 5399 }2
[    0.676665] [drv_tmu_ll] { get_cbm_clock : 7810 }CBM Clock: 0Hz=0MHZ
[    0.683018] [drv_tmu_ll] { get_cbm_clock : 7813 }Wrong cbm clock
[    0.689012] Initializing TMU with Base Address=be700000: ...
[    0.697633] TMU Initialization Done
[    0.699664] 0x65c00000 0x1200000 0x800
[    0.703370] 0x65c00000 0x1200000
[    0.706583] 0x66e00000 0x800000 0x4000
[    0.710342] 0x66e00000 0x800000
[    0.713845] [cbm] { init_fsqm_buf_std : 833 }init fsqm std successfully
[    0.720076] [cbm] { init_fsqm_buf_jumbo : 875 }init fsqm jbo successfully
[    0.726807] [cbm] { init_fsqm : 898 }fsqm init successfully
[    0.728126] random: fast init done
[    0.735751] [cbm] { init_cbm_basic : 933 }PHY ADDR STD 0x25c00000
[    0.741842] [cbm] { init_cbm_basic : 934 }PHY ADDR JBO 0x26e00000
[    0.748131] [cbm] { init_cbm_basic : 952 }init basic CBM successfully
[    0.754325] [cbm] { cbm_hw_init : 1834 }CBM HW init
[    0.759313] [cbm] { setup_DMA_p2p : 4801 }setup_DMA_p2p executed
[    0.765179] [cbm] { reserved_ports_highest : 4860 }2 2 19 35
[    0.770836] [cbm] { init_cbm_dqm_cpu_port : 1096 }2
[    1.162581] [cbm] { dma_toe_port_enable : 4361 }9 0x1
[    1.167593] [cbm] { dma_vrx318_port_enable : 4374 }15 0x1
[    1.173002] [cbm] { init_cbm_dqm_cpu_port : 1096 }0
[    1.177834] [cbm] { init_cbm_dqm_cpu_port : 1096 }1
[    1.182716] [cbm] { init_cbm_dqm_cpu_port : 1096 }2
[    1.187560] Load spreader init successfully
[    1.191843] [cbm] { cbm_xrx500_probe : 5455 }CBM Clock: 0Hz
[    1.197277] [cbm] { cbm_xrx500_probe : 5457 }EQM delay Enabled
[    1.203118] [cbm] { igp_delay_set : 4461 }port0 delay16
[    1.208320] [cbm] { igp_delay_set : 4461 }port1 delay16
[    1.281672] [cbm] { igp_delay_set : 4461 }port15 delay16
[    1.286949] [cbm] { enqueue_dma_port_init : 4239 }5 0x2 2 0 30
[    1.333233] [cbm] { cbm_xrx500_probe : 5498 }CBM: Init Done !![    1.380267] intel-sso-gpio 16d00000.ssogpio: sso_register_shift_clk: Invalid freq -1
[    1.388772] try to register spd_mon driver[    1.391408] spdmon 16080110.speedm: base address: 0xb6080110
[    1.396954] spdmon 16080110.speedm: PHY base address: 0x16080110
[    1.403269] spdmon 16080110.speedm: spd_mon driver : init done !!
[    1.411457] spd_mon driver registered
[    1.415212] clocksource: Switched to clocksource gptc
[    1.421185] NET: Registered protocol family 2
[    1.425017] TCP established hash table entries: 1024 (order: 0, 4096 bytes)
[    1.431130] TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
[    1.437406] TCP: Hash tables configured (established 1024 bind 1024)
[    1.443789] UDP hash table entries: 256 (order: 1, 8192 bytes)
[    1.449571] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[    1.456077] NET: Registered protocol family 1
[    1.462596] Crashlog allocated RAM at address 0x27fe0000
[    1.467050] workingset: timestamp_bits=14 max_order=15 bucket_order=1
[    1.481724] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    1.486144] jffs2: version 2.2 (NAND) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    1.501749] io scheduler noop registered
[    1.504206] io scheduler deadline registered (default)
[    1.510207] intel-pcie-slim-phy 18500000.pciephy: PCIe slim phy[0] init success!
[    1.517234] intel-pcie-slim-phy 18000000.pciephy: PCIe slim phy[1] init success!
[    1.645202] OF: PCI: host bridge /pcie@18900000 ranges:
[    1.648999] OF: PCI:   MEM 0xb8000000..0xbaffffff -> 0xb8000000
[    1.654896] OF: PCI:    IO 0xbb800000..0xbb80ffff -> 0xbb800000
[    1.662984] intel-pcie-slim-phy 18500000.pciephy: PCIe LCPLL SSC Mode Enabled
[    1.915339] intel-pcie 18900000.pcie: PCI host bridge to bus 0000:00
[    1.920229] pci_bus 0000:00: root bus resource [bus 00-08]
[    1.925721] pci_bus 0000:00: root bus resource [mem 0xb8000000-0xbaffffff]
[    1.932545] pci_bus 0000:00: root bus resource [io  0xbb800000-0xbb80ffff]
[    1.939852] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    1.948044] pci 0000:00:00.0: PCI bridge to [bus 01-08]
[    1.952857] pci 0000:00:00.0: BAR 8: assigned [mem 0xb8000000-0xb9ffffff]
[    1.959416] pci 0000:00:00.0: BAR 9: assigned [mem 0xba000000-0xba0fffff pref]
[    1.966592] pci 0000:00:00.0: BAR 7: assigned [io  0xbb800000-0xbb800fff]
[    1.973348] pci 0000:01:00.0: BAR 0: assigned [mem 0xb8000000-0xb9ffffff]
[    1.980138] pci 0000:00:00.0: PCI bridge to [bus 01]
[    1.985069] pci 0000:00:00.0:   bridge window [io  0xbb800000-0xbb800fff]
[    1.991855] pci 0000:00:00.0:   bridge window [mem 0xb8000000-0xb9ffffff]
[    1.998620] pci 0000:00:00.0:   bridge window [mem 0xba000000-0xba0fffff pref]
[    2.005845] pci 0000:00:00.0: Max Payload Size set to  256/ 256 (was  128), Max Read Rq  256
[    2.014246] pci 0000:01:00.0: Max Payload Size set to  256/ 256 (was  128), Max Read Rq  256
[    2.022741] intel-pcie 18900000.pcie: Intel AXI PCIe Root Complex Port 0 Init Done
[    2.155197] OF: PCI: host bridge /pcie@18400000 ranges:
[    2.158973] OF: PCI:   MEM 0xb4000000..0xb6ffffff -> 0xb4000000
[    2.164864] OF: PCI:    IO 0xb7800000..0xb780ffff -> 0xb7800000
[    2.171813] intel-pcie-slim-phy 18000000.pciephy: SSC has been enabled, count: 2!
[    2.396279] intel-pcie 18400000.pcie: PCI host bridge to bus 0001:00
[    2.401167] pci_bus 0001:00: root bus resource [bus 00-08]
[    2.406671] pci_bus 0001:00: root bus resource [mem 0xb4000000-0xb6ffffff]
[    2.413483] pci_bus 0001:00: root bus resource [io  0xb7800000-0xb780ffff]
[    2.420775] pci 0001:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    2.428967] pci 0001:00:00.0: PCI bridge to [bus 01-08]
[    2.433833] pci 0001:00:00.0: BAR 8: assigned [mem 0xb4000000-0xb5ffffff]
[    2.440351] pci 0001:00:00.0: BAR 9: assigned [mem 0xb6000000-0xb60fffff pref]
[    2.447530] pci 0001:00:00.0: BAR 7: assigned [io  0xb7800000-0xb7800fff]
[    2.454286] pci 0001:01:00.0: BAR 0: assigned [mem 0xb4000000-0xb5ffffff]
[    2.461082] pci 0001:00:00.0: PCI bridge to [bus 01]
[    2.466018] pci 0001:00:00.0:   bridge window [io  0xb7800000-0xb7800fff]
[    2.472773] pci 0001:00:00.0:   bridge window [mem 0xb4000000-0xb5ffffff]
[    2.479559] pci 0001:00:00.0:   bridge window [mem 0xb6000000-0xb60fffff pref]
[    2.486782] pci 0001:00:00.0: Max Payload Size set to  256/ 256 (was  128), Max Read Rq  256
[    2.495201] pci 0001:01:00.0: Max Payload Size set to  256/ 256 (was  128), Max Read Rq  256
[    2.503660] intel-pcie 18400000.pcie: Intel AXI PCIe Root Complex Port 1 Init Done
[    2.513303] [mips_tc_init] dma_zalloc_coherent dev->name=(null) sizeof(struct mips_tc_sg_mem)=1680 shared_phy_mem=25be6000
[    2.522940] [mips_tc_init] dma_zalloc_coherent shared_vir_uncached_mem=a5be6000 shared_vir_cached_mem=65be6000 shared_working_vir_mem=65be6000
[    2.535944] =MIPS TC Shared memory: a5be6000 65be6000 65be6000 | Data: a5070000
[    2.543015] UMT initialize success on processor: 2 !
[    2.547901] HW MCPY driver: Version: 1.1.0, Init Done!
[    2.553715] 16600000.serial: ttyLTQ0 at MMIO 0x16600000 (irq = 64, base_baud = 0) is a lantiq,asc
[    2.568667] console [ttyLTQ0] enabled
[    2.568667] console [ttyLTQ0] enabled
[    2.574491] bootconsole [lantiq0] disabled
[    2.574491] bootconsole [lantiq0] disabled
[    2.583112] sysrst_init: Trying to register System Reset Driver ...
[    2.589222] sysrst_pre_init: Detect InterAptiv CPU ...
[    2.594304] sysrst_init: Lantiq CPE GRX500 System driver version 1.0.0
[    2.600592] sysrst_init: GRX500 System Reset initialized successfully!
[    2.608553] brd: module loaded
[    2.621646] m25p80 spi32766.1: w25q128 (16384 Kbytes)
[    2.626589] 7 cmdlinepart partitions found on MTD device spi32766.1
[    2.631482] Creating 7 MTD partitions on "spi32766.1":
[    2.636671] 0x000000000000-0x000000080000 : "uboot"
[    2.642717] 0x000000080000-0x0000000a0000 : "ubootconfigA"
[    2.648214] 0x0000000a0000-0x0000000c0000 : "ubootconfigB"
[    2.653544] 0x0000000c0000-0x000000100000 : "calibration"
[    2.659024] 0x000000100000-0x000000300000 : "kernel"
[    2.663874] 0x000000300000-0x000000f00000 : "rootfs"
[    2.668945] mtd: device 6 (rootfs) set to be root filesystem
[    2.673487] 1 squashfs-split partitions found on MTD device rootfs
[    2.679550] 0x000000d00000-0x000001000000 : "rootfs_data"
[    2.686269] 0x000000f00000-0x000001000000 : "res"
[    2.690818] Lantiq SoC SPI controller rev 9 (TXFS 32, RXFS 32, DMA 1)
[    2.708877] libphy: Fixed MDIO Bus: probed
[    2.717743] libphy: gswitch_mdio: probed
[    2.723693] libphy: gswitch_mdio: probed
[    2.727425] lro_sram_membase_res0 from DT: a2013000 
[    2.731442] ltq_toe_membase: e2000000 and lro_sram_membase_res0: e2013000
[    2.738599] TOE Init Done !!
[    2.742238] ltq_thermal 16000000.ssx4:ts@080000: ltq_thermal_probe: is done
[    2.748518] grx500wdt 12000000.watchdog: [grx500wdt_probe]:[402] cpu_clk=800000000
[    2.755322] grx500wdt 12000000.watchdog: [grx500wdt_probe]WDT reset is Bit31, RCU_IAP_WDT_RST_STAT=0x5ac00008
[    2.765196] grx500wdt 12000000.watchdog: [grx500wdt_probe]Not WDT reset.
[    2.771888] grx500wdt 12000000.watchdog: [grx500wdt_probe]:[487] grx500_wdt = 60a170d8
[    2.780125] grx500wdt 12000000.watchdog: [grx500wdt_probe]:[487] grx500_wdt = 60a230d8
[    2.787852] grx500wdt 12000000.watchdog: [grx500wdt_probe]:[487] grx500_wdt = 60a2f0d8
[    2.795742] grx500wdt 12000000.watchdog: H/w Watchdog Timer: (max 5) (nowayout= 0)
[    2.804280] of: dev_pm_opp_of_cpumask_add_table: failed to get cpu3 device
[    2.817665] NET: Registered protocol family 10
[    2.822248] NET: Registered protocol family 17
[    2.825454] Successfully initialized netlink...
[    2.829829] Bridge firewalling registered
[    2.833735] 8021q: 802.1Q VLAN Support v1.8
[    2.842488] clk: Not disabling u[    2.858594] VFS: Mounted root (squashfs filesystem) readonly on device 31:6.
[    2.868643] Freeing unused kernel: 1276k freed
[    2.871630] This architecture does not have kernel memory protection.
[    3.391164] random: crng init done
[    3.908010] init: Console is alive
[    3.910205] init: - watchdog -
[    5.852839] kmodloader: loading kernel modules from /etc/modules-boot.d/*
[    5.924905] Device IRQ: 26 line: 101
[    5.927225] GlobalControl97_Capabilities_Get
[    5.931280] EIP202: PEs=1 rings=4 64-bit=No, fill level extension=No
[    5.931280] CF size=4 RF size=3 DMA len = 10 Align=0 HDW=0 HostIfc=3
[    5.944025] EIP96 options:
[    5.944025] AES: Yes with CFB/OFB: Yes Fast: Yes
[    5.944025] DES: Yes with CFB/OFB: Yes Fast: No
[    5.944025] ARCFOUR level: 3
[    5.944025] MD5: Yes SHA1: Yes Fast: Yes SHA256: Yes SHA512: Yes
[    5.944025] (X)CBC-MAC: Yes Fast: Yes All key sizes: No GHASH Yes
[    5.970710] EIP97 options: PEs=1, In Dbuf size=6 In Tbuf size=5, Out Dbuf size=6, Out Tbuf size=4, 
[    5.970710] Token Generator: No, Transform Record Cache: No
[    5.985302] EIP206 options: PE type=0 InClassifier=0 OutClassifier=0 MAC chans=0 
[    5.985302] InDBuf=0kB InTBuf=0kB OutDBuf=0kB OutTBuf=0kB
[    5.998132] Global EIP-97 capabilities: EIP-97 v1.2p1  with EIP-202 v1.3p0 and EIP-96 v2.2p3, #PE=01 #rings=04
[    6.008137] Global Status of the EIP-97
[    6.011916] Packet Engine 0 Status
[    6.015331] DFE Status: CD FIFO Words: 0, CDR ID: 15, DMA size: 0
[    6.015331] AtDMA busy: false, DataDMA busy: false, DMA err: false
[    6.027569] DSE Status: RD FIFO Words: 0, RDR ID: 15, DMA size: 0
[    6.027569] Data flush  busy: false, DataDMA busy: false, DMA err: false
[    6.040330] Token Status: Active: 0, loc available: true
[    6.040330] res available: false, read active: false, ccache active: false
[    6.040330] cntx fetch: false, res cntx: false
[    6.040330] processing held: true, busy: false
[    6.061339] Context Status: Err mask: 0000, Available: 0
[    6.061339] Active cntx: false, next cntx: false, result cntx: false Err recov: false
[    6.074451] Interrupt Status: input DMA err: false, output DMA err false 
[    6.074451] pkt proc err: false, pkt timeout: false, f a t a l err: false, PE int out: false
[    6.074451] inp DMA enable: false, outp DMA enable false, pkt proc enable: false
[    6.074451] pkt timeout enable: false, f a t a l enable: false,PE int out enable: false
[    6.104998] Output Transfer Status: availabe: 71, min: 8, max: 64, size mask: 252
[    6.112459] PRNG Status: busy: true, res ready: false
[    6.117496] Adapter_Lock_Alloc: Lock = spinlock
[    6.121986] Adapter_Lock_Alloc: Lock = spinlock
[    6.126814] Adapter_PECDev_Init: CDR fetch size 0x8, thresh 0x6, HDW=0, CFsize=4
[    6.134323] Adapter_PECDev_Init: RDR fetch size 0x8, thresh 0x2, RFsize=3
[    6.141149] Status of CDR/RDR interface 0
[    6.144654] CDR Status: DMA err: false, err: false: ovf/under err: false
[    6.144654] Threshold int: false, timeout int: false, FIFO count: 16
[    6.157695] RDR Status: DMA err: false, err: false: ovf/under err: false
[    6.157695] Buf ovf: false, Descriptor ovf false
[    6.157695] Threshold int: false, timeout int: false, FIFO count: 8
[    6.175536] LTQ Crypto Hardware Initialized ..
[    6.183801] LTQ crypto driver version: 1.4.10
[    6.188049] kmodloader: done loading kernel modules from /etc/modules-boot.d/*
[    6.204483] init: - preinit -

So are you developing an openwrt image for it?

Thats the idea... There is a lot of information from this arch in github...
I think the main problem would be the WAV600 drivers...
But I think I can integrate the xrx500 in the existing lantiq tree of openwrt... At least, network drivers does not seems much different from the xrx300 that is already in the kernel...