Ruiji ew3200gx pro - building custom Image - altering dts

I have zero programming skills but I was able to find the dts file here:
git.openwrt.org Git - openwrt/openwrt.git/commit

I then altered it in notepad to the same as what was in this post: RG-EW3200GX PRO does not boot after flashing OpenWrt - Installing and Using OpenWrt - OpenWrt Forum

How do I get a flash image build with this altered dts? Can anyone help as this should prevent others from bricking their device.

Is the dtsi and any other files created from the dts file?

Can the online webbuilder use this altered dts?

Many thanks
SJ

This is the altered text

1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 
   3 /dts-v1/;
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/gpio/gpio.h>
   6 
   7 #include "mt7622.dtsi"
   8 #include "mt6380.dtsi"
   9 
  10 / {
  11         model = "Ruijie RG-EW3200GX PRO";
  12         compatible = "ruijie,rg-ew3200gx-pro", "mediatek,mt7622";
  13 
  14         aliases {
  15                 ethernet0 = &gmac0;
  16                 label-mac-device = &gmac0;
  17                 led-boot = &led_system;
  18                 led-failsafe = &led_system;
  19                 led-running = &led_system;
  20                 led-upgrade = &led_system;
  21                 serial0 = &uart0;
  22         };
  23 
  24         chosen {
  25                 stdout-path = "serial0:115200n1";
  26                 bootargs = "console=ttyS0,115200n1 swiotlb=512";
  27         };
  28 
  29         cpus {
  30                 cpu@0 {
  31                         proc-supply = <&mt6380_vcpu_reg>;
  32                         sram-supply = <&mt6380_vm_reg>;
  33                 };
  34 
  35                 cpu@1 {
  36                         proc-supply = <&mt6380_vcpu_reg>;
  37                         sram-supply = <&mt6380_vm_reg>;
  38                 };
  39         };
  40 
  41         gpio-keys {
  42                 compatible = "gpio-keys";
  43 
  44                 reset {
  45                         label = "reset";
  46                         linux,code = <KEY_RESTART>;
  47                         gpios = <&pio 0 GPIO_ACTIVE_LOW>;
  48                 };
  49 
  50                 wps {
  51                         label = "wps";
  52                         linux,code = <KEY_WPS_BUTTON>;
  53                         gpios = <&pio 102 GPIO_ACTIVE_LOW>;
  54                 };
  55         };
  56 
  57         gpio-leds {
  58                 compatible = "gpio-leds";
  59 
  60                 mesh_green {
  61                         label = "green:mesh";
  62                         gpios = <&pio 79 GPIO_ACTIVE_LOW>;
  63                 };
  64 
  65                 mesh_red {
  66                         label = "red:mesh";
  67                         gpios = <&pio 82 GPIO_ACTIVE_LOW>;
  68                 };
  69 
  70                 led_system: system_blue {
  71                         label = "blue:system";
  72                         gpios = <&pio 81 GPIO_ACTIVE_LOW>;
  73                         default-state = "on";
  74                 };
  75         };
  76 
  77         memory {
  78                 reg = <0 0x40000000 0 0x40000000>;
  79         };
  80 };
  81 
  82 &eth {
  83         status = "okay";
  84 
  85         pinctrl-names = "default";
  86         pinctrl-0 = <&eth_pins>;
  87 
  88         gmac0: mac@0 {
  89                 compatible = "mediatek,eth-mac";
  90                 reg = <0>;
  91                 phy-connection-type = "2500base-x";
  92                 fixed-link {
  93                         speed = <2500>;
  94                         full-duplex;
  95                         pause;
  96                 };
  97         };
  98 
  99         mdio: mdio-bus {
 100                 #address-cells = <1>;
 101                 #size-cells = <0>;
 102 
 103                 switch@0 {
 104                         compatible = "mediatek,mt7531";
 105                         reg = <0>;
 106                         reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>;
 107                         
 108                         interrupt-controller;
 109                         #interrupt-cells = <2>;
 110                         interrupt-parent = <&pio>;
 111                         interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
 112 
 113                         ports {
 114                                 #address-cells = <1>;
 115                                 #size-cells = <0>;
 116 
 117                                 port@0 {
 118                                         reg = <0>;
 119                                         label = "lan1";
 120                                 };
 121 
 122                                 port@1 {
 123                                         reg = <1>;
 124                                         label = "lan2";
 125                                 };
 126 
 127                                 port@2 {
 128                                         reg = <2>;
 129                                         label = "lan3";
 130                                 };
 131 
 132                                 port@3 {
 133                                         reg = <3>;
 134                                         label = "lan4";
 135                                 };
 136 
 137                                 wan: port@4 {
 138                                         reg = <4>;
 139                                         label = "wan";
 140                                 };
 141 
 142                                 port@6 {
 143                                         reg = <6>;
 144                                         label = "cpu";
 145                                         ethernet = <&gmac0>;
 146                                         phy-mode = "2500base-x";
 147 
 148                                         fixed-link {
 149                                                 speed = <2500>;
 150                                                 full-duplex;
 151                                                 pause;
 152                                         };
 153                                 };
 154                         };
 155                 };
 156         };
 157 };
 158 
 159 &pcie0 {
 160         status = "okay";
 161 
 162         pinctrl-names = "default";
 163         pinctrl-0 = <&pcie0_pins>;
 164 };
 165 
 166 &slot0 {
 167         mt7915@0,0 {
 168                 reg = <0x0000 0 0 0 0>;
 169                 mediatek,mtd-eeprom = <&factory 0x5000>;
 170                 ieee80211-freq-limit = <5000000 6000000>;
 171         };
 172 };
 173 
 174 &pio {
 175         epa_elna_pins: epa-elna-pins {
 176                 mux {
 177                         function = "antsel";
 178                         groups = "antsel0", "antsel1", "antsel2", "antsel3",
 179                                 "antsel4", "antsel5", "antsel6", "antsel7",
 180                                 "antsel8", "antsel9", "antsel12", "antsel13",
 181                                 "antsel14", "antsel15", "antsel16", "antsel17";
 182                 };
 183         };
 184 
 185         eth_pins: eth-pins {
 186                 mux {
 187                         function = "eth";
 188                         groups = "mdc_mdio", "rgmii_via_gmac2";
 189                 };
 190         };
 191 
 192         pcie0_pins: pcie0-pins {
 193                 mux {
 194                         function = "pcie";
 195                         groups = "pcie0_pad_perst",
 196                                  "pcie0_0_waken",
 197                                  "pcie0_0_clkreq";
 198                 };
 199         };
 200 
 201         pmic_bus_pins: pmic-bus-pins {
 202                 mux {
 203                         function = "pmic";
 204                         groups = "pmic_bus";
 205                 };
 206         };
 207 
 208         spi_nor_pins: spi-nor-pins {
 209                 mux {
 210                         function = "flash";
 211                         groups = "spi_nor";
 212                 };
 213         };
 214 
 215         uart0_pins: uart0-pins {
 216                 mux {
 217                         function = "uart";
 218                         groups = "uart0_0_tx_rx";
 219                 };
 220         };
 221 
 222         watchdog_pins: watchdog-pins {
 223                 mux {
 224                         function = "watchdog";
 225                         groups = "watchdog";
 226                 };
 227         };
 228 };
 229 
 230 &pwrap {
 231         status = "okay";
 232 
 233         pinctrl-names = "default";
 234         pinctrl-0 = <&pmic_bus_pins>;
 235 };
 236 
 237 &nor_flash {
 238         status = "okay";
 239 
 240         pinctrl-names = "default";
 241         pinctrl-0 = <&spi_nor_pins>;
 242 
 243         flash@0 {
 244                 compatible = "jedec,spi-nor";
 245                 reg = <0>;
 246                 spi-max-frequency = <50000000>;
 247 
 248                 partitions {
 249                         compatible = "fixed-partitions";
 250                         #address-cells = <1>;
 251                         #size-cells = <1>;
 252 
 253                         partition@0 {
 254                                 label = "Preloader";
 255                                 reg = <0x0 0x20000>;
 256                                 read-only;
 257                         };
 258 
 259                         partition@20000 {
 260                                 label = "ATF";
 261                                 reg = <0x20000 0x10000>;
 262                                 read-only;
 263                         };
 264 
 265                         partition@30000 {
 266                                 label = "u-boot";
 267                                 reg = <0x30000 0x50000>;
 268                                 read-only;
 269                         };
 270 
 271                         partition@80000 {
 272                                 label = "u-boot-env";
 273                                 reg = <0x80000 0x10000>;
 274                         };
 275 
 276                         factory: partition@90000 {
 277                                 label = "Factory";
 278                                 reg = <0x90000 0x40000>;
 279                                 read-only;
 280                         };
 281 
 282                         partition@d0000 {
 283                                 label = "product_info";
 284                                 reg = <0xd0000 0x10000>;
 285                                 read-only;
 286                         };
 287 
 288                         partition@e0000 {
 289                                 label = "kdump";
 290                                 reg = <0xe0000 0x10000>;
 291                                 read-only;
 292                         };
 293 
 294                         partition@f0000 {
 295                                 compatible = "denx,fit";
 296                                 label = "firmware";
 297                                 reg = <0xf0000 0x10000>;
 298                         };
 299                 };
 300         };
 301 };
 302 
 303 &rtc {
 304         status = "disabled";
 305 };
 306 
 307 &uart0 {
 308         status = "okay";
 309 
 310         pinctrl-names = "default";
 311         pinctrl-0 = <&uart0_pins>;
 312 };
 313 
 314 &watchdog {
 315         status = "okay";
 316 
 317         pinctrl-names = "default";
 318         pinctrl-0 = <&watchdog_pins>;
 319 };
 320 
 321 &wmac {
 322         status = "okay";
 323 
 324         pinctrl-names = "default";
 325         pinctrl-0 = <&epa_elna_pins>;
 326         mediatek,mtd-eeprom = <&factory 0x0>;
 327 };
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