Question about the external switch

In my understanding, For some SoCs, switch core is in the SoC and SoC also integrates GMACs . They usually just need external phys.

SoC(GMACs) --------external phys--------wire clients such as PC.

However, for some SoC, they don't have integrated switch core.
SoC(GMACs)-------- |cpu port of external switch-- non-cpu port of external switch|----- wire clients such as PC.

I want to know more about details about the cpu port of external switch. What level does it work? Does it provide phy or mac or anything else when it connects to GMACs of SoC? I guess they don't need to work in phy level because the distance between SoC and external switch is short and no need phy, right? If yes, does the cpu port also have the capability to work in the phy mode for some other SoCs which also have integrated phys?

It depends on the SoC and also on the switch:
RGMII to RGMII is possible without phy - and as examples

RMII to RMII might be possible, not sure

MII to MII is not possible

any MII to a switch that has a PHY is not possible without a second PHY.