So mine does not have USB port and power switch (that is consistent also with netis product page - those are "optional"), but also does not have the NAND flash chip intstalled and boots from "16M SPI flash" or "NOR" according to log from serial console. "Factory" openwrt image probably assumes root filesystem on "NAND" and fails to start.
===================================================================
MT7621 stage1 code Dec 16 2019 17:45:55 (ASIC)
CPU=500000000 HZ BUS=166666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11000000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL4 FB_DL: 0x10, 1/0 = 756/268 41000000
PLL2 FB_DL: 0x13, 1/0 = 567/457 4D000000
PLL3 FB_DL: 0x15, 1/0 = 725/299 55000000
DDR patch working
do DDR setting..[01F40000]
Apply DDR3 Setting...(use default AC)
0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
--------------------------------------------------------------------------------
0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1
000E:| 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
000F:| 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0
0010:| 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
0011:| 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DRAMC_DQSCTL1[0e0]=13000000
DRAMC_DQSGCTL[124]=80000033
rank 0 coarse = 15
rank 0 fine = 64
B:| 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0
opt_dle value:11
DRAMC_DDR2CTL[07c]=C287223D
DRAMC_PADCTL4[0e4]=000022B3
DRAMC_DQIDLY1[210]=0C0C0C0D
DRAMC_DQIDLY2[214]=090B0B0C
DRAMC_DQIDLY3[218]=0B090807
DRAMC_DQIDLY4[21c]=0B090B0B
DRAMC_R0DELDLY[018]=00001E21
==================================================================
RX DQS perbit delay software calibration
==================================================================
1.0-15 bit dq delay value
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 10 10 9 12 9 9 9 9 6 7
10 | 8 9 10 10 9 10
--------------------------------------
==================================================================
2.dqs window
x=pass dqs delay value (min~max)center
y=0-7bit DQ of every group
input delay:DQS0 =33 DQS1 = 30
==================================================================
bit DQS0 bit DQS1
0 (1~60)30 8 (1~58)29
1 (1~62)31 9 (0~58)29
2 (1~59)30 10 (1~58)29
3 (1~65)33 11 (1~56)28
4 (1~60)30 12 (1~58)29
5 (1~62)31 13 (1~57)29
6 (1~62)31 14 (1~60)30
7 (1~65)33 15 (1~58)29
==================================================================
3.dq delay value last
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 13 12 12 12 12 11 11 9 7 8
10 | 9 11 11 11 9 11
==================================================================
==================================================================
TX perbyte calibration
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1
dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2
DQ loop=15, cmp_err_1 = ffff0080
dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=1
DQ loop=14, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=14, finish count=2
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
DRAMC_DQODLY1[200]=88888888
DRAMC_DQODLY2[204]=88888888
20,data:88
[EMI] DRAMC calibration passed
===================================================================
MT7621 stage1 code done
CPU=500000000 HZ BUS=166666666 HZ
===================================================================
U-Boot SPL 2018.09 (Mar 15 2021 - 14:57:29 +0800)
Trying to boot from NOR
U-Boot 2018.09 (Mar 15 2021 - 14:57:29 +0800)
CPU: MediaTek MT7621AT ver 1, eco 3
Clocks: CPU: 880MHz, DDR: 600MHz, Bus: 220MHz, XTAL: 40MHz
Model: MediaTek MT7621 reference board
DRAM: 256 MiB
Loading Environment from SPI Flash... SF: Detected w25q128bv with page size 256 Bytes, erase size 64 KiB, total 16 MiB
*** Warning - bad CRC, using default environment
In: uartlite0@1e000c00
Out: uartlite0@1e000c00
Err: uartlite0@1e000c00
Net:
Warning: eth@1e100000 (eth0) using random MAC address - 9a:6f:4e:f2:e1:1f
eth0: eth@1e100000
common/board_r.c:651:run_main_loop
Emergency key hasn't pressed
bootcmd:mtkautoboot stored_bootdelay:0
Hit any key to stop autoboot: 0
prepare run comand list:mtkautoboot
*** U-Boot Boot Menu *** Press UP/DOWN to move, ENTER to select 1. Startup system (Default) 2. Upgrade firmware 3. Upgrade bootloader 4. Upgrade bootloader (advanced mode) 5. Load image 0. U-Boot console Hit any key to stop autoboot: 3 2 1 0 Prepare booting at offset 0x00000000
SF: Detected w25q128bv with page size 256 Bytes, erase size 64 KiB, total 16 MiB
Reading from flash 0x90000 to mem 0x80010000, size 0x3bbee8 ...
## Loading kernel from FIT Image at 80010000 ...
Using 'config@1' configuration
common/image-fit.c:2146:fit_image_load fit:80010000 cfg_noffset:0x3bbc70
Trying 'kernel@1' kernel subimage
Description: MIPS OpenWrt Linux-4.4.198
Type: Kernel Image
Compression: lzma compressed
Data Start: 0x8001011c
Data Size: 3903332 Bytes = 3.7 MiB
Architecture: MIPS
OS: Linux
Load Address: 0x81001000
Entry Point: 0x81001000
Hash algo: crc32
Hash value: 708cfb68
Hash algo: sha1
Hash value: c1d9e57772a6dbf2ee0e4244417b134424a7c7fa
Verifying Hash Integrity ... crc32+ sha1+ OK
common/image-fit.c:2002:fit_image_select fit:80010000 offset:0x000000a0 verify:-1
description:MIPS OpenWrt FIT (Flattened Image Tree) [00450000:006ce9a2:00000000:ReservedForFSCRCCustomerFSC
Get Info 00450000:006ce9a2:00000000:3030383a:30303031:666f2030
Number of crc info less than 6,no crc info
## Loading fdt from FIT Image at 80010000 ...
Using 'config@1' configuration
common/image-fit.c:2146:fit_image_load fit:80010000 cfg_noffset:0x3bbc70
Trying 'fdt@1' fdt subimage
Description: MIPS OpenWrt mt7621-rfb-ax-nor device tree blob
Type: Flat Device Tree
Compression: uncompressed
Data Start: 0x803c91c0
Data Size: 10750 Bytes = 10.5 KiB
Architecture: MIPS
Hash algo: crc32
Hash value: 9f37d348
Hash algo: sha1
Hash value: 94d84d4c145562db196126de9cb0658f6309b5ab
Verifying Hash Integrity ... crc32+ sha1+ OK
common/image-fit.c:2002:fit_image_select fit:80010000 offset:0x003b9134 verify:-1
description:MIPS OpenWrt FIT (Flattened Image Tree) [00450000:006ce9a2:00000000:ReservedForFSCRCCustomerFSC
Get Info 00450000:006ce9a2:00000000:3030383a:30303031:666f2030
Number of crc info less than 6,no crc info
Booting using the fdt blob at 0x803c91c0
Uncompressing Kernel Image ... OK
Loading Device Tree to 8fe97000, end 8fe9c9fd ... OK
[ 0.000000] Linux version 4.4.198 (netcore@netcore) (gcc version 5.4.0 (LEDE GCC 5.4.0 r0-d0c09cf) ) #0 SMP Fri Nov 26 07:28:04 UTC 2021
[ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[ 0.000000] bootconsole [early0] enabled
[ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[ 0.000000] MIPS: machine is MediaTek MT7621 RFB (802.11ax,SNOR)
[ 0.000000] Determined physical RAM map:
[ 0.000000] memory: 10000000 @ 00000000 (usable)
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] Zone ranges:
[ 0.000000] DMA [mem 0x0000000000000000-0x0000000000ffffff]
[ 0.000000] Normal [mem 0x0000000001000000-0x000000000fffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x000000000fffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x000000000fffffff]
[ 0.000000] VPE topology {2,2} total 4
[ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.000000] PERCPU: Embedded 10 pages/cpu @820d6000 s9824 r8192 d22944 u40960
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024
[ 0.000000] Kernel command line: console=ttyS0,115200 rootfstype=squashfs,jffs2
[ 0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[ 0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[ 0.000000] Writing ErrCtl register=0003f84c
[ 0.000000] Readback ErrCtl register=0003f84c
[ 0.000000] Memory: 244528K/262144K available (8115K kernel code, 4052K rwdata, 1896K rodata, 260K init, 785K bss, 17616K reserved, 0K cma-reserved)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] Hierarchical RCU implementation.
[ 0.000000] NR_IRQS:256
[ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
[ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns
[ 0.000009] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns
[ 0.007813] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
[ 0.070447] pid_max: default: 32768 minimum: 301
[ 0.075168] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.081695] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[ 0.089849] Performance counters: mips/1004K PMU enabled, 2 32-bit counters available to each CPU, irq 9
[ 2.813962] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 2.813971] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 2.813981] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 2.814130] CPU1 revision is: 0001992f (MIPS 1004Kc)
[ 0.178981] Synchronize counters for CPU 1: done.
[ 2.581186] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 2.581193] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 2.581199] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 2.581267] CPU2 revision is: 0001992f (MIPS 1004Kc)
[ 0.269354] Synchronize counters for CPU 2: done.
[ 2.671298] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 2.671304] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 2.671311] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 2.671391] CPU3 revision is: 0001992f (MIPS 1004Kc)
[ 0.354531] Synchronize counters for CPU 3: done.
[ 0.359272] Brought up 4 CPUs
[ 0.366782] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[ 0.376577] futex hash table entries: 1024 (order: 3, 32768 bytes)
[ 0.383135] pinctrl core: initialized pinctrl subsystem
[ 0.388920] NET: Registered protocol family 16
[ 0.428686] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 0.434361] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 0.439962] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 0.446123] mt7621-pci 1e140000.pcie: Failed to get gpio for PCIe1
[ 0.452239] mt7621-pci 1e140000.pcie: Failed to get gpio for PCIe2
[ 0.658769] PCIe port 2 link down
[ 0.662003] PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
[ 0.701636] usbcore: registered new interface driver usbfs
[ 0.707116] usbcore: registered new interface driver hub
[ 0.712523] usbcore: registered new device driver usb
[ 0.718262] PCI host bridge to bus 0000:00
[ 0.722295] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
[ 0.729154] pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff]
[ 0.735930] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
[ 0.742691] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
[ 0.751366] pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 0.759299] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[ 0.768852] pci 0000:00:00.0: BAR 9: assigned [mem 0x60000000-0x601fffff pref]
[ 0.776008] pci 0000:00:01.0: BAR 9: assigned [mem 0x60200000-0x603fffff pref]
[ 0.783150] pci 0000:00:00.0: BAR 1: assigned [mem 0x60400000-0x6040ffff]
[ 0.789901] pci 0000:00:01.0: BAR 1: assigned [mem 0x60410000-0x6041ffff]
[ 0.796624] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit pref]
[ 0.804343] pci 0000:01:00.0: BAR 2: assigned [mem 0x60100000-0x60103fff 64bit pref]
[ 0.812020] pci 0000:01:00.0: BAR 4: assigned [mem 0x60104000-0x60104fff 64bit pref]
[ 0.819719] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 0.824613] pci 0000:00:00.0: bridge window [mem 0x60000000-0x601fffff pref]
[ 0.831807] pci 0000:02:00.0: BAR 0: assigned [mem 0x60200000-0x602fffff 64bit pref]
[ 0.839495] pci 0000:02:00.0: BAR 2: assigned [mem 0x60300000-0x60303fff 64bit pref]
[ 0.847202] pci 0000:02:00.0: BAR 4: assigned [mem 0x60304000-0x60304fff 64bit pref]
[ 0.854870] pci 0000:00:01.0: PCI bridge to [bus 02]
[ 0.859795] pci 0000:00:01.0: bridge window [mem 0x60200000-0x603fffff pref]
[ 0.868764] clocksource: Switched to clocksource GIC
[ 0.875818] NET: Registered protocol family 2
[ 0.880816] TCP established hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.887702] TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
[ 0.894154] TCP: Hash tables configured (established 2048 bind 2048)
[ 0.900514] UDP hash table entries: 256 (order: 1, 8192 bytes)
[ 0.906261] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[ 0.912803] NET: Registered protocol family 1
[ 0.931704] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 0.937458] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[ 0.950226] io scheduler noop registered
[ 0.954067] io scheduler deadline registered (default)
[ 0.960886] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
[ 0.968167] console [ttyS0] disabled
[ 0.971752] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 33, base_baud = 3125000) is a 16550A
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ÉĺÁę"ĽÍą5Rţ[ 0.996098] 1e000d00.uartfull: ttyS1 at MMIO 0x1e000d00 (irq = 34, base_baud = 3125000) is a 16550A
[ 1.005622] 1e000e00.uartfull: ttyS2 at MMIO 0x1e000e00 (irq = 35, base_baud = 3125000) is a 16550A
[ 1.020044] m25p80 spi32766.0: w25q128 (16384 Kbytes)
[ 1.025146] 4 ofpart partitions found on MTD device spi32766.0
[ 1.031011] Creating 4 MTD partitions on "spi32766.0":
[ 1.036155] 0x000000000000-0x000000030000 : "Bootloader"
[ 1.042814] 0x000000030000-0x000000040000 : "Config"
[ 1.049025] 0x000000050000-0x000000090000 : "Factory"
[ 1.055235] 0x000000090000-0x000001000000 : "firmware"
[ 1.071269] 2 fit-fw partitions found on MTD device firmware
[ 1.076953] 0x000000090000-0x000000450000 : "kernel"
[ 1.083257] 0x000000450000-0x000001000000 : "rootfs"
[ 1.089477] mtd: device 5 (rootfs) set to be root filesystem
[ 1.095315] buf:
[ 1.097412] 2 squashfs-split partitions found on MTD device rootfs
[ 1.103815] 0x000000b20000-0x000000b30000 : "rootfs_ext"
[ 1.110353] 0x000000b30000-0x000001000000 : "rootfs_data"
[ 1.117388] libphy: Fixed MDIO Bus: probed
[ 1.122061] Update mtk eth 8ff90010,base be100000,name is (null)
[ 1.189037] libphy: mdio: probed
[ 1.192834] mtk_soc_eth 1e100000.ethernet: generated random MAC address b2:3b:3a:2f:b3:3d
[ 1.201541] mtk_soc_eth 1e100000.ethernet: connected mac 0 to PHY at fixed-0:00 [uid=00000000, driver=Generic PHY]
[ 1.212731] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 10
[ 1.221199] mtk_soc_eth 1e100000.ethernet: generated random MAC address 7e:11:7f:f4:d4:06
[ 1.229917] mtk_soc_eth 1e100000.ethernet: connected mac 1 to PHY at fixed-0:01 [uid=00000000, driver=Generic PHY]
[ 1.241066] mtk_soc_eth 1e100000.ethernet eth1: mediatek frame engine at 0xbe100000, irq 10
[ 1.249723] PPP generic driver version 2.4.2
[ 1.254202] NET: Registered protocol family 24
[ 1.259553] register mt_drv
[ 1.262550] <--mt7916_hif_init()
[ 1.266231] Rx[0] Ring: total 24576 bytes allocated
[ 1.275415] Rx[1] Ring: total 16384 bytes allocated
[ 1.280429] <-- pci_alloc_tx_rx_ring_mem, Status=0
[ 1.318882] Update wifi led pAd,addr:c0301000
[ 1.323263]
[ 1.323263]
[ 1.323263] === pAd = c0301000, size = 13587200 ===
[ 1.323263]
[ 1.334400] <-- RTMPAllocAdapterBlock, Status=0
[ 1.339000] PCI CSRBaseAddress =0xc0200000, csr_addr=0xc0200000!
[ 1.345011] RTMPInitPCIeDevice():device_id=0x7915
[ 1.349735] mt7915_init()-->
[ 1.352614] Use the default iPAiLNA bin image!
[ 1.357128] <--mt7915_init()
[ 1.360305] RtmpOSFileOpen(): Error 2 opening /etc/wireless/l1profile.dat
[ 1.368096] wdev_init(caller:RTMP_COM_IoctlHandle+0x39c/0x18a4), wdev(0)
[ 1.375652] Rx[0] Ring: total 24576 bytes allocated
[ 1.380778] Rx[1] Ring: total 24576 bytes allocated
[ 1.387856] Rx[2] Ring: total 8192 bytes allocated
[ 1.396968] Rx[3] Ring: total 16384 bytes allocated
[ 1.404187] Rx[4] Ring: total 8192 bytes allocated
[ 1.409082] <-- pci_alloc_tx_rx_ring_mem, Status=0
...