Onhub TP-LINK TGR1900 future support?

Today I worked on getting an OpenWRT image built that I could flash to a USB drive.

First, I captured a "diagnostic report", using the api/v1/diagnostic-report api mentioned in olssonm/google-wifi-api. That gives me access to the following files (not sure which are helpful)

./proc
./proc/net
./proc/net/arp
./proc/slabinfo
./etc
./etc/lsb-release
./var
./var/log
./var/log/boot.log
./var/log/messages
./var/log/messages.log
./var/log/update_engine
./var/log/update_engine/update_engine.19700101-000008
./var/log/net.log
./var/log/webservd
./var/log/webservd/2017-04-28.log
./sys
./sys/firmware
./sys/firmware/log
./tmp
./tmp/debug-log

My work so far is in my fork (https://github.com/rmelick/openwrt/pull/1/files).

This is my first time working with firmware, device trees, etc., so I could use any help from someone with more OpenWRT experience to help guide the configuration. Most of it was copy pasted from either the commit from @bnorris to add support for Google Wifi, and the device tree is from the chromiumOS whirlwind-sp5 dts file.

I flashed the built image to a USB, but had the same issue as @bnorris - the router would go dark after booting from the USB, and since I don't have serial access I couldn't see anything.

I have a few questions, if anyone can help I think I could make more forward progress:

  1. Is it recommended to start with a very simple device tree, or to start with the one I copy pasted? What are the critical elements to get boot from USB and SSH access working?
  2. Is there a way in the device tree to enable regular TTL serial using the pins that would normally be used for SWD? That would allow me to use my existing adapter.
  3. Is there anything I need to do while configuring the openWRT build so that it enables ssh access over the ethernet port after boot?
  4. Is there a way to configure the OpenWRT to write logs to the usb when it tries booting (and then a way to read those logs back off?)
  5. What further information can I collect or share that would be helpful to OpenWRT experts?
  6. What errors can I look for during the OpenWRT build that will help me catch any issues with my device tree.

For example, I saw these warnings when building with make V=s

arch/arm/boot/dts/qcom-ipq8064-onhub.dts:324.6-16: Warning (reg_format): /soc/gsbi@16500000/spi@16580000/spidev@0:reg: property has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:447.11-460.6: Warning (pci_bridge): /soc/pci@1b500000/pcie@0: missing ranges for PCI bridge (or not a bridge)
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:453.16-459.7: Warning (pci_bridge): /soc/pci@1b500000/pcie@0/ath10k@0,0: node name is not "pci" or "pcie"
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:453.16-459.7: Warning (pci_bridge): /soc/pci@1b500000/pcie@0/ath10k@0,0: missing ranges for PCI bridge (or not a bridge)
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:453.16-459.7: Warning (pci_bridge): /soc/pci@1b500000/pcie@0/ath10k@0,0: incorrect #address-cells for PCI bridge
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:453.16-459.7: Warning (pci_bridge): /soc/pci@1b500000/pcie@0/ath10k@0,0: incorrect #size-cells for PCI bridge
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:470.11-483.6: Warning (pci_bridge): /soc/pci@1b700000/pcie@0: missing ranges for PCI bridge (or not a bridge)
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:476.16-482.7: Warning (pci_bridge): /soc/pci@1b700000/pcie@0/ath10k@0,0: node name is not "pci" or "pcie"
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:476.16-482.7: Warning (pci_bridge): /soc/pci@1b700000/pcie@0/ath10k@0,0: missing ranges for PCI bridge (or not a bridge)
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:476.16-482.7: Warning (pci_bridge): /soc/pci@1b700000/pcie@0/ath10k@0,0: incorrect #address-cells for PCI bridge
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:476.16-482.7: Warning (pci_bridge): /soc/pci@1b700000/pcie@0/ath10k@0,0: incorrect #size-cells for PCI bridge
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:493.11-504.6: Warning (pci_bridge): /soc/pci@1b900000/pcie@0: missing ranges for PCI bridge (or not a bridge)
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:499.16-503.7: Warning (pci_bridge): /soc/pci@1b900000/pcie@0/ath10k@0,0: node name is not "pci" or "pcie"
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:499.16-503.7: Warning (pci_bridge): /soc/pci@1b900000/pcie@0/ath10k@0,0: missing ranges for PCI bridge (or not a bridge)
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:499.16-503.7: Warning (pci_bridge): /soc/pci@1b900000/pcie@0/ath10k@0,0: incorrect #address-cells for PCI bridge
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:499.16-503.7: Warning (pci_bridge): /soc/pci@1b900000/pcie@0/ath10k@0,0: incorrect #size-cells for PCI bridge
arch/arm/boot/dts/qcom-ipq8064-onhub.dtb: Warning (pci_device_bus_num): Failed prerequisite 'reg_format'
arch/arm/boot/dts/qcom-ipq8064-onhub.dtb: Warning (pci_device_bus_num): Failed prerequisite 'pci_bridge'
arch/arm/boot/dts/qcom-ipq8064-onhub.dtb: Warning (i2c_bus_reg): Failed prerequisite 'reg_format'
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:313.23-327.6: Warning (spi_bus_bridge): /soc/gsbi@16500000/spi@16580000: incorrect #address-cells for SPI bus
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:313.23-327.6: Warning (spi_bus_bridge): /soc/gsbi@16500000/spi@16580000: incorrect #size-cells for SPI bus
arch/arm/boot/dts/qcom-ipq8064-onhub.dtb: Warning (spi_bus_reg): Failed prerequisite 'reg_format'
arch/arm/boot/dts/qcom-ipq8064-onhub.dtb: Warning (spi_bus_reg): Failed prerequisite 'spi_bus_bridge'
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:322.14-326.7: Warning (avoid_default_addr_size): /soc/gsbi@16500000/spi@16580000/spidev@0: Relying on default #address-cells value
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:322.14-326.7: Warning (avoid_default_addr_size): /soc/gsbi@16500000/spi@16580000/spidev@0: Relying on default #size-cells value
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:300.5-301.22: Warning (dmas_property): /soc/gsbi@1a200000/spi@1a280000:dmas: cell 2 is not a phandle reference
arch/arm/boot/dts/qcom-ipq8064.dtsi:899.17-910.6: Warning (dmas_property): /soc/gsbi@1a200000/spi@1a280000: Missing property '#dma-cells' in node /soc/clock-controller@2098000 or bad phandle (referred from dmas[2])
  also defined at arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi:30.23-46.6
  also defined at arch/arm/boot/dts/qcom-ipq8064-onhub.dts:294.23-308.6
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:319.5-320.24: Warning (dmas_property): /soc/gsbi@16500000/spi@16580000:dmas: cell 2 is not a phandle reference
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:313.23-327.6: Warning (dmas_property): /soc/gsbi@16500000/spi@16580000: Missing property '#dma-cells' in node /soc/rpm@108000/regulators/s2b or bad phandle (referred from dmas[2])
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:457.6-41: Warning (gpios_property): /soc/pci@1b500000/pcie@0/ath10k@0,0:qcom,ath10k-sa-gpio: cell 0 is not a phandle reference
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:453.16-459.7: Warning (gpios_property): /soc/pci@1b500000/pcie@0/ath10k@0,0: Missing property '#gpio-cells' in node /soc/qfprom@700000/speedbin@0c0 or bad phandle (referred from qcom,ath10k-sa-gpio[0])
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:480.6-41: Warning (gpios_property): /soc/pci@1b700000/pcie@0/ath10k@0,0:qcom,ath10k-sa-gpio: cell 0 is not a phandle reference
arch/arm/boot/dts/qcom-ipq8064-onhub.dts:476.16-482.7: Warning (gpios_property): /soc/pci@1b700000/pcie@0/ath10k@0,0: Missing property '#gpio-cells' in node /soc/qfprom@700000/speedbin@0c0 or bad phandle (referred from qcom,ath10k-sa-gpio[0])