Need help with making uboot on MT7986B

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1

target box: tp-link XDR6050
SoC: MT7986BLA(512MB DDR3 on chip)
ROM: 16MB spi-nor flash

tear down article

since it's only storage chip is a XMC spi flash, I can easily r/w it by using a 8-pins clamp connected to the programmer board.
And the UART pins(near reset button) work fine.

in the post "Adding support for TP-Link XDR-6086" we had known tp's uboot is locked, so my first job is to compile the corresponding TF-A and uboot. but since there's no defconfig and dts matching mt7986b+nor, I've try serval version of uboot(2023.7, 2024.1, and MTK's github fork) and adjust some configs to compile.
Unfortunately none of them works. I can't even see uboot's version string.

A representative bootlog is post at the end. seems TF-A is working well?

I don't have much experience working with uboot, how to deal with this kind of this error?


F0: 102B 0000
FA: 0000 0000
V0: 0000 0000 [0001]
00: 0000 0000
BP: 2400 0041 [0000]
G0: 1190 0000
EC: 0000 0000 [0000]
T0: 0000 01FB [010F]
Jump to BL

NOTICE:  BL2: v2.9.0(release):my TF-A
NOTICE:  BL2: Built : 02:43:37, Mar  7 2024
NOTICE:  WDT: Cold boot
NOTICE:  WDT: disabled
NOTICE:  CPU: MT7986 (1600MHz)
NOTICE:  EMI: Using DDR3 settings
NOTICE:  EMI: Detected DRAM size: 512MB
NOTICE:  EMI: complex R/W mem test passed
NOTICE:  BL2: Booting BL31
NOTICE:  BL31: v2.9.0(release):my TF-A
NOTICE:  BL31: Built : 02:43:42, Mar  7 2024
size=30, ptr=30, limit=4000: 41ed8f90
size=30, ptr=60, limit=4000: 41ed8fc0
size=98, ptr=f8, limit=4000: 41ed8ff0
bind node config
Device 'config' has no compatible string
bind node cpus
Device 'cpus' has no compatible string
bind node dummy12m
   - attempt to match compatible string 'fixed-clock'
   - found match at 'fixed_clock': 'fixed-clock' matches 'fixed-clock'
size=30, ptr=128, limit=4000: 41ed9088
size=98, ptr=1c0, limit=4000: 41ed90b8
size=30, ptr=1f0, limit=4000: 41ed9150
Bound device dummy12m to root_driver
bind node hwver
   - attempt to match compatible string 'mediatek,hwver'
   - attempt to match compatible string 'syscon'
Skipping device pre-relocation
bind node timer
   - attempt to match compatible string 'arm,armv8-timer'
No match for node 'timer'
   - ignoring disabled device
   - ignoring disabled device
bind node interrupt-controller@c000000
   - attempt to match compatible string 'arm,gic-v3'
No match for node 'interrupt-controller@c000000'
bind node apmixedsys@1001E000
   - attempt to match compatible string 'mediatek,mt7986-fixed-plls'
   - found match at 'mt7986-clock-fixed-pll': 'mediatek,mt7986-fixed-plls' matches 'mediatek,mt7986-fixed-plls'
size=98, ptr=288, limit=4000: 41ed9180
Bound device apmixedsys@1001E000 to root_driver
bind node topckgen@1001B000
   - attempt to match compatible string 'mediatek,mt7986-topckgen'
   - found match at 'mt7986-clock-topckgen': 'mediatek,mt7986-topckgen' matches 'mediatek,mt7986-topckgen'
size=98, ptr=320, limit=4000: 41ed9218
Bound device topckgen@1001B000 to root_driver
bind node infracfg_ao@10001000
   - attempt to match compatible string 'mediatek,mt7986-infracfg_ao'
   - found match at 'mt7986-clock-infracfg-ao': 'mediatek,mt7986-infracfg_ao' matches 'mediatek,mt7986-infracfg_ao'
size=98, ptr=3b8, limit=4000: 41ed92b0
Bound device infracfg_ao@10001000 to root_driver
bind node infracfg@10001040
   - attempt to match compatible string 'mediatek,mt7986-infracfg'
   - found match at 'mt7986-clock-infracfg': 'mediatek,mt7986-infracfg' matches 'mediatek,mt7986-infracfg'
size=98, ptr=450, limit=4000: 41ed9348
Bound device infracfg@10001040 to root_driver
bind node pinctrl@1001f000
   - attempt to match compatible string 'mediatek,mt7986-pinctrl'
Skipping device pre-relocation
   - ignoring disabled device
bind node serial@11002000
   - attempt to match compatible string 'mediatek,hsuart'
   - found match at 'serial_mtk': 'mediatek,hsuart' matches 'mediatek,hsuart'
size=30, ptr=480, limit=4000: 41ed93e0
size=98, ptr=518, limit=4000: 41ed9410
Bound device serial@11002000 to root_driver
   - ignoring disabled device
   - ignoring disabled device
   - ignoring disabled device
bind node syscon@15000000
   - attempt to match compatible string 'mediatek,mt7986-ethsys'
Skipping device pre-relocation
bind node ethernet@15100000
   - attempt to match compatible string 'mediatek,mt7986-eth'
Skipping device pre-relocation
bind node syscon@10060000
   - attempt to match compatible string 'mediatek,mt7986-sgmiisys'
   - attempt to match compatible string 'syscon'
Skipping device pre-relocation
bind node syscon@10070000
   - attempt to match compatible string 'mediatek,mt7986-sgmiisys'
   - attempt to match compatible string 'syscon'
Skipping device pre-relocation
bind node spi@1100a000
   - attempt to match compatible string 'mediatek,ipm-spi'
Skipping device pre-relocation
   - ignoring disabled device
   - ignoring disabled device
   - ignoring disabled device
   - ignoring disabled device
bind node chosen
Device 'chosen' has no compatible string
bind node memory@40000000
Device 'memory@40000000' has no compatible string
"Synchronous Abort" handler, esr 0x96000021, far 0x41e42a81
elr: 0000000041e02394 lr : 0000000041e283cc
x0 : 0000000041ed8ec8 x1 : 0000000041e42a81
x2 : 0000000000000007 x3 : 0000000000000065
x4 : 0000000041e42a88 x5 : 0000000041ed8ecf
x6 : 0000000000000065 x7 : 0000000041e5cf90
x8 : 0000000000000d5c x9 : 0000000041ed8c1c
x10: 0000000000000003 x11: 0000000000001bb0
x12: 0000000041ed8cc8 x13: 0000000041e5cf90
x14: 0000000041e5cf90 x15: 0000000041ed8940
x16: 0000000000000000 x17: 0000000000000000
x18: 0000000041ed8dd0 x19: 0000000000000006
x20: 0000000041e42a78 x21: 0000000000000009
x22: 0000000041e46937 x23: 0000000000000020
x24: 0000000041ed8ec8 x25: 0000000041e42a78
x26: 0000000000000000 x27: 0000000000000000
x28: 0000000000000000 x29: 0000000041ed8cb0

Code: f9000006 f81f80a7 d65f03c0 361000c2 (b9400026)
Resetting CPU ...

resetting ...
size=30, ptr=548, limit=4000: 41ed94a8
(rebooting)
2

u-boot isn't supported by Openwrt, you should find some u-boot related forum.
Openwrt uses it, but doesn't do any development.

3

It seem that the device tree blob of u-boot is broken, the “flp” partition size defined in here is 512KB, I guess that the size of your "fip.bin" is larger than 512KB and some of the data in the device tree blob appended to the end of the image is clipped

4

but I think uboot's dtb has been loaded completely.
uboot generated dts here(conver from u-boot.dtb by scripts/dtc):
I use the approach from openwrt/package/boot/uboot-mediatek/Makefile to build the fip.img(by xz+fiptool), it's just 148kb.

my mtd parts config:

CONFIG_MTDIDS_DEFAULT="nor0=nor0"
CONFIG_MTDPARTS_DEFAULT="nor0:256k(bl2),64k(u-boot-env),320k(factory),512k(fip),-(firmware)"

since the programmer need to flash the whole 16M, I just filled bl2+fip, and left other partitions emtpy(0xff), is that ok?

/dts-v1/;

/ {
	compatible = "mediatek,mt7986", "mediatek,mt7986-rfb";
	interrupt-parent = <0x1>;
	#address-cells = <0x1>;
	#size-cells = <0x1>;
	model = "my xdr6050";

	config {
		u-boot,mmc-env-partition = "u-boot-env";
	};

	cpus {
		#address-cells = <0x1>;
		#size-cells = <0x0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x0>;
			mediatek,hwver = <0x2>;
		};

		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x1>;
			mediatek,hwver = <0x2>;
		};

		cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x2>;
			mediatek,hwver = <0x2>;
		};

		cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x3>;
			mediatek,hwver = <0x2>;
		};
	};

	dummy12m {
		compatible = "fixed-clock";
		clock-frequency = <0xb71b00>;
		#clock-cells = <0x0>;
		bootph-all;
		phandle = <0xf>;
	};

	hwver {
		compatible = "mediatek,hwver", "syscon";
		reg = <0x8000000 0x1000>;
		phandle = <0x2>;
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupt-parent = <0x1>;
		clock-frequency = <0xc65d40>;
		interrupts = <0x1 0xd 0x8 0x1 0xe 0x8 0x1 0xb 0x8 0x1 0xa 0x8>;
		arm,cpu-registers-not-fw-configured;
	};

	timer@10008000 {
		compatible = "mediatek,mt7986-timer";
		reg = <0x10008000 0x1000>;
		interrupts = <0x0 0x82 0x4>;
		clocks = <0x3 0x0>;
		clock-names = "gpt-clk";
		bootph-all;
		status = "disabled";
	};

	watchdog@1001c000 {
		compatible = "mediatek,mt7986-wdt";
		reg = <0x1001c000 0x1000>;
		interrupts = <0x0 0x6e 0x4>;
		#reset-cells = <0x1>;
		status = "disabled";
	};

	interrupt-controller@c000000 {
		compatible = "arm,gic-v3";
		#interrupt-cells = <0x3>;
		interrupt-parent = <0x1>;
		interrupt-controller;
		reg = <0xc000000 0x40000 0xc080000 0x200000>;
		interrupts = <0x1 0x9 0x4>;
		phandle = <0x1>;
	};

	apmixedsys@1001E000 {
		compatible = "mediatek,mt7986-fixed-plls";
		reg = <0x1001e000 0x1000>;
		#clock-cells = <0x1>;
		phandle = <0x4>;
	};

	topckgen@1001B000 {
		compatible = "mediatek,mt7986-topckgen";
		reg = <0x1001b000 0x1000>;
		clock-parent = <0x4>;
		#clock-cells = <0x1>;
		phandle = <0x5>;
	};

	infracfg_ao@10001000 {
		compatible = "mediatek,mt7986-infracfg_ao";
		reg = <0x10001000 0x68>;
		clock-parent = <0x3>;
		#clock-cells = <0x1>;
		phandle = <0x6>;
	};

	infracfg@10001040 {
		compatible = "mediatek,mt7986-infracfg";
		reg = <0x10001000 0x1000>;
		clock-parent = <0x5>;
		#clock-cells = <0x1>;
		phandle = <0x3>;
	};

	pinctrl@1001f000 {
		compatible = "mediatek,mt7986-pinctrl";
		reg = <0x1001f000 0x1000 0x11c30000 0x1000 0x11c40000 0x1000 0x11e20000 0x1000 0x11e30000 0x1000 0x11f00000 0x1000 0x11f10000 0x1000 0x1000b000 0x1000>;
		reg-names = "gpio_base", "iocfg_rt_base", "iocfg_rb_base", "iocfg_lt_base", "iocfg_lb_base", "iocfg_tr_base", "iocfg_tl_base", "eint";

		gpio-controller {
			gpio-controller;
			#gpio-cells = <0x2>;
			phandle = <0xa>;
		};

		spi1-pins-func-1 {

			mux {
				function = "spi";
				groups = "spi1_2";
			};
		};

		spi1-pins-func-3 {
			phandle = <0x7>;

			mux {
				function = "uart";
				groups = "uart1_2";
			};
		};

		pwm0-pins-func-1 {

			mux {
				function = "pwm";
				groups = "pwm0";
			};
		};

		mmc0default {

			mux {
				function = "flash";
				groups = "emmc_51";
			};
		};

		spi0-pins-func-1 {
			phandle = <0xb>;

			mux {
				function = "flash";
				groups = "spi0", "spi0_wp_hold";
			};

			conf-pu {
				pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
				drive-strength = <0x8>;
				bias-pull-up = <0x64>;
			};

			conf-pd {
				pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
				drive-strength = <0x8>;
				bias-pull-down = <0x64>;
			};
		};
	};

	pwm@10048000 {
		compatible = "mediatek,mt7986-pwm";
		reg = <0x10048000 0x1000>;
		#clock-cells = <0x1>;
		#pwm-cells = <0x2>;
		interrupts = <0x0 0x89 0x4>;
		clocks = <0x3 0x5 0x6 0x2c 0x6 0x3 0x6 0x4>;
		assigned-clocks = <0x5 0x3c 0x3 0x2c 0x3 0x2a 0x3 0x2b>;
		assigned-clock-parents = <0x5 0x3 0x3 0x5 0x3 0x5 0x3 0x5>;
		clock-names = "top", "main", "pwm1", "pwm2";
		status = "disabled";
		bootph-all;
	};

	serial@11002000 {
		compatible = "mediatek,hsuart";
		reg = <0x11002000 0x400>;
		interrupts = <0x0 0x7b 0x4>;
		clocks = <0x6 0x14>;
		assigned-clocks = <0x5 0x3b 0x6 0x25>;
		assigned-clock-parents = <0x5 0x0 0x3 0x1>;
		mediatek,force-highspeed;
		status = "okay";
		bootph-all;
	};

	serial@11003000 {
		compatible = "mediatek,hsuart";
		reg = <0x11003000 0x400>;
		interrupts = <0x0 0x7c 0x4>;
		clocks = <0x6 0x15>;
		assigned-clocks = <0x3 0x26>;
		assigned-clock-parents = <0x3 0x0>;
		mediatek,force-highspeed;
		status = "disabled";
		pinctrl-names = "default";
		pinctrl-0 = <0x7>;
	};

	serial@11004000 {
		compatible = "mediatek,hsuart";
		reg = <0x11004000 0x400>;
		interrupts = <0x0 0x7c 0x4>;
		clocks = <0x6 0x16>;
		assigned-clocks = <0x3 0x27>;
		assigned-clock-parents = <0x3 0x0>;
		mediatek,force-highspeed;
		status = "disabled";
	};

	snand@11005000 {
		compatible = "mediatek,mt7986-snand";
		reg = <0x11005000 0x1000 0x11006000 0x1000>;
		reg-names = "nfi", "ecc";
		clocks = <0x6 0x18 0x6 0x17 0x6 0x19>;
		clock-names = "pad_clk", "nfi_clk", "nfi_hclk";
		assigned-clocks = <0x5 0x38 0x5 0x37>;
		assigned-clock-parents = <0x5 0x4 0x5 0x4>;
		status = "disabled";
	};

	syscon@15000000 {
		compatible = "mediatek,mt7986-ethsys", "syscon";
		reg = <0x15000000 0x1000>;
		clock-parent = <0x5>;
		#clock-cells = <0x1>;
		#reset-cells = <0x1>;
		phandle = <0x8>;
	};

	ethernet@15100000 {
		compatible = "mediatek,mt7986-eth", "syscon";
		reg = <0x15100000 0x20000>;
		resets = <0x8 0x6>;
		reset-names = "fe";
		mediatek,ethsys = <0x8>;
		mediatek,sgmiisys = <0x9>;
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		status = "okay";
		mediatek,gmac-id = <0x0>;
		phy-mode = "2500base-x";
		mediatek,switch = "mt7531";
		reset-gpios = <0xa 0x5 0x0>;

		fixed-link {
			speed = <0x9c4>;
			full-duplex;
		};
	};

	syscon@10060000 {
		compatible = "mediatek,mt7986-sgmiisys", "syscon";
		reg = <0x10060000 0x1000>;
		#clock-cells = <0x1>;
		phandle = <0x9>;
	};

	syscon@10070000 {
		compatible = "mediatek,mt7986-sgmiisys", "syscon";
		reg = <0x10070000 0x1000>;
		#clock-cells = <0x1>;
	};

	spi@1100a000 {
		compatible = "mediatek,ipm-spi";
		reg = <0x1100a000 0x100>;
		clocks = <0x6 0x1a 0x5 0x39>;
		assigned-clocks = <0x5 0x39 0x3 0x28>;
		assigned-clock-parents = <0x5 0x2 0x5 0x2>;
		clock-names = "sel-clk", "spi-clk";
		interrupts = <0x0 0x8c 0x4>;
		status = "okay";
		#address-cells = <0x1>;
		#size-cells = <0x0>;
		pinctrl-names = "default";
		pinctrl-0 = <0xb>;
		must_tx;
		enhance_timing;
		dma_ext;
		ipm_design;
		support_quad;
		tick_dly = <0x1>;
		sample_sel = <0x0>;

		spi_nor@0 {
			compatible = "jedec,spi-nor";
			reg = <0x0>;
			spi-max-frequency = <0x3197500>;

			partitions {
				compatible = "fixed-partitions";
				#address-cells = <0x1>;
				#size-cells = <0x1>;

				partition@00000 {
					label = "BL2";
					reg = <0x0 0x40000>;
				};

				partition@40000 {
					label = "u-boot-env";
					reg = <0x40000 0x10000>;
				};

				partition@50000 {
					label = "Factory";
					reg = <0x50000 0xb0000>;
				};

				partition@100000 {
					label = "FIP";
					reg = <0x100000 0x80000>;
				};

				partition@180000 {
					label = "firmware";
					reg = <0x180000 0xe00000>;
				};
			};
		};
	};

	spi@1100b000 {
		compatible = "mediatek,ipm-spi";
		reg = <0x1100b000 0x100>;
		interrupts = <0x0 0x8d 0x4>;
		status = "disabled";
	};

	mmc@11230000 {
		compatible = "mediatek,mt7986-mmc";
		reg = <0x11230000 0x1000 0x11c20000 0x1000>;
		interrupts = <0x0 0x8f 0x4>;
		clocks = <0x5 0x28 0x5 0x27 0x6 0x1f>;
		assigned-clocks = <0x5 0x40 0x5 0x3f>;
		assigned-clock-parents = <0x5 0x1 0x5 0x11>;
		clock-names = "source", "hclk", "source_cg";
		status = "disabled";
	};

	xhci@11200000 {
		compatible = "mediatek,mt7986-xhci", "mediatek,mtk-xhci";
		reg = <0x11200000 0x2e00 0x11203e00 0x100>;
		reg-names = "mac", "ippc";
		interrupts = <0x0 0xad 0x4>;
		phys = <0xc 0x3 0xd 0x4 0xe 0x3>;
		clocks = <0xf 0xf 0xf 0xf 0xf>;
		clock-names = "sys_ck", "xhci_ck", "ref_ck", "mcu_ck", "dma_ck";
		tpl-support;
		status = "disabled";
	};

	usb-phy@11e10000 {
		compatible = "mediatek,mt7986", "mediatek,generic-tphy-v2";
		#address-cells = <0x1>;
		#size-cells = <0x1>;
		status = "disabled";

		usb-phy@11e10000 {
			reg = <0x11e10000 0x700>;
			clocks = <0xf>;
			clock-names = "ref";
			#phy-cells = <0x1>;
			status = "okay";
			phandle = <0xc>;
		};

		usb-phy@11e10700 {
			reg = <0x11e10700 0x900>;
			clocks = <0xf>;
			clock-names = "ref";
			#phy-cells = <0x1>;
			status = "okay";
			phandle = <0xd>;
		};

		usb-phy@11e11000 {
			reg = <0x11e11000 0x700>;
			clocks = <0xf>;
			clock-names = "ref";
			#phy-cells = <0x1>;
			status = "okay";
			phandle = <0xe>;
		};
	};

	chosen {
		stdout-path = "/serial@11002000";
		tick-timer = "/timer@10008000";
	};

	memory@40000000 {
		device_type = "memory";
		reg = <0x40000000 0x10000000>;
	};
};