It's my source device-tree,the lan led conneted to gpio 29 and gpio 35,and 29 is yellow led,35 is green led.
I want to make yellow led blink when is have data and green led is light when it up
/dts-v1/;
/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
*
- Permission to use, copy, modify, and/or distribute this software for any
- purpose with or without fee is hereby granted, provided that the above
- copyright notice and this permission notice appear in all copies.
- THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
- WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
- MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
- ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
- WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
- ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
- OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#include "qcom-ipq5018.dtsi"
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Qualcomm Technologies, Inc. IPQ5018/AP-MP03.1";
compatible = "qcom,ipq5018-mp03.1", "qcom,ipq5018";
interrupt-parent = <&intc>;
aliases {
sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
serial0 = &blsp1_uart1;
serial1 = &blsp1_uart2;
ethernet0 = "/soc/dp1";
};
chosen {
bootargs = "console=ttyMSM0,115200,n8 rw init=/init";
#ifdef __IPQ_MEM_PROFILE_256_MB__
bootargs-append = " swiotlb=1";
#else
bootargs-append = " swiotlb=1 coherent_pool=2M";
#endif
stdout-path = "serial0";
};
reserved-memory {
#ifdef __IPQ_MEM_PROFILE_256_MB__
/* 256 MB Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 8MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x40800000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* + | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 23MB |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4C700000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4C800000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4C900000 | 21MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x4DE00000 | 9MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_region: wcnss@4b000000 {
no-map;
reg = <0x0 0x4b000000 0x0 0x01700000>;
};
m3_dump@4c700000 {
no-map;
reg = <0x0 0x4C700000 0x0 0x100000>;
};
q6_etr_region:q6_etr_dump@4c800000 {
no-map;
reg = <0x0 0x4c800000 0x0 0x100000>;
};
qcn9000_pcie0: qcn9000_pcie0@4c900000 {
no-map;
reg = <0x0 0x4C900000 0x0 0x01500000>;
};
#if defined(__CNSS2__)
mhi_region1: dma_pool1@4de00000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x4de00000 0x0 0x00900000>;
};
#endif
#elif __IPQ_MEM_PROFILE_512_MB__
/* 512 MB Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 16MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x41000000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 24MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4C800000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4C900000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4CA00000 | 2MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4CC00000 | 38MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x4F200000 | 9MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_region: wcnss@4b000000 {
no-map;
reg = <0x0 0x4b000000 0x0 0x01800000>;
};
m3_dump@4c800000 {
no-map;
reg = <0x0 0x4c800000 0x0 0x100000>;
};
q6_etr_region:q6_etr_dump@4c900000 {
no-map;
reg = <0x0 0x4c900000 0x0 0x100000>;
};
q6_caldb_region:q6_caldb_region@4ca00000 {
no-map;
reg = <0x0 0x4ca00000 0x0 0x200000>;
};
qcn9000_pcie0: qcn9000_pcie0@4cc00000 {
no-map;
reg = <0x0 0x4CC00000 0x0 0x02600000>;
};
#if defined(__CNSS2__)
mhi_region1: dma_pool1@4f200000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x4f200000 0x0 0x00900000>;
};
#endif
#else
/* 1G Profile
* +=========+==============+========================+
* | | | |
* | Region | Start Offset | Size |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | NSS | 0x40000000 | 16MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | | | |
* | Linux | 0x41000000 | Depends on total memory |
* | | | |
* | | | |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | uboot | 0x4A600000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | SBL | 0x4AA00000 | 1MB |
* +--------+--------------+-------------------------+
* | smem | 0x4AB00000 | 1MB |
* +--------+--------------+-------------------------+
* | | | |
* | TZ | 0x4AC00000 | 4MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | | | |
* | | | |
* | Q6 | 0x4B000000 | 24MB |
* | | | |
* | | | |
* +--------+--------------+-------------------------+
* | M3 Dump| 0x4C800000 | 1MB |
* +--------+--------------+-------------------------+
* | QDSS | 0x4C900000 | 1MB |
* +--------+--------------+-------------------------+
* | caldb | 0x4CA00000 | 2MB |
* +--------+--------------+-------------------------+
* | | | |
* |QCN9000 | 0x4CC00000 | 53MB |
* | | | |
* +--------+--------------+-------------------------+
* | | | |
* | MHI1 | 0x50100000 | 9MB |
* | | | |
* +--------+--------------+-------------------------+
* | |
* | Rest of the memory for Linux |
* | |
* +=================================================+
*/
q6_region: wcnss@4b000000 {
no-map;
reg = <0x0 0x4b000000 0x0 0x01800000>;
};
m3_dump@4c800000 {
no-map;
reg = <0x0 0x4c800000 0x0 0x100000>;
};
q6_etr_region:q6_etr_dump@4c900000 {
no-map;
reg = <0x0 0x4c900000 0x0 0x100000>;
};
q6_caldb_region:q6_caldb_region@4ca00000 {
no-map;
reg = <0x0 0x4ca00000 0x0 0x200000>;
};
qcn9000_pcie0: qcn9000_pcie0@4cc00000 {
no-map;
reg = <0x0 0x4CC00000 0x0 0x03500000>;
};
#if defined(__CNSS2__)
mhi_region1: dma_pool1@50100000 {
compatible = "shared-dma-pool";
no-map;
reg = <0x0 0x50100000 0x0 0x00900000>;
};
#endif
#endif
};
soc {
serial@78af000 {
status = "ok";
};
blsp1_uart2: serial@78b0000 {
pinctrl-0 = <&blsp1_uart_pins>;
pinctrl-names = "default";
status = "ok";
};
qpic_bam: dma@7984000{
status = "ok";
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&qspi_nand_pins>;
pinctrl-names = "default";
status = "ok";
};
spi_0: spi@78b5000 { /* BLSP1 QUP0 */
pinctrl-0 = <&blsp0_spi_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
compatible = "n25q128a11";
linux,modalias = "m25p80", "n25q128a11";
spi-max-frequency = <50000000>;
use-default-sizes;
};
};
mdio0: mdio@88000 {
status = "ok";
ethernet-phy@0 {
reg = <7>;
};
};
ess-instance {
num_devices = <0x1>;
ess-switch@0x39c00000 {
compatible = "qcom,ess-switch-ipq50xx";
device_id = <0>;
switch_mac_mode = <0xff>; /* mac mode for uniphy instance*/
cmnblk_clk = "internal_96MHz"; /* cmnblk clk*/
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <7>;
};
};
led_source@0 {
source = <0>;
mode = "normal";
speed = "all";
blink_en = "enable";
active = "high";
};
};
};
wifi0: wifi@c000000 {
qcom,bdf-addr = <0x4BA00000 0x4BA00000 0x4BA00000
0x0 0x0>;
qcom,caldb-addr = <0x4CA00000 0x4CA00000 0x4CA00000
0x0 0x0>;
qcom,caldb-size = <0x200000>;
status = "ok";
};
ess-uniphy@98000 {
status = "disabled";
};
qcom,sps {
status = "ok";
};
qcom,usbbam@8B04000 {
status = "ok";
};
qcom,diag@0 {
status = "ok";
};
dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
clocks = <&gcc GCC_SNOC_GMAC0_AXI_CLK>;
clock-names = "nss-snoc-gmac-axi-clk";
qcom,id = <1>;
reg = <0x39C00000 0x10000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
qcom,mactype = <2>;
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <7>;
mdio-bus = <&mdio0>;
local-mac-address = [000000000000];
phy-mode = "sgmii";
};
rpm_etm0 {
status = "disabled";
};
lpass: lpass@0xA000000{
status = "disabled";
};
#if 0
pcm: pcm@0xA3C0000{
pinctrl-0 = <&audio_pins>;
pinctrl-names = "default";
status = "disabled";
};
#endif
pcm_lb: pcm_lb@0 {
status = "disabled";
};
};
thermal-zones {
status = "ok";
};
};
&tlmm {
pinctrl-0 = <&blsp0_uart_pins &phy_led_pins>;
pinctrl-names = "default";
blsp0_uart_pins: blsp0_uart_pins {
blsp0_uart_rx_tx {
pins = "gpio20", "gpio21";
function = "blsp0_uart0";
bias-disable;
};
};
#if 0
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio28", "gpio29";
function = "blsp1_uart2";
bias-disable;
};
};
#endif
blsp1_uart_pins: blsp1_uart_pins {
blsp1_uart_rx_tx {
pins = "gpio23", "gpio25", "gpio24";
function = "blsp1_uart2";
bias-disable;
};
};
blsp0_spi_pins: blsp0_spi_pins {
mux {
pins = "gpio10", "gpio11", "gpio12", "gpio13";
function = "blsp0_spi";
drive-strength = <2>;
bias-disable;
};
};
qspi_nand_pins: qspi_nand_pins {
qspi_clock {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
qspi_cs {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
qspi_data_0 {
pins = "gpio7";
function = "qspi0";
drive-strength = <8>;
bias-disable;
};
qspi_data_1 {
pins = "gpio6";
function = "qspi1";
drive-strength = <8>;
bias-disable;
};
qspi_data_2 {
pins = "gpio5";
function = "qspi2";
drive-strength = <8>;
bias-disable;
};
qspi_data_3 {
pins = "gpio4";
function = "qspi3";
drive-strength = <8>;
bias-disable;
};
};
mdio1_pins: mdio_pinmux {
#if 0
mux_0 {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mux_1 {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
#endif
};
phy_led_pins: phy_led_pins {
gephy_led_pin {
pins = "gpio46";
function = "led0";
drive-strength = <8>;
bias-pull-down;
};
};
i2c_pins: i2c_pins {
i2c_scl {
pins = "gpio25";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
i2c_sda {
pins = "gpio26";
function = "blsp2_i2c1";
drive-strength = <8>;
bias-disable;
};
};
button_pins: button_pins {
wps_button {
pins = "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
audio_pins: audio_pinmux {
#if 0
mux_1 {
pins = "gpio24";
function = "audio_rxbclk";
drive-strength = <8>;
bias-pull-down;
};
mux_2 {
pins = "gpio25";
function = "audio_rxfsync";
drive-strength = <8>;
bias-pull-down;
};
mux_3 {
pins = "gpio26";
function = "audio_rxd";
drive-strength = <8>;
bias-pull-down;
};
mux_4 {
pins = "gpio27";
function = "audio_txmclk";
drive-strength = <8>;
bias-pull-down;
};
mux_5 {
pins = "gpio28";
function = "audio_txbclk";
drive-strength = <8>;
bias-pull-down;
};
mux_6 {
pins = "gpio29";
function = "audio_txfsync";
drive-strength = <8>;
bias-pull-down;
};
mux_7 {
pins = "gpio30";
function = "audio_txd";
drive-strength = <8>;
bias-pull-down;
};
#endif
};
};
&soc {
#if 0
gpio_keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
button@1 {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,input-type = <1>;
debounce-interval = <60>;
};
};
#endif
};
&usb3 {
qcom,multiplexed-phy;
qcom,phy-mux-regs = <&tcsr_q6_block 0x2540>;
device-power-gpio = <&tlmm 24 1>;
status = "ok";
};
&eud {
status = "ok";
};
&pcie_x1 {
status = "disabled";
perst-gpio = <&tlmm 18 1>;
};
&pcie_x2 {
status = "ok";
perst-gpio = <&tlmm 15 1>;
};
&bt {
status = "ok";
};
&wcss {
status = "ok";
};
&tcsr_mutex_block {
status = "ok";
};
&tcsr_mutex {
status = "ok";
};
&smem {
status = "ok";
};
&apcs_glb {
status = "ok";
};
&tcsr_q6_block {
status = "ok";
};
&qcom_q6v5_wcss {
#ifdef IPQ_MEM_PROFILE_256_MB
memory-region = <&q6_region>, <&q6_etr_region>;
#else
memory-region = <&q6_region>, <&q6_etr_region>,
<&q6_caldb_region>;
#endif
/* IPQ5018 */
q6v5_wcss_userpd1 {
m3_firmware = "IPQ5018/m3_fw.mdt";
interrupts-extended = <&wcss_smp2p_in 8 0>,
<&wcss_smp2p_in 9 0>,
<&wcss_smp2p_in 12 0>,
<&wcss_smp2p_in 11 0>;
interrupt-names ="fatal",
"ready",
"spawn_ack",
"stop-ack";
qcom,smem-states = <&wcss_smp2p_out 8>,
<&wcss_smp2p_out 9>,
<&wcss_smp2p_out 10>;
qcom,smem-state-names = "shutdown",
"stop",
"spawn";
qca,asid = <1>;
qca,auto-restart;
qca,int_radio;
};
};
&i2c_0 {
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
status = "disabled";
};
&dbm_1p5 {
status = "ok";
};
&msm_imem {
status = "ok";
};
&blsp1_uart1 {
status = "ok";
};
&ssuniphy_0 {
status = "ok";
};
&hs_m31phy_0 {
status = "ok";
};
&pcie_x1phy {
status = "disabled";
};
&pcie_x2phy {
status = "ok";
};
&pcie_x1_rp {
status = "disabled";
mhi_0: qcom,mhi@0 {
reg = <0 0 0 0 0 >;
};
};
&pcie_x2_rp {
status = "ok";
mhi_1: qcom,mhi@1 {
reg = <0 0 0 0 0 >;
qrtr_instance_id = <0x20>;
#address-cells = <0x2>;
#size-cells = <0x2>;
#if defined(CNSS2)
memory-region = <&mhi_region1>;
#else
base-addr = <0x4CC00000>;
m3-dump-addr = <0x4E000000>;
etr-addr = <0x4E100000>;
qcom,caldb-addr = <0x4E200000>;
pageable-addr = <0x4EA00000>;
qcom,tgt-mem-mode = <0x1>;
mhi,max-channels = <30>;
mhi,timeout = <10000>;
#endif
};
};
&wifi0 {
/* IPQ5018 */
mem-region = <&q6_region>;
qcom,board_id = <0x24>;
status = "ok";
};
&wifi3 {
/* QCN9000 5G */
hremote_node = <&qcn9000_pcie0>;
board_id = <0xa0>;
status = "ok";
};
&qfprom {
status = "ok";
};
&tsens {
status = "ok";
};