Console achieved. My device did not actually have the pins attached as shown. To anyone following along, I'd suggest using very thin wires, I'm unable to put the metal case together, will have to rig up some insulation to keep the HV side away from the logic side (the boards are stacked). Right now, I only have the logic board plugged in, the HV and ethernet section is not attached.
Going to take some fiddling to get the right timing on plugging in the device, activating the console port, pushing 4, then any key.
This (or variations) keeps outputting about 1 per second:
Format: Log Type - Time(microsec) - Message - Optional Info
Log Type: B - Since Boot(Power On Reset), D - Delta, S - Statistic
S - QC_IMAGE_VERSION_STRING=BOOT.BF.3.1.1-00103
S - IMAGE_VARIANT_STRING=DAABANAZA
S - OEM_IMAGE_VERSION_STRING=CRM
S - Boot Config, 0x00000021
S - Core 0 Frequency, 0 MHz
B - 261 - PBL, Start
B - 1338 - bootable_media_detect_entry, Start
B - 1678 - bootable_media_detect_success, Start
B - 1692 - elf_loader_entry, Start
B - 5068 - auth_hash_seg_entry, Start
B - 7210 - auth_hash_seg_exit, Start
B - 578261 - elf_segs_hash_verify_entry, Start
B - 694354 - PBL, End
B - 694378 - SBL1, Start
B - 781441 - pm_device_init, Start
D - 6 - pm_device_init, Delta
B - 782969 - boot_flash_init, Start
D - 63299 - boot_flash_init, Delta
B - 850293 - boot_config_data_table_init, Start
D - 3843 - boot_config_data_table_init, Delta - (419 Bytes)
B - 857500 - clock_init, Start
D - 7568 - clock_init, Delta
B - 869565 - CDT version:2,Platform ID:8,Major ID:1,Minor ID:0,Subtype:0
B - 873054 - sbl1_ddr_set_params, Start
B - 878042 - cpr_init, Start
D - 2 - cpr_init, Delta
B - 882533 - Pre_DDR_clock_init, Start
D - 5 - Pre_DDR_clock_init, Delta
D - 13148 - sbl1_ddr_set_params, Delta
B - 896241 - pm_driver_init, Start
D - 2 - pm_driver_init, Delta
B - 965951 - sbl1_wait_for_ddr_training, Start
D - 29 - sbl1_wait_for_ddr_training, Delta
B - 981527 - Image Load, Start
D - 138424 - QSEE Image Loaded, Delta - (269176 Bytes)
B - 1120449 - Image Load, St