Cannot boot factory image for bananapi R2

Installing and Using OpenWrt
1

Hello!

As said in title, I'm unable to boot factory image for a bananapi R2. I burned the sdcard as explained in documentation, connected my UART to USB device, started minicom, booted the board, but nothing happened.

Here is the full boot log captured from minicom


[USBD] USB PRB0 LineState: 0

[USBD] USB cable/ No Cable inserted!

[PLFM] Keep stay in USB Mode
Platform initialization is ok
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_cpu_freq = 1040000Khz
wait for frequency meter finish, CLK26CALI = 0x90
mt_pll_post_init: mt_get_bus_freq = 273000Khz
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_mem_freq = 133250Khz
[PWRAP] pwrap_init_preloader
[PWRAP] pwrap_init
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=0,rdata=2D52
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=1,rdata=2D52
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=2,rdata=2D52
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=3,rdata=800
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=5 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=6 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=7 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=8 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=9 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=10 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=11,rdata=1001
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=12,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=13,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=14,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=15,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=16,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=17,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=18,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=2003
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97
[PWRAP] _pwrap_init_reg_clock
[PMIC_WRAP]wrap_init pass,the return value=0.
[pmic6323_init] Preloader Start..................
[pmic6323_init] PMIC CHIP Code = 0x2023
INT_MISC_CON: 1  TOP_RST_MISC: 1
pl pmic powerkey Release
[pmic6323_init] powerKey = 0
[pmic6323_init] is USB in = 0xB004
[pmic6323_init] Reg[0x11A]=0x1B
pmic setup LED
[pmic6323_init] Done...................
mt7623 disable long press reset ->>>>>
mt7623 disable long press reset <<<<<-
mt7623 VPA supplied by 1.0V to MT7530 ->
mt7623 VPA supplied by 1.0V to MT7530 <-
mt7623 enables RG_VGP1_EN for LCM ->
mt7623 enables RG_VGP1_EN for LCM <-
MT7623 E2 setting =>
MT7623 E2 setting <=
[PLFM] Init I2C: OK(0)
[PLFM] Init PWRAP: OK(0)
[PLFM] Init PMIC: OK(0)
[PLFM] chip[CA00]

[BLDR] [Support SD/eMMC] Build Time: 20170210-093340
==== Dump RGU Reg ========
RGU MODE:     4D
RGU LENGTH:   FFE0
RGU STA:      0
RGU INTERVAL: FFF
RGU SWSYSRST: 0
==== Dump RGU Reg End ====
RGU: g_rgu_satus:0
 mtk_wdt_mode_config  mode value=10, tmp:22000010
PL P ON
WDT does not trigger reboot
RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3)
kpd read addr: 0x0040: data:0x4001
Enter mtk_kpd_gpio_set! 
kpd debug column : 0, 0, 0, 0, 0, 0, 0, 0
kpd debug row : 0, 0, 0, 0, 0, 0, 0, 0
after set KP enable: KP_SEL = 0x0 !
MTK_PMIC_RST_KEY is used for this project!
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=3967
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] bbpu = 0xD, con = 0x426
[RTC] powerkey1 = 0xA357, powerkey2 = 0x67D2
Writeif_unlock
[RTC] RTC_SPAR0=0x40 
rtc_2sec_reboot_check cali=1280
rtc_2sec_stat_clear
[RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x40, spar1 = 0x800
[RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1
[RTC] bbpu = 0xD, con = 0x426, cali = 0x500
pl pmic powerkey Release
[PLFM] Power key boot!
[RTC] rtc_bbpu_power_on done
[EMI] mcp_dram_num:0,discrete_dram_num:1,enable_combo_dis:0
[EMI] PCDDR3
[Check]mt_get_mdl_number 0x0
[EMI] eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
[EMI] MDL number = 0
[EMI] emi_set eMMC/NAND ID = 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
[EMI][Vcore]0x21E=0x48,0x220=0x48
[EMI][Vmem]0x554=0x0
wait for frequency meter finish, CLK26CALI = 0x81
[EMI] PCDDR3 DRAM Clock = 1333004 KHz, MEMPLL MODE = 2 
[EMI] PCDDR3 RXTDN Calibration:
Start REXTDN SW calibration...
drvp=0xB,drvn=0x9
[EMI] pinmux = 4
===============================================================================

        dramc_write_leveling_swcal
===============================================================================
delay  byte0  byte1  byte2  byte3
-----------------------------
0    1    1    1    1    
1    1    1    1    1    
2    1    1    1    1    
3    1    1    1    1    
4    1    1    1    1    
5    1    1    1    1    
6    1    1    1    1    
7    1    1    1    1    
8    1    1    1    1    
9    1    1    1    1    
10    1    1    1    1    
11    1    1    1    1    
12    1    1    1    1    
13    1    1    1    1    
14    1    1    1    1    
15    1    1    1    1    
pass bytecount = 4
byte_i    status    best delay
0    2    0
1    2    0
2    2    0
3    2    0
========================================
[write leveling]DQS: 0x0, DQM: 0x0
[write leveling after remap]DQ byte0 reg: 0x200 val: 0x0
[write leveling after remap]DQ byte1 reg: 0x204 val: 0x0
[write leveling after remap]DQ byte2 reg: 0x208 val: 0x0
[write leveling after remap]DQ byte3 reg: 0x20C val: 0x0
=============================================
X-axis: DQS Gating Window Delay (Fine Scale)
Y-axis: DQS Gating Window Delay (Coarse Scale)
=============================================
          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
      --------------------------------------------------------------------------------
0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0010:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0011:|    0    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1
0012:|    0    0    0    0    1    1    1    1    1    1    1    1    1    1    1    0
0013:|    1    1    1    1    1    1    1    1    1    0    0    0    0    0    0    0
0014:|    1    1    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
Rank 0 coarse tune value selection : 18, 18
18
72
rank 0 coarse = 18
rank 0 fine = 72
00:|    0    0    0    0    0    0    0    1    1    1    0    0
opt_dle value:12
==================================================================
		RX	DQS perbit delay software calibration 
==================================================================
1.0-31 bit dq delay value
==================================================================
bit|     0  1  2  3  4  5  6  7  8  9
--------------------------------------
0 |    0 0 0 0 0 0 0 0 0 0 
10 |    0 0 0 0 0 0 0 0 0 0 
20 |    0 0 0 0 0 0 0 0 0 0 
30 |    0 0 
--------------------------------------
==================================================================
2.dqs window
x=pass dqs delay value (min~max)center 
y=0-7bit DQ of every group
input delay:DQS0 =50 DQS1 = 42 DQS2 =54 DQS3 = 48
==================================================================
bit	DQS0	 bit      DQS1     bit     DQS2     bit     DQS3
0  (15~79)47  8  (5~72)38  16  (18~79)48  24  (14~71)42
1  (16~80)48  9  (5~70)37  17  (21~78)49  25  (14~70)42
2  (17~79)48  10  (9~76)42  18  (23~84)53  26  (16~77)46
3  (15~78)46  11  (8~72)40  19  (19~76)47  27  (16~72)44
4  (17~82)49  12  (11~74)42  20  (23~86)54  28  (19~78)48
5  (17~80)48  13  (11~74)42  21  (23~83)53  29  (17~74)45
6  (19~80)49  14  (12~70)41  22  (20~80)50  30  (13~74)43
7  (20~80)50  15  (11~72)41  23  (25~84)54  31  (16~75)45
==================================================================
3.dq delay value last
==================================================================
bit|    0  1  2  3  4  5  6  7  8   9
--------------------------------------
0 |    3 2 2 4 1 2 1 0 4 5 
10 |    0 2 0 0 1 1 6 5 1 7 
20 |    0 1 4 0 6 6 2 4 0 3 
30 |    5 3 
==================================================================
*DQIDLY1 = 0x4020203
*DQIDLY2 = 0x10201
*DQIDLY3 = 0x2000504
*DQIDLY4 = 0x1010000
*DQIDLY5 = 0x7010506
*DQIDLY6 = 0x40100
*DQIDLY7 = 0x4020606
*DQIDLY8 = 0x3050300
*DRAMC_R0DELDLY = 0x30362A32

[MEM]CONA:F3A2,conf1:F07486A3
DM4BitMux = 1 
DQSO 0 in TX per-bit = 0 <= DQSO 0 in WL = 0  
DQSO 1 in TX per-bit = 0 <= DQSO 1 in WL = 0  
[Warning] DQSO 2 in TX per-bit = 2 > DQSO 2 in WL = 0  
[Warning] DQSO 3 in TX per-bit = 2 > DQSO 3 in WL = 0  
Tx DQM dly  = 0x1154
Tx DQM dly bit4 = 0x0
DRAMC_DQODLY1=34556456h
DRAMC_DQODLY2=56455344h
DRAMC_DQODLY3=2203021h
DRAMC_DQODLY4=23212023h
Tx DQ dly bit4 = 0x0
Tx DQS dly = 0x2200
Tx DQS dly bit4 = 0x0
TX Byte0: DQ - 24, DQS - 16. win_sum= 39
TX Byte1: DQ - 24, DQS - 13. win_sum= 36
TX Byte2: DQ - 18, DQS - 18. win_sum= 35
TX Byte3: DQ - 17, DQS - 20. win_sum= 36
DRAMC calibration takes 650039398 CPU cycles

[EMI] DRAMC calibration passed

[MEM] complex R/W mem test pass
0:dram_rank_size:80000000
[Dram_Buffer] dram size:-2147483648 
[Dram_Buffer] structure size: 1725560 
[Dram_Buffer] MAX_TEE_DRAM_SIZE: 0 
Boot from SD Card!!
[PLFM] Init Boot Device: OK(0)

[PART] blksz: 512B
[PART] [0x0000000000000000-0x000000000003FFFF] "PRELOADER" (512 blocks) 
[PART] [0x0000000000000000-0x000000000003FFFF] "MBR" (512 blocks) 
[PART] [0x0000000000040000-0x00000000000BFFFF] "UBOOT" (1024 blocks) 
[PART] [0x00000000000C0000-0x00000000000FFFFF] "CONFIG" (512 blocks) 
[PART] [0x0000000000100000-0x000000000013FFFF] "FACTORY" (512 blocks) 
[PART] [0x0000000000140000-0x000000000213FFFF] "BOOTIMG" (65536 blocks) 
[PART] [0x0000000002140000-0x000000000413FFFF] "RECOVERY" (65536 blocks) 
[PART] [0x0000000004140000-0x000000004413FFFF] "ROOTFS" (2097152 blocks) 
[PART] [0x0000000044140000-0x000001FFC413FFFF] "USER" (-4194304 blocks) 
[platform_vusb_on] PASS
[TOOL] PMIC not dectect usb cable!
[TOOL] <UART> listen  ended, receive size:0!
[TOOL] <UART> wait sync time 150ms->5ms
[TOOL] <UART> receieved data: ()

Device APC domain init setup:

 bootloader load uboot ,the address of uboot is 81E00000 
[PART]partition name UBOOT 
[PART]partition start block 0x200 
[PART]partition size 0x80000 
[PART]partition blks 0x400 
[PART]partition flags 0x0 
[PART]partition name 0x8 
[bean] part->startblk(0x200) bdev->blksz(0x200) part->part_id(8) hdr(0xFFB50000)
[BlkDev.c 101 ]partition block size 0x200 ,blks:0x3BA0000
[BlkDev.c 101 ]partition block erase size 0x200 

[PART] load "UBOOT" from 0x0000000000050000 (dev) to 0x81E00000 (mem) [SUCCESS]
[PART] load speed: 6103KB/s, 300000 bytes, 48ms
[BT_SD_PG] device info 0x8590 0x8A00 0xCB01 0x102
0:dram_rank_size:80000000
[PLFM] md_type[0] = 255 
[PLFM] md_type[1] = 255 

[PLFM] boot reason: 0
[PLFM] boot mode: 0
[PLFM] META COM0: 0
[PLFM] <0xFFB7CC10>: 0x0
[PLFM] boot time: 1890ms
[PLFM] DDR reserve mode: enable = 0, success = 0

[BLDR] jump to 0x81E00000
[BLDR] <0x81E00000>=0xEA0000B8
[BLDR] <0x81E00004>=0xE59FF014

Can you help me please?

2

How was the compressed image written to the SD card ?

3

I don't know: I downloaded the image from the official repository and I verified that the checksum is correct.

4

so you don't know if/how you wrote it to the SD card, awesome.

this is going to be a loooong thread.

5

As I said, I followed the official documentation.
I burned the sdcard using this command gzip -cd official_image.img.gz > /dev/mmcblk0
Then running partprobe /dev/mmcblk0 give me the 3 new partitions. But when I try to mount them I got:

mount /dev/mmcblk0p1 /mnt
mount: /mnt: wrong fs type, bad option, bad superblock on /dev/mmcblk0p1, missing codepage or helper program, or other error.
       dmesg(1) may have more information after failed mount system call.
6

don't own the device, but it could be the boot loader ...

7

I got the same error for all partitions :confused:

8

squashfs requires losetup and/or -o loop when mounting.

9 
mount -o loop /dev/mmcblk0p2 /mnt
mount: /mnt: wrong fs type, bad option, bad superblock on /dev/loop60, missing codepage or helper program, or other error.
       dmesg(1) may have more information after failed mount system call.

Same result for partition 3

10

You can't mount them. Just boot the R2 from the card.

11

Ok, but when I try to boot, nothing happen (see boot log on first message)

13

Sorry, i somehow missed your reply.
When i compare your log with this one, i see that U-Boot never starts.
So i assume, either your sd-card is defective,
the image not correct or not correct written to the card.
Since my R3 is quite different to your R2, i can't really help you with this.
Question:
Did your R2 ever successfully boot from this or another sd-card?
Or from the eMMC?
If yes, please tell us which OS did work.
If no, maybe the hardware is defective.
You could also try the documentation on this site, maybe it's a bit helpful.

14

Hello @elder_tinkerer,

I was finally able to boot on openwrt. The board was bricked and I had to used spflashtool to reupload preloader to emmc.

Then I was able to boot from sdcard an old and venerable Ubuntu 18.04 provided from official bananapi site and I tried to use a command to copy system on emmc (it was my last hope).

After that I was able to boot openwrt from sdcard and to copy it to emmc.

As far as I understand, you cannot boot from sdcard if preloader is not present on emmc, then to boot openwrt, uboot on emmc is needed.

15

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