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Topic: makefile to use .config variables

The content of this topic has been archived on 25 Mar 2018. There are no obvious gaps in this topic, but there may still be some posts missing at the end.

I have a simple question about how can makefile read in a varibale is set in .config file.

for example i have CONFIG_a=y CONFIG_b and CONFIG_c as three variables in .config of my linux configuration . I have a Makefile which should define a variable depending upon which CONFIG_X is set

if CONFIG_A
DFLAGS=-DABC
if CONFIG_B
DFLAGS=-DBCD
if CONFIG_C
DFLAGS=-DCDE

How could i achieve this in make file.

I tried

ifeq ($(TARGET_A),y)
DFLAGS=-DABC
else
ifeq ($(TARGET_B),y)
DFLAGS=-DBCD
else
DFLAGS=-DCDE
endif
endif

THIS could not help each time -DCDE is set.

(Last edited by vikaspshinde on 25 Jun 2017, 07:25)

Please, take a look at Makefiles from packages feed, there's a bunch of examples.

I have seen this makefiles and also able to create my own make files but the case i want is not into this makefiles.

below are my two makefile.
1. for creating support for a target xyz

include $(TOPDIR)/rules.mk
PKG_NAME:=xyz
PKG_RELEASE:=1
PKG_VERSION:=2

TARGET_LIBS = -Wl,-Bstatic -lpthread
include $(INCLUDE_DIR)/package.mk

define Package/$(PKG_NAME)
  SECTION:=utils
  CATEGORY:=Utilities
  TITLE:= xyz
  DEPENDS:=@TARGET_ramips_rt305x_a||@TARGET_ramips_rt305x_b +libpthread +librt
endef
define Package/$(PKG_NAME)/description
This is a sample program for make
endef
define Build/Prepare
    mkdir -p $(PKG_BUILD_DIR)
    $(CP) ./src/* $(PKG_BUILD_DIR)/
    mkdir -p $(PKG_BUILD_DIR)/obj $(PKG_BUILD_DIR)/bin
endef
define Package/$(PKG_NAME)/Build/Configure
endef
define Package/$(PKG_NAME)/Build/Compile
    $(TARGET_CONFIGURE_OPTS) \
    CFLAGS="$(TARGET_CFLAGS)" \
    LDFLAGS="$(TARGET_LDFLAGS)" \
    LIBS="$(TARGET_LIBS)" \
    $(MAKE) -C $(PKG_BUILD_DIR) $(PKG_NAME)
endef

define Package/$(PKG_NAME)/install
   
    $(INSTALL_DIR) $(1)/usr/bin
    $(INSTALL_BIN) $(PKG_BUILD_DIR)/bin/$(PKG_NAME) $(1)/usr/bin/

endef
$(eval $(call BuildPackage,$(PKG_NAME)))



2nd make file is the makefile to compile the target


PKG_RELEASE:=0
PKG_VERSION:=2
IDIR=./inc
ODIR=./obj
BIN=./bin
SRC=./src
TARGET=xyz
CC=gcc
CFLAGS=-I$(IDIR) -lpthread -lrt -lm

DFLAGS=-DABC -DDEBUG


_SRC := $(shell ls $(SRC))

_DEPS := $(shell ls $(IDIR))
DEPS=$(_DEPS:%=$(IDIR)/%)

_OBJS=$(_SRC:%.c=%.o)
OBJS=$(_OBJS:%=$(ODIR)/%)

$(ODIR)/%.o: $(SRC)/%.c $(DEPS)
    $(CC) -c -Wall -o $@ $< $(CFLAGS) $(DFLAGS)

$(BIN)/$(TARGET): $(OBJS)
    $(CC) -Wall -o $@ $^ $(CFLAGS) $(DFLAGS)
   
all:    $(BIN)/$(TARGET)
clean:
    rm -rf $(BIN)/$(TARGET) $(ODIR)/*


My concern is that  in second makefile
if TARGET_ramips_rt305x_a is set to y then DFLAGS=-DABC -DDEBUG  has to be set before compiling
if TARGET_ramips_rt305x_b is set to y then DFLAGS=-DBCD -DDEBUG  has to be set before compiling

How can i do this?

vikaspshinde wrote:

I have a simple question about how can makefile read in a varibale is set in .config file.

for example i have CONFIG_a=y CONFIG_b and CONFIG_c as three variables in .config of my linux configuration . I have a Makefile which should define a variable depending upon which CONFIG_X is set

config for linux kernel or packages ??
or maybe also for ARCH ?

elektroman wrote:
vikaspshinde wrote:

I have a simple question about how can makefile read in a varibale is set in .config file.

for example i have CONFIG_a=y CONFIG_b and CONFIG_c as three variables in .config of my linux configuration . I have a Makefile which should define a variable depending upon which CONFIG_X is set

config for linux kernel or packages ??
or maybe also for ARCH ?


For now the variable is for target profile and  it is used for packages. But it will be gratefull if u explain me for all three cases

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