I want to build a Openwrt based digital audio processor on AR9331 soc. Stereo audio input will be taken from I2S MICIN and output will be send to I2S SD pin. One kernel module has to be used for I2S and user space application will handle all DSP routine. On receive of audio sample kernel module will send a interrupt signal to user space and user app will read this sample from kernel space, execute all DSP algo in the ISR and send modified audio sample data to back kernel space.
One I2S DAC codec will be connected to soc I2S SD & ADC codec to soc 2S MICIN. Soc will generate I2S MCK & I2S CK signal to supply clock to ADC & DAC.
Following DSP algorithm may be implemented.
Delay pedal.
Echo pedal.
Reverb pedal.
Metronome.
Tremolo.
Chorus/Vibrato.
Please somebody help for implementation of the project.
/jags