Hello!
I have read OpenWRT wiki page about Atheros AR724x JTAG recovery (http://wiki.openwrt.org/ru/toh/tp-link/ … using.jtag) and decided to recover my D-Link DIR-632, Atheros AR7242 based (http://wiki.openwrt.org/toh/d-link/dir-632). I have soldered JTAG pins and use self-made FT232RL-adapter.
JTAG is working, TAP has been detected, and I can halt and resume the processor, dump_image and view registers by reg command.
But I can't rewrite bootloader on flash, as described on wiki page (http://wiki.openwrt.org/ru/toh/tp-link/ … using.jtag).
After 'reset_init' command in OpenOCD (I am using init-ar7240.cfg init script from wiki), I have uploaded '8Muboot_RAM_version.bin' file with U-boot RAM version. After 'resume 0x80000000' command I see nothing in UART console, only DIR-632 WPS blue LED light is on, nothing else (((
I have found D-Link GPL code for DIR-632, that contains U-Boot code (http://tsd.dlink.com.tw/GPL.asp):
https://dlink-gpl.s3.amazonaws.com/GPL1 … A1_GPL.rar
https://dlink-gpl.s3.amazonaws.com/GPL1 … 6_FOSS.rar
https://dlink-gpl.s3.amazonaws.com/GPL1 … 8_FOSS.rar
For AP101 platform there is config.mk file, and TEXT_BASE can be defined for RAM version of U-Boot (TEXT_BASE=0x80000000). I have changed TEXT_BASE to 0x80000000, compiled U-Boot from GPL source and uploaded new bootloader to RAM via JTAG. But after 'resume 0x80000000' there is nothing in console again (((
Please, can anybody help me to create good OpenOCD init script for DIR-632 and explain, how to compile U-Boot RAM version that can boot from RAM and restore (rewrite) bootloader on flash?
Thank you!