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Topic: checkpoint SBXW-166LHGE-6

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Post #1
Tasman
24 Jan 2012, 20:49

I have a CheckPoint SBXW-166LHGE-6.

- CPU: MSP2006 Brecis (PMC-Sierra)
- 2 x RJ45 10/100 port + 1 x 4-port LAN switch (IC Plus Corp - IP175C)
- MiniPCI form-factor Gigabyte wireless NIC (Atheros chipset)
- 64MB RAM - 1 x serial port
- VIA VT6212L USB Controller
- Flash: Spansion S29JL06H
- EJTAG 2.6 14-pin interface

have used standard Xilinx DLC5 cable : https://forum.openwrt.org/viewtopic.php?id=4191

jtag> cable DLC5 ppdev /dev/parport0 
Initializing ppdev port /dev/parport0 
jtag> detect 
IR length: 5 
Chain length: 1 
Device Id: 00010000001000000010001011100001 (0x00000000102022E1) 
  Manufacturer: Brecis (PMC-Sierra) 
  Part(0):         MSP2006 
  Stepping:     1 
  Filename:     /usr/local/share/urjtag/brecis/msp2006/msp2006 
ImpCode=01000001000000000100000000000000 41004000 
EJTAG version: 2.6 
EJTAG Implementation flags: R4k DINTsup NoDMA MIPS32 
Processor entered Debug Mode. 


detectflash 0x1fc00000 
Query identification string: 
    Primary Algorithm Command Set and Control Interface ID Code: 0x0002 (AMD/Fujitsu Standard Command Set) 
    Alternate Algorithm Command Set and Control Interface ID Code: 0x0000 (null) 
Query system interface information: 
    Vcc Logic Supply Minimum Write/Erase or Write voltage: 2700 mV 
    Vcc Logic Supply Maximum Write/Erase or Write voltage: 3600 mV 
    Vpp [Programming] Supply Minimum Write/Erase voltage: 0 mV 
    Vpp [Programming] Supply Maximum Write/Erase voltage: 0 mV 
    Typical timeout per single byte/word program: 8 us 
    Typical timeout for maximum-size multi-byte program: 0 us 
    Typical timeout per individual block erase: 512 ms 
    Typical timeout for full chip erase: 0 ms 
    Maximum timeout for byte/word program: 256 us 
    Maximum timeout for multi-byte program: 0 us 
    Maximum timeout per individual block erase: 8192 ms 
    Maximum timeout for chip erase: 0 ms 
Device geometry definition: 
    Device Size: 8388608 B (8192 KiB, 8 MiB) 
    Flash Device Interface Code description: 0x0002 (x8/x16) 
    Maximum number of bytes in multi-byte program: 1 
    Number of Erase Block Regions within device: 3 
    Erase Block Region Information: 
        Region 0: 
            Erase Block Size: 8192 B (8 KiB) 
            Number of Erase Blocks: 8 
        Region 1: 
            Erase Block Size: 65536 B (64 KiB) 
            Number of Erase Blocks: 126 
        Region 2: 
            Erase Block Size: 8192 B (8 KiB) 
            Number of Erase Blocks: 8 
Primary Vendor-Specific Extended Query: 
    Major version number: 1 
    Minor version number: 3 
    Address Sensitive Unlock: Required 
    Process Technology: Bad value 
    Erase Suspend: Read/write 
    Sector Protect: 1 sectors per group 
    Sector Temporary Unprotect: Not supported 
    Sector Protect/Unprotect Scheme: 29BDS640 mode (Software Command Locking) 
    Simultaneous Operation: 119 sectors 
    Burst Mode Type: Supported 
    Page Mode Type: Not supported 
    ACC (Acceleration) Supply Minimum: 8500 mV 
    ACC (Acceleration) Supply Maximum: 9500 mV 
    Top/Bottom Sector Flag: 8x8kb sectors at top and bottom with WP control 
    Program Suspend: Not supported 
    Bank Organization: 
        Bank1: 23 sectors 
        Bank2: 48 sectors 
        Bank3: 48 sectors 
        Bank4: 23 sectors

When programming flash memory have the following problem. Write 8k from 0x1fc06000. (Block03):

jtag> flashmem 0x1fc06000 x03 
Chip: AMD Flash 
    Manufacturer: AMD 
    Chip: S92GLxxxN 
    Protected: 0000 
program: 
flash_unlock_block 0x1FC06000 IGNORE 

block 3 unlocked 
flash_erase_block 0x1FC06000 
flash_erase_block 0x1FC06000 DONE 
erasing block 3: 0 
addr: 0x1FC07FFF 
verify: 
addr: 0x1FC07FFF 
Done.

After writing blocks 0 through 7, except for block 3, are erased. These blocks have a size of 8K. The blocks 8 and above (size 64K) are programmable with no problems.

Post #2
Tasman
6 Feb 2012, 10:38

Problem solved.
Chip S92GLxxxN (s29GLxxxN)  - all blocks 64K
Chip S29JL - first and last 8 blocks 8K

When erasing any of the first eight blocks, erased all the 8 blocks.

As a temporary solution changed the source code:
From a command write removed the function call erase block.

Must first erase the blocks 0-7 :  eraseflash 0x1fc00000 1 

flashmem 0x1fc00000 blocks0-7.bin 
Chip: AMD Flash 
    Manufacturer: AMD 
    Chip: S92GLxxxN 
    Protected: 0000 
program: 
addr: 0x1FC0FFFF 
verify: 
addr: 0x1FC0FFFF 
Done.

After reboot:

Copyright (c) 2001,2002,2003 BRECIS Communications Corporation
Detected SDRAM size: 0x04000000

PMON version 6.10.3(04/20/2004) [EB], Fri Dec 26 10:55:21 CST 2003

Not top or bottom, value = 0001
Chip select 0, Flash chip AMD generic 0002, address 0xbf800000, size 0x800000
Not top or bottom, value = 0001
Chip select 1, Flash chip AMD generic 0002, address 0xbe000000, size 0x800000
Ethernet MAC address 00:E0:7D:C0:C7:00, IP address 192.168.1.1
CPU type BRECIS 2000. ErrorEPC (may be PC before reset): dcf6f7bb
CPU clock frequency 167 MHz Assumed. Avail RAM 64300 KBytes
Type 'h' for on-line help.
 
Press 'Y' or 'y' to TFTP upgrade [N]:

<Executing script at address bf802000>
# <#!/bin/pmon>
# <set ethaddr0 00:E0:7D:C0:C7:FF>
# <set ethaddr1 00:E0:7D:C0:C7:FE>
# <set ipaddr 192.168.10.1>
# <set  bootimg flash>
# <set runpost  0>
# <set mtype 0>
# <#!eof>
# end of script detected
kernel boot from flash

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