Hi all,

I am trying to get UART working on AR9331 with Hardware control on.

I have done appropriate setting for AR9331 controller, but looks like driver is not working properly.

Linux kernel version that i am using is 3.10.49.

Is this feature ready in any new kernel.

Regards,
Lalit Shah

Yes.
But does your HW support this ?

Hi elektroman,

Thanks for update.

Yes my hardware supports this feature.

Can you please let me know in which kernel version this feature is ready to test.

Regards,
Lalit Shah

What setting you have done on AR9331?
What hardware and firmware you are using?

Remember UART TRS & CTS are connected at GPIO11 & GPIO12 and normaly GPIO12 (some where GPIO11) is used for RESET switch. In that case you have to modify board level c code and rebuild the firmware.

/jags

We are referring ar9331 datasheet.
ar9331 changes: We have done these changes in ar933x_uart.c file.
1. We have enabled the RTS/CTS in GPIO_FUNCTION_1(0x18040028 - Bit No. 2).
2. We have disabled the Jumpstart and WPS in GPIO_FUNCTION_2(0x18040030 - Bit No. 8 and 9).
3. UART Configuration and Status (UART_CS)(0x18020004) --- In this we have selected Hardware Flow Control enable (Bit No. 4 & 5)

We are using oolite hardware module. We have cross compiled the openwrt stack for AR9331.

As you have said GPIO12 / 11 is share with RESET switch, But in our hardware there is no RESET switch. Here as per our understanding board level c code is given in setup.c file. And in this file GPIO 11/12 are not shared.

What version of openwrt source you are using?
While make menuconfig what are the menu option you are selecting? write in details.
Can you give some details of your hardware?
Actually I need to find the proper mach-*.c for your hardware.
[openwrt/target/linux/ar71xx/files/arch/mips/ath79/mach-*.c]

/jags

Hi jags,

Here is my below response for your questions

Q:-    What version of openwrt source you are using?
Ans:- We are using Bleeding Edge, r42513 of openWRT.

Q:-    While make menuconfig what are the menu option you are selecting? write in details.
Ans:- make menuconfig settings are as below :
             Target System (Atheros AR7xxx/AR9xxx)  --->
             Subtarget (Generic)  --->
             Target Profile (OOLITE)  --->

Q:-    Can you give some details of your hardware?
         Actually I need to find the proper mach-*.c for your hardware.
Ans:- We are also finding match from our hardware from following path:
openwrt/target/linux/ar71xx/files/arch/mips/ath79/mach-*.c
but we have seen that all the c files are getting compiled. There are .o files for all the .c files.

We have did all our platform related changes into setup.c file (ath79_setup(void) function) in /arch/mips/ath79 directory for AR9331 board.

Please let me know if you need any more information.

Regards,
Lalit Shah

Dont worry that all mach-*.c files are getting compiled. you just go through all the mach-*.c and try to find out which file is related with your H/W.

/jags

Hi,

Maybe you need to setup the GPIO I/O Reg to (0x18040000)

Hi elektroman,

We have configured GPIO Register at address (0x18040000) and we are able to access GPIO Address 0x18040028 (General Purpose I/O Function (GPIO_FUNCTION_1)) to enable/disable serial UART.

Also, we are able read any GPIO Register from that address (0x18040000).

So, GPIO I/O Reg is properly configured to (0x18040000) on our AR9331 Board.

Regards,
Lalit Shah

Hi Jags,

I have put printk statement in all the mach-*.c files. But I am not getting a single printk statement from these files when I boot the board. We have modified the setup.c file for our board. And we are just getting execution prints from this setup.c file.

Regards,
Lalit Shah

Hi Jags & Elektroman,

Do you know any procedure or steps to check RTS/CTS is working or not as we have did all GPIO based configuration changes for UART RTS & CTS from AR9331 UART driver?

1) Enable RTS/CTS in GPIO_FUNCTION_1(0x18040028 - Bit No. 2).

2) Disable Jumpstart and WPS in GPIO_FUNCTION_2(0x18040030 - Bit No. 8 and 9).

3) Enable Hardware Flow Control in  UART Configuration and Status (UART_CS)(0x18020004) (Bit No. 4 & 5)

Regards,
Lalit Shah

(Last edited by lshah21 on 30 Apr 2015, 10:35)

give path of your setup.c and show what are the changes you have done.

/jags

Hi Jags,

PATH :: /openwrtsource/build_dir/target-mips_34kc_uClibc-0.9.33.2/linux-ar71xx_generic/linux-3.10.49/arch/mips/ath79/

We are using setup.c file from this folder.

uart driver path :
PATH :: /openwrt_emulator/openwrtsource/build_dir/target-mips_34kc_uClibc-0.9.33.2/linux-ar71xx_generic/linux-3.10.49/drivers/tty/serial/ar933x_uart.c

Brief description about changes made in setup.c file:
1. Have added the code for creating flash partition.
2. Have registered the uart driver.

It is somewhat difficult for me to explain everything related to code in this message. I will definately send source files and detailed description of changes which I have made in that code to your email id.

Would you please provide your email id?

Thank you,
Lalit Shah

(Last edited by lshah21 on 1 May 2015, 08:24)

jagspaul@gmail.com

Have you use "make clean"  followed by make afer  modifing openwrt/target/linux/ar71xx/files/arch/mips/ath79/mach-*.c
Remember openwrt/build_dir is tmp dir. the content fo openwrt/build_dir is getting deleted by  "make clean" so any changes in this dir doesn't  make any sense.

So you do modifing openwrt/target/linux/ar71xx/files/arch/mips/ath79/mach-*.c then  "make clean"  & hen make.

/jags

I have just modified setup.c file from below path.

PATH :: /openwrtsource/build_dir/target-mips_34kc_uClibc-0.9.33.2/linux-ar71xx_generic/linux-3.10.49/arch/mips/ath79/

and than compiled whole openwrt build using "make" command. I haven't executed "make clean" command.

So, Updated files will be compiled and Linux Krenel will be generated based on changes done in setup files.

Regards,
Lalit Shah

Hi Jags,

Thanks for providing email Id. I have sent an email on this email id with source files.

Regards,
Lalit Shah

Hi Jags & Elektroman,

We have tried to set (UART Configuration and Status Register UART_CS) to enable UART_FLOW_CONTROL_MODE (Bit 5:4 as 10) , UART_TX_READY_ORIDE bit as clear (Bit 8 as 0) and UART_RX_READY_ORIDE bit as clear (Bit 7 as 0) to control it by flow control mode instead of transmit ready or receive ready flow control.

We are able to set  UART_FLOW_CONTROL_MODE and UART_RX_READY_ORIDE bit as clear (0) successfully but when I tried to set UART_TX_READY_ORIDE as 0 at that time, I am not able to start kernel and it stucks at "starting kernel" print statement.

Do you have any idea about this type of issue?

Regards,
Lalit Shah

(Last edited by lshah21 on 6 May 2015, 12:26)

Hi All,

We have moved to GPIO bit banging for this because hardware flow control is not working after making many tries.

Thank you all for your kind support.

Regards,
Lalit Shah