Now I am at a loss.
I updated the u-boot, confirm that the byte has been changed, and when I boot the router, it remains in 400mHz, the default speed.
Here is what I have:
This is from TPLink U-Boot compiled for 400 mhz:
Offset 0 1 2 3 4 5 6 7 8 9 A B C D E F
0000D4F0 03 19 C0 24 3C 19 00 04 37 39 08 28 03 19 C0 25 À$< 79 ( À%
0000D500 AD F8 00 00 3C 0F B8 05 8D F8 00 00 3C 19 FF FE ø < ¸ ø < ÿþ
0000D510 37 39 FF FF 03 19 C0 24 AD F8 00 00 10 00 00 33 79ÿÿ À$ø 3
0000D520 00 00 00 00 00 00 00 00 3C 0F B8 05 8D F8 00 00 < ¸ ø
0000D530 3C 19 FD FF 37 39 FF FF 03 19 C0 24 AD F8 00 00 < ýÿ79ÿÿ À$ø
0000D540 3C 0F B8 05 8D F8 00 00 3C 19 FF B3 37 39 C0 00 < ¸ ø < ÿ³79À
0000D550 03 19 C0 24 3C 19 00 04 37 39 08 28 03 19 C0 25 À$< 79 ( À%
0000D560 AD F8 00 00 3C 0F B8 05 8D F8 00 00 3C 19 FF FE ø < ¸ ø < ÿþ
0000D570 37 39 FF FF 03 19 C0 24 AD F8 00 00 10 00 00 1B 79ÿÿ À$ø
0000D580 00 00 00 00 00 00 00 00 3C 0F B8 05 8D F8 00 00 < ¸ ø
0000D590 3C 19 FD FF 37 39 FF FF 03 19 C0 24 AD F8 00 00 < ýÿ79ÿÿ À$ø
0000D5A0 3C 0F B8 05 8D F8 00 00 3C 19 FF B3 37 39 C0 00 < ¸ ø < ÿ³79À
This is from TPLink U-Boot compiled for 280 mhz:
Offset 0 1 2 3 4 5 6 7 8 9 A B C D E F
0000D4F0 03 19 C0 24 3C 19 00 04 37 39 08 1C 03 19 C0 25 À$< 79 À%
0000D500 AD F8 00 00 3C 0F B8 05 8D F8 00 00 3C 19 FF FE ø < ¸ ø < ÿþ
0000D510 37 39 FF FF 03 19 C0 24 AD F8 00 00 10 00 00 33 79ÿÿ À$ø 3
0000D520 00 00 00 00 00 00 00 00 3C 0F B8 05 8D F8 00 00 < ¸ ø
0000D530 3C 19 FD FF 37 39 FF FF 03 19 C0 24 AD F8 00 00 < ýÿ79ÿÿ À$ø
0000D540 3C 0F B8 05 8D F8 00 00 3C 19 FF B3 37 39 C0 00 < ¸ ø < ÿ³79À
0000D550 03 19 C0 24 3C 19 00 04 37 39 08 28 03 19 C0 25 À$< 79 ( À%
0000D560 AD F8 00 00 3C 0F B8 05 8D F8 00 00 3C 19 FF FE ø < ¸ ø < ÿþ
0000D570 37 39 FF FF 03 19 C0 24 AD F8 00 00 10 00 00 1B 79ÿÿ À$ø
0000D580 00 00 00 00 00 00 00 00 3C 0F B8 05 8D F8 00 00 < ¸ ø
0000D590 3C 19 FD FF 37 39 FF FF 03 19 C0 24 AD F8 00 00 < ýÿ79ÿÿ À$ø
0000D5A0 3C 0F B8 05 8D F8 00 00 3C 19 FF B3 37 39 C0 00 < ¸ ø < ÿ³79À
The offset that changed is D4FB. Changes from x28 to x1c. This matches the source code.
Note however, that D4F0 and D550 are duplicate entries on the 400Mhz compile. And the data below. However, only the offset at D4FB is changing from comple to compile.
This is from my router's u-boot:
Offset 0 1 2 3 4 5 6 7 8 9 A B C D E F
0000D270 03 19 C0 24 3C 19 00 04 37 39 08 28 03 19 C0 25 À$< 79 ( À%
0000D280 AD F8 00 00 3C 0F B8 05 8D F8 00 00 3C 19 FF FE ø < ¸ ø < ÿþ
0000D290 37 39 FF FF 03 19 C0 24 AD F8 00 00 10 00 00 33 79ÿÿ À$ø 3
0000D2A0 00 00 00 00 00 00 00 00 3C 0F B8 05 8D F8 00 00 < ¸ ø
0000D2B0 3C 19 FD FF 37 39 FF FF 03 19 C0 24 AD F8 00 00 < ýÿ79ÿÿ À$ø
0000D2C0 3C 0F B8 05 8D F8 00 00 3C 19 FF B3 37 39 C0 00 < ¸ ø < ÿ³79À
0000D2D0 03 19 C0 24 3C 19 00 04 37 39 08 28 03 19 C0 25 À$< 79 ( À%
0000D2E0 AD F8 00 00 3C 0F B8 05 8D F8 00 00 3C 19 FF FE ø < ¸ ø < ÿþ
0000D2F0 37 39 FF FF 03 19 C0 24 AD F8 00 00 10 00 00 1B 79ÿÿ À$ø
0000D300 00 00 00 00 00 00 00 00 3C 0F B8 05 8D F8 00 00 < ¸ ø
0000D310 3C 19 FD FF 37 39 FF FF 03 19 C0 24 AD F8 00 00 < ýÿ79ÿÿ À$ø
0000D320 3C 0F B8 05 8D F8 00 00 3C 19 FF B3 37 39 C0 00 < ¸ ø < ÿ³79À
This matches the 400mhz compile I did, but the offset is at D27B.
I changed this value to "1c". And wrote the u-boot, and rebooted.
Dmesg:
[ 0.000000] Linux version 3.10.49 (xxx@xxx-VirtualBox) (gcc version 4.8.3 (OpenWrt/Linaro GCC 4.8-2014.04 r371) ) #22 Mon Dec 29 13:25:06 TAHT 2014
[ 0.000000] MyLoader: sysp=82408001, boardp=21452249, parts=a06c2203
[ 0.000000] bootconsole [early0] enabled
[ 0.000000] CPU revision is: 00019374 (MIPS 24Kc)
[ 0.000000] SoC: Atheros AR7241 rev 1
[ 0.000000] Clocks: CPU:400.000MHz, DDR:400.000MHz, AHB:200.000MHz, Ref:5.000MHz
This is the memory location for the registers that control the clock speed, based on other threads:
root@x:~# io -4 0x18050000
18050000: 00040828
As you can see, the value is still 28........????
I then checked the byte from the u-boot that is on the flash:
root@x:~# cat /dev/mtd0 > /tmp/uboot_backup.bin
root@x:~# tmp=$(dd if=/tmp/uboot_backup.bin bs=1 skip=53883 count=1)
1+0 records in
1+0 records out
root@x:~# tmp=$(printf "%02x\n" "'$tmp")
root@x:~# echo $tmp
1c
And the value is as it should be, 1c.
Can anyone check they hex dump from u-boot against the offset I am changing, to confirm....
All very strange!
(Last edited by JohnV on 31 Dec 2014, 18:44)