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Topic: TP-Link TL-WR703N Extra SPI ports

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Hello,

After taking a look at the AR9331 datasheet I see that the UART lines (GPIO 9/10) can be reprogrammed to be extra chip selects for the SPI controller. I have an SPI peripheral I would like to connect and the bandwidth required makes bit-banging impractical.

I see I need to modify some bits in 0x18040028 to disable the UART and enable the extra CS. Also, I need to set the appropriate bit in SPI control register at 0x1F000008 to select my peripheral and deselect the flash.

My question is, if my process gets pre-empted during a data transfer, I need to make sure the flash is selected again by writing the old value back into 0x1F000008 before something else tries to access the flash and causes a kernel panic. How do I go about doing that?

Thanks!

I am not authoritative on the subject, but you will probably need to be uninterruptible during your SPI transfer, as any interrupt may cause a Flash read access and crash the system, and make these transfers as short as possible, toggling the CS pin accordingly.

The other way I see is to modify the SPI Flash driver to force reverting to the correct Flash CS before any access.

But I guess you are pretty much on your own, since the datasheet is only available since last week and nobody is familiar enough with the chip yet...

Already had an answer on this issue
The platform AP121 uses the same u-boot\board\ar7240\common\ar7240_flash.h

https://forum.openwrt.org/viewtopic.php?id=41019

(Last edited by Dioptimizer on 18 Dec 2012, 17:58)

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