Topic: Overclocking non-redboot ar71xx devices
There's few threads and info on wiki how to overclock Atheros ar71xx platform devices with redboot bootloader. Since those are bit rare I wanted to see if same tweaks could be made on other devices. If you intend to follow this I highly recommend first verifying that you're able to do TFTP recovery using bootloader. As usual, if you try this don't go filing tickets on trac. Likewise if you stumble to some bug go back to stock speed, verify it's still present and only then go file bug report.
Unlike compiler optimizations that seem to only affect benchmarks such as common OpenSSL test this tweak improved real life performance too. Strongswan AES128-SHA1 IPSEC tunnel performance went from ~3,5MB/s to ~4,3MB/s. Regarding that OpenSSL benchmark, it seems sometimes OpenSSL decides to run various tests for 1,5 seconds instead of more common 3 seconds. Oneliner posted on OpenWrt wiki ignores this when calculating totals and therefore returns incorrect values.
I did my tests with Buffalo WZR-HP-AG300H. Stock settings are 680MHz CPU, 340MHz DDR and 170MHz AHB. Highest this particular unit boots, but is unstable, are 840MHz CPU, 420MHz DDR and 210MHz AHB. It might be possible to get higher clocks working by playing with memory timings. For now I've just changed multiplier settings and left it at 800/400/200.
Values used appear to be slightly different from what is documented on PB44 wiki page. For example default CPU PLL is not 0xC0140080 like it's on PB44, on Buffalo it's 0xC0140180. So before trying this make sure you check how PLL is initialized on your particular device and only then try to play with settings. More details can be found from Redboot source code which is included in F5D8232v1-1.00.16-GPL.tar.gz.
I don't have serial console on this device so no idea if serial port works after changing multiplier. It's quite possible that you need to change various other registers as well for proper operation. With quick tests Ethernet, WLAN and USB appear to work, but how stable remains to be seen.
address: 0x18050000 hex value: 0xC0140180 (680/340/170) _____ = cpu multiplier, bin 10000, dec 16, (16+1)*40 = 680 bin: 11000000000101000000000110000000 10987654321098765432109876543210 3 2 1 0 680 MHz = 10000 (16) = 11000000000101000000000110000000 = C0140180 <- STOCK 720 MHz = 10001 (17) = 11000000000101000000000110001000 = C0140188 760 MHz = 10010 (18) = 11000000000101000000000110010000 = C0140190 800 MHz = 10011 (19) = 11000000000101000000000110011000 = C0140198 840 MHz = 10100 (20) = 11000000000101000000000110100000 = C01401A0 <- UNSTABLE 880 MHz = 10101 (21) = 11000000000101000000000110101000 = C01401A8 <- FAIL
Patch file of changes made. Name 900-overclock.patch and place in target/linux/ar71xx/patches-3.3/. If this fails you can always do same change manually to kernel-entry-init.h in build_dir/linux-ar71xx_generic/linux-3.3.8/arch/mips/include/asm/mach-ath79 and recompile.
--- linux-3.3.8/arch/mips/include/asm/mach-ath79/kernel-entry-init.h.orig 2012-08-19 22:33:48.470673519 +0300 +++ linux-3.3.8/arch/mips/include/asm/mach-ath79/kernel-entry-init.h 2012-08-19 23:23:43.728777554 +0300 @@ -24,6 +24,27 @@ ori t0, CONF_CM_CACHABLE_NONCOHERENT mtc0 t0, CP0_CONFIG nop + + // overclock attempts + + //680/340/170 buffalo default + //li t2, 0xc0140180 + //sw t2, 0x18050000 + + //720/360/180 + //li t2, 0xc0140188 + //sw t2, 0x18050000 + + //800/400/200 + li t2, 0xc0140198 + sw t2, 0x18050000 + + //840/420/210 + //li t2, 0xc01401a0 + //sw t2, 0x18050000 + + // end + .endm .macro smp_slave_setup