ZBT WE1326 crashing with 18.06 image

Hi everyone, it seems to have an issue with last zbt we1326 hardware. It is ZBT-WE1326 V05, and this is the boot logs from upgrade to boot on the new openwrt 18.06 firmware :

===================================================================
                MT7621   stage1 code done 
                CPU=500000000 HZ BUS=166666666 HZ
===================================================================


U-Boot 1.1.3 (Apr 11 2015 - 20:07:37)

SoC:MediaTek MT7621 
DRAM:  512MB(448MB LowMem,64MB HighMem)
relocate_code Pointer at: 9bfa8000

Config XHCI 40M PLL 
******************************
Software System Reset Occurred
******************************
flash manufacture id: ef, device id 40 18
Flash:W25Q128BV Size:16MB
*** Warning - bad CRC, using default environment

 _______________________________________________________________ 
|    ____                 _                 ____               |
|   |  _ \ __ _ _ __   __| | ___  _ __ __ _| __ )  _____  __   |
|   | |_) / _` | '_ \ / _` |/ _ \| '__/ _` |  _ \ / _ \ \/ /   |
|   |  __/ (_| | | | | (_| | (_) | | | (_| | |_) | (_) >  <    |
|   |_|   \__,_|_| |_|\__,_|\___/|_|  \__,_|____/ \___/_/\_\   |
|                                                              |
|                PandoraBox Ralink/MTK Platform                |
|                 The best solution for you                    |
|          Copyright 2015 D-Team Technology Co.,Ltd. SZ        |
|                    Board:AmazingBox                          |
|                                                              |
|                 lintel<lintel.huang@gmail.com>               |
|______________________________________________________________|

===============Board Info================== 
CPU Frequency:880MHz 
Detected Memory:448MiB
Bootloader Version:4.3.1.0
-------------------------------------------- 
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection 
DRAM_TYPE: DDR3 
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: SPI Flash
Date:Apr 11 2015  Time:20:07:37
============================================ 
icache: sets:256, ways:4, linesz:32 ,total:32KiB
dcache: sets:256, ways:4, linesz:32 ,total:32KiB 
============================================ 
#Reset_MT7530

GSW VLAN:LLLW 
GPIO_MODE init:
        I2C:GPIO
        UART_F:GPIO
        GE2:GPIO
        WDT_RST:GPIO
GPIO_MODE_REGs: 0x4853d
READY_LED_BIT:14.
Please choose the operation: 
   1: Load system code to SDRAM via TFTP. 
   2: Load system code then write to Flash via TFTP. 
   3: Boot system code via Flash (default).
   4: Entr boot command line interface.
   7: Load Boot Loader code then write to Flash via Serial. 
   9: Load Boot Loader code then write to Flash via TFTP. 
 0 
   
3: System Boot system code via Flash.

Press Reset button enter upgrade mode!

Reset button pressed!
______________________________________________________
|                                                    |
|              Recovery Module v2.0                  |
|                                                    |
| Note:Please Use Web Browser Upgrade the Firmware ! |
|                                                    |
|    Copyright 2014 D-Team Technology Co.,Ltd. SZ    |
|          lintel<lintel.huang@gmail.com>            |
|____________________________________________________|

[Kernel]uOS Version: v1.2
[TCP/IP]ETH0 MAC:78:A3:51:5C:88:32 
[TCP/IP]IP:192.168.1.1
[TCP/IP]Netmask:255.255.255.0
[TCP/IP]Default Router:0.0.0.0
[DHCPD]Server IP:192.168.1.1

NetTxPacket = 0x9BFE0C80. 
Trying Eth0 (10/100-M)

 Waitting for RX_DMA_BUSY status Start... done


 ETH_STATE_ACTIVE!! 
[Kernel]Enter Network Loop!
[LED]Thread started!! 
[httpd]Upload at 0x80300000 RAM:458752KiB buffer:454656KiB

=================================================
Data load at 0x80300000,len:0xec00af.
Check image:
Image type              --> Firmware 
Image Header Checksum   --> OK
Image Data Checksum     --> OK

=================================================

[httpd]Upload ok!
[kernel]Signal pending 0.
[Kernel]Signal ACK and clean.
[Kernel]Firmware upgrade Signal detect!!
Upgrade linux kernel block !!
...................................................................................................................................................................................................................
...................................................................................................................................................................................................................
.
.
Done!

[kernel]Firmware upgrade done!
[TCP/IP]tcp: got reset, aborting connection.
[httpd]Reboot!!!
[kernel]Signal pending 0.
[Kernel]Signal ACK and clean.
[Kernel]reboot Signal detect!!

===================================================================
                MT7621   stage1 code Mar 12 2015 14:43:30 (ASIC)
                CPU=500000000 HZ BUS=166666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x21100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1066Mhz ===
PLL3 FB_DL: 0x8, 1/0 = 518/506 21000000
PLL4 FB_DL: 0x15, 1/0 = 518/506 55000000
PLL2 FB_DL: 0x18, 1/0 = 524/500 61000000
do DDR setting..[01F40000]
Apply DDR3 Setting...(use customer AC)
          0    8   16   24   32   40   48   56   64   72   80   88   96  104  112  120
      --------------------------------------------------------------------------------
0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
000E:|    0    0    0    0    0    0    0    0    0    0    1    1    1    1    1    1
000F:|    0    0    0    0    0    1    1    1    1    1    1    1    1    1    1    1
0010:|    1    1    1    1    1    1    1    1    1    1    0    0    0    0    0    0
0011:|    1    1    1    1    1    0    0    0    0    0    0    0    0    0    0    0
0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0    0
DRAMC_DQSCTL1[0e0]=13000000
DRAMC_DQSGCTL[124]=80000033
rank 0 coarse = 15
rank 0 fine = 80
B:|    0    0    0    0    0    0    0    0    0    0    1    1    1    0    0    0
opt_dle value:11
DRAMC_DDR2CTL[07c]=C287223D
DRAMC_PADCTL4[0e4]=000022B3
DRAMC_DQIDLY1[210]=0B0A090D
DRAMC_DQIDLY2[214]=070A080A
DRAMC_DQIDLY3[218]=0A090907
DRAMC_DQIDLY4[21c]=0A090C07
DRAMC_R0DELDLY[018]=00001D1D
==================================================================
                RX      DQS perbit delay software calibration 
==================================================================
1.0-15 bit dq delay value
==================================================================
bit|     0  1  2  3  4  5  6  7  8  9
--------------------------------------
0 |    11 6 9 11 9 7 9 7 6 7 
10 |    9 9 7 11 9 9 
--------------------------------------

==================================================================
2.dqs window
x=pass dqs delay value (min~max)center 
y=0-7bit DQ of every group
input delay:DQS0 =29 DQS1 = 29
==================================================================
bit     DQS0     bit      DQS1
0  (1~54)27  8  (2~54)28
1  (1~51)26  9  (1~54)27
2  (1~55)28  10  (1~58)29
3  (1~57)29  11  (1~55)28
4  (1~56)28  12  (1~57)29
5  (1~55)28  13  (1~56)28
6  (1~55)28  14  (1~57)29
7  (1~58)29  15  (1~55)28
==================================================================
3.dq delay value last
==================================================================
bit|    0  1  2  3  4  5  6  7  8   9
--------------------------------------
0 |    13 9 10 11 10 8 10 7 7 9 
10 |    9 10 7 12 9 10 
==================================================================
==================================================================
     TX  perbyte calibration 
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000 
dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1 
dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2 
DQ loop=15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=15,  finish count=1 
dqs_perbyte_dly.last_dqdly_pass[1]=15,  finish count=2 
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
DRAMC_DQODLY1[200]=88888888
DRAMC_DQODLY2[204]=88888888
20,data:88
[EMI] DRAMC calibration passed

===================================================================
                MT7621   stage1 code done 
                CPU=500000000 HZ BUS=166666666 HZ
===================================================================


U-Boot 1.1.3 (Apr 11 2015 - 20:07:37)

SoC:MediaTek MT7621 
DRAM:  512MB(448MB LowMem,64MB HighMem)
relocate_code Pointer at: 9bfa8000

Config XHCI 40M PLL 
******************************
Software System Reset Occurred
******************************
flash manufacture id: ef, device id 40 18
Flash:W25Q128BV Size:16MB
*** Warning - bad CRC, using default environment

 _______________________________________________________________ 
|    ____                 _                 ____               |
|   |  _ \ __ _ _ __   __| | ___  _ __ __ _| __ )  _____  __   |
|   | |_) / _` | '_ \ / _` |/ _ \| '__/ _` |  _ \ / _ \ \/ /   |
|   |  __/ (_| | | | | (_| | (_) | | | (_| | |_) | (_) >  <    |
|   |_|   \__,_|_| |_|\__,_|\___/|_|  \__,_|____/ \___/_/\_\   |
|                                                              |
|                PandoraBox Ralink/MTK Platform                |
|                 The best solution for you                    |
|          Copyright 2015 D-Team Technology Co.,Ltd. SZ        |
|                    Board:AmazingBox                          |
|                                                              |
|                 lintel<lintel.huang@gmail.com>               |
|______________________________________________________________|

===============Board Info================== 
CPU Frequency:880MHz 
Detected Memory:448MiB
Bootloader Version:4.3.1.0
-------------------------------------------- 
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection 
DRAM_TYPE: DDR3 
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: SPI Flash
Date:Apr 11 2015  Time:20:07:37
============================================ 
icache: sets:256, ways:4, linesz:32 ,total:32KiB
dcache: sets:256, ways:4, linesz:32 ,total:32KiB 
============================================ 
#Reset_MT7530

GSW VLAN:LLLW 
GPIO_MODE init:
        I2C:GPIO
        UART_F:GPIO
        GE2:GPIO
        WDT_RST:GPIO
GPIO_MODE_REGs: 0x4853d
READY_LED_BIT:14.
Please choose the operation: 
   1: Load system code to SDRAM via TFTP. 
   2: Load system code then write to Flash via TFTP. 
   3: Boot system code via Flash (default).
   4: Entr boot command line interface.
   7: Load Boot Loader code then write to Flash via Serial. 
   9: Load Boot Loader code then write to Flash via TFTP. 
 0 
   
3: System Boot system code via Flash.

Press Reset button enter upgrade mode!
## Booting image at bc050000 ...
   Image Name:   MIPS OpenWrt Linux-4.14.54
   Image Type:   MIPS Linux Kernel Image (lzma compressed)
   Data Size:    1873438 Bytes =  1.8 MB
   Load Address: 80001000
   Entry Point:  80001000
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 80001000) ...
## Giving linux memsize in MB, 512

Starting kernel ...

[    0.000000] Linux version 4.14.54 (keulu@openwrt-builder) (gcc version 7.3.0 (OpenWrt GCC 7.3.0 r7188-b0b5c64c22)) #0 SMP Mon Jul 30 16:25:17 2018
[    0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[    0.000000] bootconsole [early0] enabled
[    0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[    0.000000] MIPS: machine is ZBT-WE1326
[    0.000000] Determined physical RAM map:
[    0.000000]  memory: 1c000000 @ 00000000 (usable)
[    0.000000]  memory: 04000000 @ 20000000 (usable)
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] VPE topology {2,2} total 4
[    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000000000000-0x000000000fffffff]
[    0.000000]   HighMem  [mem 0x0000000010000000-0x0000000023ffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x000000001bffffff]
[    0.000000]   node   0: [mem 0x0000000020000000-0x0000000023ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000023ffffff]
[    0.000000] random: get_random_bytes called from start_kernel+0x90/0x4a4 with crng_init=0
[    0.000000] percpu: Embedded 14 pages/cpu @8148f000 s26192 r8192 d22960 u57344
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 130560
[    0.000000] Kernel command line: console=ttyS0,115200 rootfstype=squashfs,jffs2
[    0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.000000] Writing ErrCtl register=0000e810
[    0.000000] Readback ErrCtl register=0000e810
[    0.000000] Memory: 513000K/524288K available (4416K kernel code, 235K rwdata, 980K rodata, 244K init, 264K bss, 11288K reserved, 0K cma-reserved, 262144K highmem)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] Hierarchical RCU implementation.
[    0.000000] NR_IRQS: 256
[    0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
[    0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns
[    0.000010] sched_clock: 32 bits at 440MHz, resolution 2ns, wraps every 4880645118ns
[    0.007825] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
[    0.073989] pid_max: default: 32768 minimum: 301
[    0.078774] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.085281] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
[    0.094128] Hierarchical SRCU implementation.
[    0.099227] smp: Bringing up secondary CPUs ...
[    0.105238] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.105249] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.105261] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.105413] CPU1 revision is: 0001992f (MIPS 1004Kc)
[    0.164018] Synchronize counters for CPU 1: done.
[    0.205730] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.205738] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.205747] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.205821] CPU2 revision is: 0001992f (MIPS 1004Kc)
[    0.255289] Synchronize counters for CPU 2: done.
[    0.286521] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.286528] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.286536] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[    0.286616] CPU3 revision is: 0001992f (MIPS 1004Kc)
[    0.340474] Synchronize counters for CPU 3: done.
[    0.370340] smp: Brought up 1 node, 4 CPUs
[    0.377845] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.387644] futex hash table entries: 1024 (order: 3, 32768 bytes)
[    0.393969] pinctrl core: initialized pinctrl subsystem
[    0.399738] NET: Registered protocol family 16
[    0.414696] pull PCIe RST: RALINK_RSTCTRL = 0
[    0.719383] release PCIe RST: RALINK_RSTCTRL = 7000000
[    0.724431] ***** Xtal 40MHz *****
[    0.727787] release PCIe RST: RALINK_RSTCTRL = 7000000
[    0.732884] Port 0 N_FTS = 1b102800
[    0.736352] Port 1 N_FTS = 1b105000
[    0.739794] Port 2 N_FTS = 1b105000
[    1.894920] PCIE0 no card, disable it(RST&CLK)
[    1.899280]  -> 10207f2
[    1.901684] PCIE1 enabled
[    1.904274] PCIE2 enabled
[    1.906878] PCI host bridge /pcie@1e140000 ranges:
[    1.911655]  MEM 0x0000000060000000..0x000000006fffffff
[    1.916806]   IO 0x000000001e160000..0x000000001e16ffff
[    1.922013] PCI coherence region base: 0xbfbf8000, mask/settings: 0x60000000
[    1.937437] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    1.943294] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    1.949049] mt7621_gpio 1e000600.gpio: registering 32 gpios
[    1.956208] PCI host bridge to bus 0000:00
[    1.960241] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
[    1.967076] pci_bus 0000:00: root bus resource [io  0xffffffff]
[    1.972929] pci_bus 0000:00: root bus resource [??? 0x00000000 flags 0x0]
[    1.979687] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
[    1.989737] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
[    1.996252] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
[    2.003191] pci 0000:00:01.0: BAR 0: no space for [mem size 0x80000000]
[    2.009725] pci 0000:00:01.0: BAR 0: failed to assign [mem size 0x80000000]
[    2.016654] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
[    2.023391] pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref]
[    2.030569] pci 0000:00:01.0: BAR 8: assigned [mem 0x60200000-0x602fffff]
[    2.037293] pci 0000:00:00.0: BAR 1: assigned [mem 0x60300000-0x6030ffff]
[    2.044055] pci 0000:00:01.0: BAR 1: assigned [mem 0x60310000-0x6031ffff]
[    2.050775] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
[    2.058050] pci 0000:01:00.0: BAR 6: assigned [mem 0x60100000-0x6010ffff pref]
[    2.065202] pci 0000:00:00.0: PCI bridge to [bus 01]
[    2.070140] pci 0000:00:00.0:   bridge window [mem 0x60000000-0x600fffff]
[    2.076864] pci 0000:00:00.0:   bridge window [mem 0x60100000-0x601fffff pref]
[    2.084062] pci 0000:02:00.0: BAR 0: assigned [mem 0x60200000-0x602fffff]
[    2.090773] pci 0000:00:01.0: PCI bridge to [bus 02]
[    2.095709] pci 0000:00:01.0:   bridge window [mem 0x60200000-0x602fffff]
[    2.103889] clocksource: Switched to clocksource GIC
[    2.110547] NET: Registered protocol family 2
[    2.115558] TCP established hash table entries: 2048 (order: 1, 8192 bytes)
[    2.122446] TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
[    2.128874] TCP: Hash tables configured (established 2048 bind 2048)
[    2.135298] UDP hash table entries: 256 (order: 1, 8192 bytes)
[    2.141068] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[    2.147568] NET: Registered protocol family 1
[    2.383836] 4 CPUs re-calibrate udelay(lpj = 2924544)
[    2.390268] Crashlog allocated RAM at address 0x3f00000
[    2.395918] workingset: timestamp_bits=30 max_order=17 bucket_order=0
[    2.409298] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    2.415103] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    2.425854] Unhandled kernel unaligned access[#1]:
[    2.430562] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.14.54 #0
[    2.436519] task: 8fc40000 task.stack: 8fc34000
[    2.441005] $ 0   : 00000000 00000001 291c8285 3d56fbe0
[    2.446188] $ 4   : 15151515 8fe48c00 805f2400 00000006
[    2.451371] $ 8   : 00000000 804498d0 00000010 00000001
[    2.456557] $12   : 000009d0 00000000 00000000 00000000
[    2.461740] $16   : 8fc19007 8fc0492c 8fc30cdc 00000006
[    2.466924] $20   : 8fe48c00 80505d3c 8fe48c2c 8fe48c00
[    2.472108] $24   : 00000010 8001603c                  
[    2.477293] $28   : 8fc34000 8fc35d50 80564b48 801718ec
[    2.482476] Hi    : 0012041d
[    2.485328] Lo    : 46d64a97
[    2.488216] epc   : 8017191c insert_header+0x314/0x480
[    2.493281] ra    : 801718ec insert_header+0x2e4/0x480
[    2.498374] Status: 11008403 KERNEL EXL IE 
[    2.502522] Cause : 40800010 (ExcCode 04)
[    2.506497] BadVA : 291c8285
[    2.509348] PrId  : 0001992f (MIPS 1004Kc)
[    2.513407] Modules linked in:
[    2.516437] Process swapper/0 (pid: 1, threadinfo=8fc34000, task=8fc40000, tls=00000000)
[    2.524468] Stack : 8fe46a00 00000000 8055a1b8 8fc19000 8fc19007 38e38e39 8fc04900 805f2400
[    2.532760]         00000006 80564160 8fc19007 00000000 805f0000 8fc04900 8fe48c00 00000000
[    2.541055]         00000001 8fc04900 00000000 80171e40 81494218 80286010 00120000 00000008
[    2.549349]         80504e0c 8fdab800 805f2424 804fabc0 804fabe4 00000000 8fc19007 80564b48
[    2.557643]         8fc19000 80564b00 00000001 80564160 80583304 805c0000 805c0000 80172420
[    2.565938]         ...
[    2.568359] Call Trace:
[    2.570782] [<8017191c>] insert_header+0x314/0x480
[    2.575543] [<80171e40>] __register_sysctl_table+0x2ec/0x5bc
[    2.581152] [<80172420>] __register_sysctl_paths+0x114/0x1f0
[    2.586795] [<80595dfc>] ipc_sysctl_init+0x14/0x24
[    2.591520] [<80005650>] do_one_initcall+0xd0/0x1a0
[    2.596363] [<80583d78>] kernel_init_freeable+0x168/0x228
[    2.601720] [<80449bdc>] kernel_init+0x10/0x10c
[    2.606214] [<8000b0d8>] ret_from_kernel_thread+0x14/0x1c
[    2.611562] Code: 00621021  00021080  00821021 <8c540000> 0c110e23  02802025  0053302a  00408025  0266100a 
[    2.621234] 
[    2.622844] ---[ end trace 3eab4977b5e33e33 ]---
[    2.628447] Kernel panic - not syncing: Fatal exception
[    2.634662] Rebooting in 1 seconds..

With older ZBT WE1326 and the same firmware image, there was absolutely no problem ! Does anyone got a clue for that ?

1 Like

Hi Irongomme,
I am in the same situation, just got new we1326 v5 and cannot boot after flashing 18.06 firm.
I tried flashing hardware v2 stock firm, which is an openwrt barrier breaker, and it boots with no issues. Then I tryed to flash 18.06 sysupgrade image from BB luci firmware section with same results, also with sysupgrade command line, no way to make a succesfull boot to 18.06.
I just emailed my sales contact at ZBT for them to check and hopefully instruct how to fix. This new version stocks a ZBT OS v1, instead of OpenWrt BB as it did before. Also noted that ssh access with root/admin password keeps saying bas user/password, and ssh port is 2222 instead of 22.

1 Like

Hi,

The same for us , we have contacted our reseller to find a solution, because we have bought 50 u of this hardware to use our custom firmware. It worked on V01 and V02, but on V05 only ZBT firmware works !
I'll report here if I find a workaround

Answer from ZBT :

the V02 version is with 512M RAM , anD V05 is with 256M RAM

So, how can I change config options to adjust RAM quantity to 256 in the menuconfig kernel options ?

Hi,
I have the same response, they downgraded v5 to 256MB.
We need to adjust memory to 256 to compile a valid image, but I have no idea how to do that....
I will investigate and be back if I found out something..

PS: u-boot log shows 512MB, it doesnt make sense though:

SoC:MediaTek MT7621 
DRAM:  512MB(448MB LowMem,64MB HighMem)
1 Like

ZBT asked me to send a photo of the memory chip to confirm the model I was sent is the 256.

I googled for that memory and its datasheet says is 256 MB,
Until this new version is supported, if v5 only changes memory size I believe that editing file "target/linux/ramips/dts/ZBT-WE1326.dts" with updated memory sizes will let us to compile a working image.

memory@0 {
  16                 device_type = "memory";
  17                 reg = <0x0 0x1c000000>, <0x20000000 0x4000000>;
  18         };

How can we know how many memory is "high" memory?

1 Like

AWEWOME !!!

Just replace :

<0x0 0x1c000000>, <0x20000000 0x4000000>;

by :

<0x0 0x10000000>;

And it works again !!
Big thanks for your help !

1 Like

Yep its working ;-). Now would be great to have this new hardware version in the official distro. Do you know where/how to request this?

Open a Pull Request or send a patch to the mailing list.

https://openwrt.org/submitting-patches

1 Like

Hi irongonmme,

I am in the same situation, just got new we1326 v5 and cannot boot after flashing 18.06 firmware,
To flash current openwrt release image, I download current version of openwrt 18.06.2 done changes in "ZBT-WE1326.dts" as per your comment and try to compile image.But, still router crashing.
Can, you help me anythhing is missing or wrong

1 Like

I also have same issue.
@irongomme Can you help, how you fix it?