Well...got a new usb-ttl adapter, set to 3.3v operation. Hooked it up as follows:
USB GND to R4A GND
USB TX to R4A RX
USB RX to R4A TX.
Using picocom on linux, seeing the output perfectly.
But I can't interrupt the boot sequence. I see the menu with options 1-9, I'm already hitting one of the options but nothing happens, the boot sequence continues. I can see the TX light on the adapter flashing every time I hit a key, but the device doesnt react.
What am I missing...?
Xaiomi builds the bootloader with bootdelay=0, which means it will not pause to consider entering the menu.
The bootloader can be patched with a non zero bootdelay but installing the new bootloader into the flash requires either a chip programmer or successfully booting OpenWrt and using mtd.
@mk24 thanks for the information...I guess the only way forward is to get a programmer then since openwrt won't boot on this device...
Any recommendations on an entry-level programmer for this chip?
alternatively, what are the chances I could build a tiny image - shell only (no luci), tftp, mtd...?
I have more experience compiling linux builds than programming roms...
Won't work either - the xiaomi recovery environment only allows it's own firmware...programmer it is.
Google CH341A spi programmer.
Hi, another way to install openwrt is using the initramfs.bin (compiled with EN25QX128A support) at your current bootloader. Refer to:
@RadioOperator thanks very much for your continuing input, I appreciate it very much 
Currently I've ordered a chip programmer and am waiting for it to arrive, hopefully next week. In the present state I can't do anything without it since the recovery refuses to load anything larger than 1.7MB and the bootloader doesnt allow the boot menu to be used.
With the SPI programmer I'll be able to dump the code and set the bootdelay, which should then allow me to unbrick the device and try other things...and also learn something about using SPI programmers 
I'll post again once I'm at that point.
You could try to select [1] on the bootloader menu to load a initramfs.bin code into RAM, should be not limited you ~2MB. Then you'll see the openwrt Luci running in RAM.
then using mtd cmd to flash my build into Flash IC, openwrt should work as the above link'user.
The problem is you have to get a initramfs.bin file supported the IC, if you donot have it, let me know.
If this works, you no need to touch the current bootloader. Even bootloader does not support the IC.
Unfortunately the problem is that the bootloader does not allow me to select [1] or any other option. See MK24 post above:
"Xaiomi builds the bootloader with bootdelay=0, which means it will not pause to consider entering the menu."
I'm assuming that is the problem since it doesnt accept any keypress from me while I'm using the USB-TTL adapter, or an Arduino...
For me i use with success a beautiful socket and why not a flash memory of 32M MX25L25645GM2I-10G ...
I have a new CH341A programmer with SOP8 clip. The black model, voltage corrected. I've connected it up and attempted to dump the boot rom using flashrom in linux, but it seems flashrom cannot recognize the chip type, even specifying EN25Q128 which is listed in the supported chips list.
Also tried compiling ch341eeprom and it was able to dump a file but nothing readable.
Trying windows now with neoprogrammer...
I always have removed the flash chip from the router rather than trying to read or program it in place. It is simple with a hot air gun.
The bootloader is locked from entering the bootloader CLI with serial but you can still read and observe the boot process on the serial output.
It may come to that ... but for now I managed to extract the bootloader using AsProgrammer and information for the chip I found on 4pda - <EN25QX128A id="1C7118" page="256" size="16777216"/>
I adjusted the bootdelay value to 5, erased the flash chip and am now writing back to the chip. Lets see what happens... 
Flashing worked, but changing the value had no effect - still could not enter anything and the menu did not wait for any keypress.
So I flashed breed. It works. Now I will try to load @RadioOperator 's openwrt version...
Well ... @RadioOperator's build also goes into a boot loop:
Boot and Recovery Environment for Embedded Devices
Copyright (C) 2021 HackPascal <hackpascal@gmail.com>
Build date 2021-12-15 [git-f9b74d0]
Version 1.1 (r1337)
DRAM: 128MB
Platform: MediaTek MT7621A ver 1, eco 3
Board: PandoraBox PBR-M1 / Newifi Y2S
Clocks: CPU: 880MHz, DDR: 1040MHz, Bus: 220MHz, Ref: 40MHz
Flash: EON EN25QX128 (16MB) on mt7621-spi.0
Environment variables @ 00030000 on flash bank 0, size 00010000
rt2880-eth: MAC address from EEPROM is invalid, using default settings.
rt2880-eth: Using MAC address 00:0c:43:00:00:01
eth0: MediaTek MT7530 Gigabit switch
Network started on eth0, inet addr 192.168.1.1, netmask 255.255.255.0
Press any key to0interrupt autoboot(...8888▒▒
Press any key to interrupt autoboot ... 0
Trying to boot firmware from 0x00050000 in flash bank 0 ...
Reading data into memory ...
U-Boot firmware image header detected.
Image Name: MIPS OpenWrt Linux-5.10.108
Data Size: 2570231 Bytes
Load Address: 80001000
Entry Point: 80001000
Flushing cache ... done.
Starting kernel at 0x80001000...
OpenWrt kernel loader for MIPS based SoC
Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
Decompressing kernel... done!
Starting kernel at 80001000...
[ 0.000000] Linux version 5.10.108 (jack@T420) (mipsel-openwrt-linux-musl-gcc (OpenWrt GCC 11.2.0 r19255-009f8afe06) 11.2.0, GNU ld (GNU Binutils) 2.37) #0 SMP Sun Mar 27 04:00:50 2022
[ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[ 0.000000] printk: bootconsole [early0] enabled
[ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[ 0.000000] MIPS: machine is Xiaomi Mi Router 4A Gigabit Edition
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] VPE topology {2,2} total 4
[ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] HighMem empty
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] percpu: Embedded 15 pages/cpu s30096 r8192 d23152 u61440
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32480
[ 0.000000] Kernel command line: console=ttyS0,115200n8 rootfstype=squashfs,jffs2
[ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
[ 0.000000] Writing ErrCtl register=00010000
[ 0.000000] Readback ErrCtl register=00010000
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Memory: 119864K/131072K available (6691K kernel code, 622K rwdata, 796K rodata, 1284K init, 235K bss, 11208K reserved, 0K cma-reserved, 0K highmem)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] rcu: Hierarchical RCU implementation.
[ 0.000000] Tracing variant of Tasks RCU enabled.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
[ 0.000000] NR_IRQS: 256
[ 0.000000] random: get_random_bytes called from 0x807efa80 with crng_init=0
[ 0.000000] CPU Clock: 880MHz
[ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
[ 0.000013] sched_clock: 64 bits at 880MHz, resolution 1ns, wraps every 4398046511103ns
[ 0.007942] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4343773742 ns
[ 0.016922] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
[ 0.083086] pid_max: default: 32768 minimum: 301
[ 0.087855] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[ 0.095058] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[ 0.105510] rcu: Hierarchical SRCU implementation.
[ 0.110509] dyndbg: Ignore empty _ddebug table in a CONFIG_DYNAMIC_DEBUG_CORE build
[ 0.118537] smp: Bringing up secondary CPUs ...
[ 0.123696] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.123706] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.123718] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.123798] CPU1 revision is: 0001992f (MIPS 1004Kc)
[ 0.178398] Synchronize counters for CPU 1: done.
[ 0.210490] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.210499] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.210508] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.210557] CPU2 revision is: 0001992f (MIPS 1004Kc)
[ 0.269584] Synchronize counters for CPU 2: done.
[ 0.300066] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.300076] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.300084] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.300137] CPU3 revision is: 0001992f (MIPS 1004Kc)
[ 0.354776] Synchronize counters for CPU 3: done.
[ 0.384647] smp: Brought up 1 node, 4 CPUs
[ 0.392807] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[ 0.402633] futex hash table entries: 1024 (order: 3, 32768 bytes, linear)
[ 0.409672] pinctrl core: initialized pinctrl subsystem
[ 0.416858] NET: Registered protocol family 16
[ 0.423483] cpuidle: using governor teo
[ 0.445473] random: fast init done
[ 0.468819] clocksource: Switched to clocksource GIC
[ 0.476075] NET: Registered protocol family 2
[ 0.480720] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear)
[ 0.488542] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes, linear)
[ 0.496894] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear)
[ 0.504479] TCP bind hash table entries: 1024 (order: 1, 8192 bytes, linear)
[ 0.511480] TCP: Hash tables configured (established 1024 bind 1024)
[ 0.517903] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
[ 0.524386] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
[ 0.531521] NET: Registered protocol family 1
[ 0.535814] PCI: CLS 0 bytes, default 32
[ 0.542360] workingset: timestamp_bits=14 max_order=15 bucket_order=1
[ 0.552957] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 0.558706] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[ 0.571317] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 0.577180] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 0.583122] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 0.589587] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
[ 0.597846] printk: console [ttyS0] disabled
[ 0.602258] 1e000c00.uartlite: ttyS0 at MMIO 0x1e000c00 (irq = 19, base_baud = 3125000) is a 16550A
[ 0.611272] printk: console [ttyS0] enabled
[ 0.611272] printk: console [ttyS0] enabled
[ 0.619534] printk: bootconsole [early0] disabled
[ 0.619534] printk: bootconsole [early0] disabled
[ 0.631784] spi-mt7621 1e000b00.spi: sys_freq: 220000000
[ 0.638599] spi-nor spi0.0: en25qx128a (16384 Kbytes)
[ 0.643809] 8 fixed-partitions partitions found on MTD device spi0.0
[ 0.650266] Creating 8 MTD partitions on "spi0.0":
[ 0.655044] 0x000000000000-0x000000030000 : "u-boot"
[ 0.661078] 0x000000030000-0x000000040000 : "u-boot-env"
[ 0.667404] 0x000000040000-0x000000050000 : "Bdata"
[ 0.673336] 0x000000050000-0x000000060000 : "factory"
[ 0.679600] 0x000000060000-0x000000070000 : "crash"
[ 0.685664] 0x000000070000-0x000000080000 : "cfg_bak"
[ 0.691863] 0x000000080000-0x000000180000 : "overlay"
[ 0.697893] 0x000000180000-0x000001000000 : "firmware"
[ 0.760749] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module
[ 0.770790] mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
[ 0.780488] i2c /dev entries driver
[ 0.786713] mt7621-pci 1e140000.pcie: host bridge /pcie@1e140000 ranges:
[ 0.793517] mt7621-pci 1e140000.pcie: No bus range found for /pcie@1e140000, using [bus 00-ff]
[ 0.802339] mt7621-pci 1e140000.pcie: MEM 0x0060000000..0x006fffffff -> 0x0000000000
[ 0.810521] mt7621-pci 1e140000.pcie: IO 0x001e160000..0x001e16ffff -> 0x0000000000
[ 0.818804] mt7621-pci 1e140000.pcie: Parsing DT failed
[ 0.826358] NET: Registered protocol family 10
[ 0.832410] Segment Routing with IPv6
[ 0.836169] NET: Registered protocol family 17
[ 0.841158] 8021q: 802.1Q VLAN Support v1.8
[ 0.848759] mt7530 mdio-bus:1f: MT7530 adapts as multi-chip module
[ 0.873654] mt7530 mdio-bus:1f lan2 (uninitialized): PHY [mt7530-0:02] driver [MediaTek MT7530 PHY] (irq=26)
[ 0.885988] mt7530 mdio-bus:1f lan1 (uninitialized): PHY [mt7530-0:03] driver [MediaTek MT7530 PHY] (irq=27)
[ 0.898440] mt7530 mdio-bus:1f wan (uninitialized): PHY [mt7530-0:04] driver [MediaTek MT7530 PHY] (irq=28)
[ 0.911061] mt7530 mdio-bus:1f: configuring for fixed/rgmii link mode
[ 0.921557] DSA: tree 0 setup
[ 0.924921] rt2880-pinmux pinctrl: pcie is already enabled
[ 0.930538] mt7621-pci 1e140000.pcie: host bridge /pcie@1e140000 ranges:
[ 0.937224] mt7621-pci 1e140000.pcie: No bus range found for /pcie@1e140000, using [bus 00-ff]
[ 0.946026] mt7621-pci 1e140000.pcie: MEM 0x0060000000..0x006fffffff -> 0x0000000000
[ 0.954203] mt7621-pci 1e140000.pcie: IO 0x001e160000..0x001e16ffff -> 0x0000000000
[ 0.962483] mt7621-pci-phy 1e149000.pcie-phy: PHY for 0xbe149000 (dual port = 1)
[ 0.970371] mt7621-pci-phy 1e14a000.pcie-phy: PHY for 0xbe14a000 (dual port = 0)
[ 0.978033] mt7621-pci 1e140000.pcie: failed to parse bus ranges property: -22
[ 1.085475] mt7621-pci-phy 1e149000.pcie-phy: Xtal is 40MHz
[ 1.091063] mt7621-pci-phy 1e14a000.pcie-phy: Xtal is 40MHz
[ 1.196788] mt7621-pci 1e140000.pcie: pcie2 no card, disable it (RST & CLK)
[ 1.203743] mt7621-pci 1e140000.pcie: PCIE0 enabled
[ 1.208597] mt7621-pci 1e140000.pcie: PCIE1 enabled
[ 1.213478] mt7621-pci 1e140000.pcie: PCI coherence region base: 0x60000000, mask/settings: 0xf0000002
[ 1.222948] mt7621-pci 1e140000.pcie: PCI host bridge to bus 0000:00
[ 1.229350] pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff]
[ 1.236205] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
[ 1.243075] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 1.248540] pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff] (bus address [0x00000000-0x0fffffff])
[ 1.258743] pci 0000:00:00.0: [0e8d:0801] type 01 class 0x060400
[ 1.264765] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x7fffffff]
[ 1.271033] pci 0000:00:00.0: reg 0x14: [mem 0x60400000-0x6040ffff]
[ 1.277338] pci 0000:00:00.0: supports D1
[ 1.281352] pci 0000:00:00.0: PME# supported from D0 D1 D3hot
[ 1.287702] pci 0000:00:01.0: [0e8d:0801] type 01 class 0x060400
[ 1.293774] pci 0000:00:01.0: reg 0x10: [mem 0x00000000-0x7fffffff]
[ 1.300045] pci 0000:00:01.0: reg 0x14: [mem 0x60410000-0x6041ffff]
[ 1.306347] pci 0000:00:01.0: supports D1
[ 1.310360] pci 0000:00:01.0: PME# supported from D0 D1 D3hot
[ 1.317849] pci 0000:01:00.0: [14c3:7662] type 00 class 0x028000
[ 1.323939] pci 0000:01:00.0: reg 0x10: initial BAR value 0x00000000 invalid
[ 1.330990] pci 0000:01:00.0: reg 0x10: [mem size 0x00100000 64bit]
[ 1.337265] pci 0000:01:00.0: reg 0x30: initial BAR value 0x00000000 invalid
[ 1.344302] pci 0000:01:00.0: reg 0x30: [mem size 0x00010000 pref]
[ 1.350595] pci 0000:01:00.0: PME# supported from D0 D3hot D3cold
[ 1.358185] pci 0000:00:00.0: PCI bridge to [bus 01-ff]
[ 1.363448] pci 0000:00:00.0: bridge window [io 0x0000-0x0fff]
[ 1.369540] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff]
[ 1.376300] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref]
[ 1.383517] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01
[ 1.390410] pci 0000:02:00.0: [14c3:7603] type 00 class 0x028000
[ 1.396447] pci 0000:02:00.0: reg 0x10: initial BAR value 0x00000000 invalid
[ 1.403506] pci 0000:02:00.0: reg 0x10: [mem size 0x00100000]
[ 1.409399] pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
[ 1.416979] pci 0000:00:01.0: PCI bridge to [bus 02-ff]
[ 1.422241] pci 0000:00:01.0: bridge window [io 0x0000-0x0fff]
[ 1.428308] pci 0000:00:01.0: bridge window [mem 0x60200000-0x602fffff]
[ 1.435090] pci 0000:00:01.0: bridge window [mem 0x60300000-0x603fffff pref]
[ 1.442309] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02
[ 1.448990] pci 0000:00:00.0: BAR 0: no space for [mem size 0x80000000]
[ 1.455576] pci 0000:00:00.0: BAR 0: failed to assign [mem size 0x80000000]
[ 1.462532] pci 0000:00:01.0: BAR 0: no space for [mem size 0x80000000]
[ 1.469150] pci 0000:00:01.0: BAR 0: failed to assign [mem size 0x80000000]
[ 1.476085] pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
[ 1.482868] pci 0000:00:00.0: BAR 9: assigned [mem 0x60100000-0x601fffff pref]
[ 1.490093] pci 0000:00:01.0: BAR 8: assigned [mem 0x60200000-0x602fffff]
[ 1.496854] pci 0000:00:01.0: BAR 9: assigned [mem 0x60300000-0x603fffff pref]
[ 1.504067] pci 0000:00:00.0: BAR 1: assigned [mem 0x60400000-0x6040ffff]
[ 1.510858] pci 0000:00:01.0: BAR 1: assigned [mem 0x60410000-0x6041ffff]
[ 1.517618] pci 0000:00:00.0: BAR 7: assigned [io 0x1e160000-0x1e160fff]
[ 1.524400] pci 0000:00:01.0: BAR 7: assigned [io 0x1e161000-0x1e161fff]
[ 1.531204] pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
[ 1.538494] pci 0000:01:00.0: BAR 6: assigned [mem 0x60100000-0x6010ffff pref]
[ 1.545708] pci 0000:00:00.0: PCI bridge to [bus 01]
[ 1.550676] pci 0000:00:00.0: bridge window [io 0x1e160000-0x1e160fff]
[ 1.557437] pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff]
[ 1.564217] pci 0000:00:00.0: bridge window [mem 0x60100000-0x601fffff pref]
[ 1.571440] pci 0000:02:00.0: BAR 0: assigned [mem 0x60200000-0x602fffff]
[ 1.578202] pci 0000:00:01.0: PCI bridge to [bus 02]
[ 1.583167] pci 0000:00:01.0: bridge window [io 0x1e161000-0x1e161fff]
[ 1.589956] pci 0000:00:01.0: bridge window [mem 0x60200000-0x602fffff]
[ 1.596714] pci 0000:00:01.0: bridge window [mem 0x60300000-0x603fffff pref]
[ 1.606526] /dev/root: Can't open blockdev
[ 1.610705] VFS: Cannot open root device "(null)" or unknown-block(0,0): error -6
[ 1.618150] Please append a correct "root=" boot option; here are the available partitions:
[ 1.626507] 1f00 192 mtdblock0
[ 1.626513] (driver?)
[ 1.633047] 1f01 64 mtdblock1
[ 1.633052] (driver?)
[ 1.639578] 1f02 64 mtdblock2
[ 1.639583] (driver?)
[ 1.646086] 1f03 64 mtdblock3
[ 1.646090] (driver?)
[ 1.652628] 1f04 64 mtdblock4
[ 1.652633] (driver?)
[ 1.659159] 1f05 64 mtdblock5
[ 1.659164] (driver?)
[ 1.665668] 1f06 1024 mtdblock6
[ 1.665672] (driver?)
[ 1.672199] 1f07 14848 mtdblock7
[ 1.672204] (driver?)
[ 1.678705] Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
[ 1.686960] Rebooting in 1 seconds..
I'm guessing this has to do with the default breed settings though. I'll have another go tomorrow.
I think this is because your flash IC does not have a right file system from Xiaomi, my build is based on a working xiaomi 4ag set, so suggest you try to back to xiaomi factroy fw first.
Then write my build into OS1.
This is the new build for 4AG
https://github.com/openwrt/openwrt/files/9986367/Xiaomi4AG-openwrt-snapshot-EN25QX128A-20221111.zip
.....And we're back! Here's what worked:
autoboot.command boot flash 0x00180000
Openwrt is now running on my Xiaomi 4AG!
Thanks @RadioOperator @mk24 and all for your excellent, patient help 
Dear @lukestu and @RadioOperator, Hi. I'm new to this forum and have no previous experience in flashing routers.
I bought a Chinese Mi router 4A Gigabit edition (build 2022.05) recently. I have been following this thread since. It seems that my router has a cFeon chip inside. As mentioned in @lukestu's initial post, his router also has a cFeon OX128A-104HIP. However, you continued the thread as if the chip was an Eon EN25QX128A. I am a little bit confused and would appreciate your help. My questions are:
Are the mentioned chips the same? If yes, is it possible to flash the latest fw provided by @RadioOperator on my router?
Many thanks in advance.
Hi @SaeedMalek,
I apologize for that misleading statement in my first post in which I identified my chip as OX128A-104HIP. I was struggling to read the tiny chip and thats what I thought was written on it.
Actually that 'O' is a 'Q', and the CFeon QX128A-104HIP is the very same EN25QX128A we talk about for the rest of the thread, so I would say with a high degree of certainty that your chip is the same as mine.
And for question number 2, I was able to use the latest image linked by @RadioOperator. The only difference being that I used the Breed bootloader with some environment variables set. It's very possible that the image will work with the default bootloader. RadioOperator will know better...