Hi,
I'm new to openwrt but found it when I found that my XGS1250 was able to boot in openWRT.
Btw, I've followed the OEM install explained here https://openwrt.org/toh/zyxel/xgs1250-12#serial but now I can't boot.
I've done :
-
Connect serial as per the layout.
-
Navigate to 'Management' in the OEM web interface and click on 'Firmware upgrade' to the left.
-
Upload the OpenWrt initramfs image, and wait till the switch reboots into OpenWrt.
-
Connect to the device through serial and change the U-boot boot command
After reboot, I can't go further because it repeats indefinitely rtl9300_do_rx_calibration_2_3: fgcal_gray: 0, fgcal_binary 0
Here is a log from putty :
U-Boot Version V1.0.0.4 (Dec 01 2022 - 15:46:54)
Board: RTL9300 CPU:800MHz LX:175MHz DDR:600MHz
DRAM: 128 MB
SPI-F: MXIC/C22018/MMIO16-1/ModeC 1x16 MB (plr_flash_info @ 83f74a30)
Loading 65536B env. variables from offset 0xe0000
Net: Net Initialization Skipped
No ethernet found.
0
Enable network
RTCORE Driver Module Initialize
IOAL init
Hardware-profile probe GPIO probe (unit 0): (found)
GPIO Init
(XGS1250_12)
Hardware-profile init
GPIO probe (unit 0): (found)
GPIO Init rtl9300_gpio_init had already been initialized!
SPI init (unit 0)
I2C probe (unit 0)
I2C init (unit 0)
NIC probe (unit 0)
Loader RTNIC Driver Module Initialize
IOAL init
RTK Driver Module Initialize
MAC probe (unit 0)
Chip 9302 (found)
MAC init (unit 0)
SMI protocol probe (unit 0)
PHY probe (unit 0)
Chip Construct (unit 0)
Chip Construct
Disable PHY Polling
PHY Reset
PHY reset is not supported!
MAC Construct
Turn Off Serdes
Serdes Construct
PHY Construct
Turn On Serdes
Enable PHY Polling
Misc
PHY init (unit 0)
Mgmt_dev init (unit 0)
Please wait for PHY init-time ...
## Booting kernel from Legacy Image at 81000000 ...
Image Name: MIPS OpenWrt Linux-5.15.137
Created: 2023-11-14 13:38:11 UTC
Image Type: MIPS Linux Kernel Image (gzip compressed)
Data Size: 6804075 Bytes = 6.5 MB
Load Address: 80100000
Entry Point: 80100000
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
Starting kernel ...
[ 0.000000] Linux version 5.15.137 (builder@buildhost) (mips-openwrt-linux-musl-gcc (OpenWrt GCC 12.3.0 r23630-842932a63d) 12.3.0, GNU ld (GNU Binutils) 2.40.0) #0 Tue Nov 14 13:38:11 2023
[ 0.000000] RTL838X model is 0
[ 0.000000] RTL839X model is 0
[ 0.000000] RTL93XX model is 93021001
[ 0.000000] SoC Type: RTL9302B
[ 0.000000] printk: bootconsole [early0] enabled
[ 0.000000] CPU0 revision is: 00019555 (MIPS 34Kc)
[ 0.000000] MIPS: machine is Zyxel XGS1250-12 Switch
[ 0.000000] earlycon: ns16550a0 at MMIO 0x18002000 (options '115200n8')
[ 0.000000] printk: bootconsole [ns16550a0] enabled
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] Using appended Device Tree.
[ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
[ 0.000000] pcpu-alloc: [0] 0
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32480
[ 0.000000] Kernel command line: earlycon
[ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
[ 0.000000] Writing ErrCtl register=0005e368
[ 0.000000] Readback ErrCtl register=0005e368
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Memory: 109300K/131072K available (6153K kernel code, 612K rwdata, 760K rodata, 12692K init, 219K bss, 21772K reserved, 0K cma-reserved)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[ 0.000000] NR_IRQS: 256
[ 0.000000] Failed to get CPU clock: -2
[ 0.000000] CPU frequency from device tree: 800MHz
[ 0.000000] clocksource: realtek_otto_timer: mask: 0xfffffff max_cycles: 0xfffffff, max_idle_ns: 38225208801 ns
[ 0.000001] sched_clock: 28 bits at 3125kHz, resolution 320ns, wraps every 42949672800ns
[ 0.008985] Calibrating delay loop... 531.66 BogoMIPS (lpj=2658304)
[ 0.065693] pid_max: default: 32768 minimum: 301
[ 0.071703] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[ 0.079728] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[ 0.096252] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[ 0.107038] futex hash table entries: 256 (order: -1, 3072 bytes, linear)
[ 0.114675] pinctrl core: initialized pinctrl subsystem
[ 0.121992] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[ 0.143051] clocksource: Switched to clocksource realtek_otto_timer
[ 0.151589] NET: Registered PF_INET protocol family
[ 0.157224] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear)
[ 0.166160] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
[ 0.175367] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.183854] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear)
[ 0.192217] TCP bind hash table entries: 1024 (order: 0, 4096 bytes, linear)
[ 0.199943] TCP: Hash tables configured (established 1024 bind 1024)
[ 0.207059] UDP hash table entries: 256 (order: 0, 4096 bytes, linear)
[ 0.214286] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes, linear)
[ 0.222344] NET: Registered PF_UNIX/PF_LOCAL protocol family
[ 0.303485] workingset: timestamp_bits=14 max_order=15 bucket_order=1
[ 0.318855] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 0.325298] jffs2: version 2.2 (NAND) (SUMMARY) (ZLIB) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[ 0.374785] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
[ 0.394811] pinctrl-single 1b00cc00.pinmux: 32 pins, size 4
[ 0.402479] Serial: 8250/16550 driver, 16 ports, IRQ sharing enabled
[ 0.413183] printk: console [ttyS0] disabled
[ 0.417930] 18002000.uart: ttyS0 at MMIO 0x18002000 (irq = 30, base_baud = 10937500) is a 16550A
[ 0.427589] printk: console [ttyS0] enabled
[ 0.427589] printk: console [ttyS0] enabled
[ 0.436922] printk: bootconsole [early0] disabled
[ 0.436922] printk: bootconsole [early0] disabled
[ 0.447412] printk: bootconsole [ns16550a0] disabled
[ 0.447412] printk: bootconsole [ns16550a0] disabled
[ 0.557999] brd: module loaded
[ 0.573927] spi-nor spi0.0: mx25l12805d (16384 Kbytes)
[ 0.579716] 7 fixed-partitions partitions found on MTD device spi0.0
[ 0.586935] OF: Bad cell count for /soc/spi@1200/flash@0/partitions
[ 0.594000] OF: Bad cell count for /soc/spi@1200/flash@0/partitions
[ 0.601239] Creating 7 MTD partitions on "spi0.0":
[ 0.606645] 0x000000000000-0x0000000e0000 : "u-boot"
[ 0.643452] 0x0000000e0000-0x0000000f0000 : "u-boot-env"
[ 0.682379] 0x0000000f0000-0x000000100000 : "u-boot-env2"
[ 0.689765] 0x000000100000-0x000000200000 : "jffs"
[ 0.698280] 0x000000200000-0x000000300000 : "jffs2"
[ 0.705034] 0x000000300000-0x000000fe0000 : "firmware"
[ 0.719476] 0x000000fe0000-0x000001000000 : "log"
[ 0.736043] Probing RTL838X eth device pdev: 82097400, dev: 82097410
[ 0.762610] Found SoC ID: 9302: RTL9302B, family 9300
[ 0.768367] Using MAC 0000000000010000
[ 0.772579] set sds port 0 to 2
[ 0.776155] set sds port 24 to 6
[ 0.779750] set sds port 25 to 7
[ 0.783372] set sds port 26 to 8
[ 0.786965] set sds port 27 to 9
[ 0.791418] c45_mask: 000e0000
[ 1.496090] REALTEK RTL9300 SERDES mdio-bus:1b: Detected internal RTL9300 Serdes
[ 1.504415] rtl9300_configure_serdes: Port 27, SerDes is 9
[ 1.514545] rtl9300_configure_serdes CMU BAND is 16
[ 1.519976] rtl9300_sds_rst 31
[ 1.543356] rtl9300_configure_serdes PATCHING SerDes 9
[ 1.550102] rtl9300_phy_enable_10g_1g 1gbit phy: 00001140
[ 1.556130] rtl9300_phy_enable_10g_1g 1gbit phy enabled: 00001140
[ 1.563926] rtl9300_phy_enable_10g_1g 10gbit phy: 00002040
[ 1.570032] rtl9300_phy_enable_10g_1g 10gbit phy after: 00002040
[ 1.577725] rtl9300_phy_enable_10g_1g set medium: 00000002
[ 1.583855] rtl9300_phy_enable_10g_1g set medium after: 00000002
[ 1.610521] rtl9300_configure_serdes: Configuring RTL9300 SERDES 9, mode 1a
[ 1.620291] rtl9300_serdes_mac_link_config: registers before 00000000 00001403
[ 1.630352] rtl9300_serdes_mac_link_config: registers after 00000000 00001403
[ 1.658283] rtl9300_force_sds_mode: SDS: 9, mode 0
[ 1.663650] rtl9300_force_sds_mode --------------------- serdes 9 forcing to 1f ...
[ 1.675196] rtl9300_force_sds_mode: SDS: 9, mode 27
[ 1.680624] rtl9300_force_sds_mode --------------------- serdes 9 forcing to 1a ...
[ 6.400025] rtl9300_force_sds_mode --------------------- serdes 9 forced to 1a DONE
[ 6.408572] start_1.1.1 initial value for sds 9
[ 6.441616] end_1.1.1 --
[ 6.444464] start_1.1.2 Load DFE init. value
[ 6.450207] end_1.1.2
[ 6.452720] start_1.1.3 disable LEQ training,enable DFE clock
[ 6.465132] end_1.1.3 --
[ 6.467949] start_1.1.4 offset cali setting
[ 6.473616] end_1.1.4
[ 6.476137] start_1.1.5 LEQ and DFE setting
[ 6.487792] end_1.1.5
[ 6.497319] start_1.2.1 ForegroundOffsetCal_Manual
[ 6.504668] end_1.2.1
[ 6.512654] start_1.2.3 Foreground Calibration
[ 6.526139] rtl9300_do_rx_calibration_2_3: fgcal_gray: 0, fgcal_binary 0
[ 6.549604] rtl9300_do_rx_calibration_2_3: fgcal_gray: 0, fgcal_binary 0
[ 6.573086] rtl9300_do_rx_calibration_2_3: fgcal_gray: 0, fgcal_binary 0
[ 6.596544] rtl9300_do_rx_calibration_2_3: fgcal_gray: 0, fgcal_binary 0
[ 6.620006] rtl9300_do_rx_calibration_2_3: fgcal_gray: 0, fgcal_binary 0
[ 6.643482] rtl9300_do_rx_calibration_2_3: fgcal_gray: 0, fgcal_binary 0
How could I flash another FW or go back to official one?
I've tried to boot to safe mode without success!