Want to install OpenWrt on Sophos SD-RED 20

khiro · April 28, 2021, 8:52pm

hello people

I have a Sophos SD-RED 20 in front of me, it did not connect to the Sophos UTM and you got a new one through support, the old one can be disposed of. I thought that I would like to breathe life back into the piece of hardware and it's too bad to shit this away, so I'm looking for solutions to use this still further and have come across OpenWRT among others.

Via Micro USB COM port I could already read a few things and need your help for further flashing, since I'm not too knowledgeable here.

I could already research that this was already possible with a Sophos Red 15w: LINK

Here's some info I gleaned:
=> version
U-Boot 2018.09 (Apr 23 2020 - 05:30:45 +0000), Build: jenkins-Red_Unified_Firmware_v3-86

aarch64-openwrt-linux-musl-gcc (OpenWrt GCC 7.4.0 1-1082-74a78d4e8-4aa01e8) 7.4.0
GNU ld (GNU Binutils) 2.31.1

=> printenv

arch=arm
baudrate=115200
board=sophos_red20
board_name=sophos_red20
board_rev=2
boot_image1=echo starting Image1...;run boot_load_nand_image1; run boot_ram; echo Booting Image1 Failed try Image2; run boot_image2
boot_image1_once=env set bootcmd "run boot_image2"; env save; run boot_image1
boot_image2=echo starting Image2...;run boot_load_nand_image2; run boot_ram; echo Booting Image2 Failed try Image1; run boot_image1
boot_image2_once=env set bootcmd "run boot_image1"; env save; run boot_image2
boot_load_from=undefined
boot_load_nand_image1=sf probe; sf nand_read ${kernel_addr_r} ${nand_uimage1_addr} ${nand_uimage1_size}; sf nand_read ${fdt_addr_r} ${nand_fdt1_addr} ${nand_fdt1_size}; env set boot_load_from image1
boot_load_nand_image2=sf probe; sf nand_read ${kernel_addr_r} ${nand_uimage2_addr} ${nand_uimage2_size}; sf nand_read ${fdt_addr_r} ${nand_fdt2_addr} ${nand_fdt2_size}; env set boot_load_from image2
boot_load_tftp=mcu led 3 1 1; tftp ${kernel_addr_r} red/red-unified-firmware-layerscape-armv8_64b-red20-initramfs-kernel.bin; tftp ${fdt_addr_r} red/image-sophos-red20.dtb; env set boot_load_from tftp; mcu led 3 0
boot_ram=echo Stop PFE...; pfe stop; echo starting openwrt ...; mcu led 1 1 1; env set bootargs ${bootargs_base} ${bootargs_additional} boot_load_from=${boot_load_from} mcu_resetpb_time=${mcu_resetpb_time}; bootm ${kernel_addr_r} - ${fdt_addr_r}; mcu led 0 1 1
boot_tftp=echo starting TFTP...;run boot_load_tftp; run boot_ram
boot_usb=echo Start USB; usb start; usb storage; usb dev 0; fatload usb 0:1 ${fdt_addr_r} boot_${board_name}.bin; source ${fdt_addr_r}
bootargs=console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500
bootargs_additional=redd
bootargs_base=console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500
bootargs_kdb=nokaslr kgdboc=ttyS0,115200 kgdbcon
bootargs_kdb_stop=${bootargs_kdb} kgdbwait
bootcmd=run boot_image2
bootdelay=3
bootfile=red/tftp_boot_red20.bin
console=ttyS0,115200
cpu=armv8
eth1addr=11:11:11:11:11:11
ethact=pfe_eth0
ethaddr=11:11:11:11:11:11
fdt_addr_r=0x80000000
fdtcontroladdr=11111111111
format_ubi=echo Formatting UBIFS; sf probe; sf nand_erase ${nand_data_addr} ${nand_data_size}; echo Done.
ipaddr=111.111.111.111
kernel_addr_r=0x81000000
mcu_resetpb_action1_time=65535
mcu_resetpb_action2_time=65535
mcu_resetpb_debounce_time=100
mcu_resetpb_debug=0
mcu_resetpb_factory_time=10
mcu_resetpb_time=0
mtdids=nand0=nand0
mtdparts=mtdparts=nand0:0x100000@0x0(self),0x100000@0x100000(free1),0x100000@0x200000(fdt1),0x2800000@0x300000(uimage1),0x400000@0x2b00000(free2),0x100000@0x2f00000(fdt2),0x2800000@0x3000000(uimage2),0x400000@0x5800000(free3),0x2000000@0x5c00000(ubi),0x400000@0x7c00000(free4),
nand_data_addr=0x5c00000
nand_data_size=0x2000000
nand_fdt1_addr=0x200000
nand_fdt1_size=0x100000
nand_fdt2_addr=0x2f00000
nand_fdt2_size=0x4353
nand_uimage1_addr=0x300000
nand_uimage1_size=0x2800000
nand_uimage2_addr=0x3000000
nand_uimage2_size=0xdc030f
resetpb_factory=echo Factroy reset; run format_ubi; run boot_usb
serialnumber=XYZ
serverip=192.168.0.11
soc=fsl-layerscape
stderr=serial
stdin=serial
stdout=serial
vendor=freescale
vlan_test=0

Environment size: 3159/65532 bytes

Currently I don't know which OpenWRT image could fit here, according to the CPU it seems to be "armv8".
According to this something of something could work here or?
https://downloads.openwrt.org/snapshots/targets/rockchip/armv8/
According to the instructions above I need a .bin file which I can't find there.

I hope among you are some cracks who could help me here

takimata · April 28, 2021, 10:33pm

Sorry, it doesn't work that way. With very, very few exceptions you can't just use an image for a similar device. Even if devices share the same CPU architecture, that is really just the lowest common denominator. The actual devices vary wildly internally and images for devices have to be highly customized to the respective device.

jring · April 29, 2021, 1:57pm

Hi,

see this article for somebody building openwrt for an eval board with the same SOC as your device. Other hardware Sophos might have put on there you will have identifiy yourself...

Maybe have fun while voiding your warranty and post some inside images...

Joachim

lankme · April 30, 2023, 1:30pm

Ok, I got Device tree. Step by step instruction:

Connect console (microusb, 115200)
Boot into failsafe mode (press f )
Got patrition list via dmesg, logread etc:

dev:    size   erasesize  name
mtd0: 00020000 00001000 "rcw"
mtd1: 00040000 00001000 "pfe"
mtd2: 00100000 00001000 "uboot"
mtd3: 00070000 00001000 "free1"
mtd4: 00010000 00001000 "uboot-env"
mtd5: 00010000 00001000 "reserved1"
mtd6: 00010000 00001000 "free2"
mtd7: 00100000 00020000 "self"
mtd8: 00100000 00020000 "free1"
mtd9: 00100000 00020000 "fdt1"
mtd10: 02800000 00020000 "uimage1"
mtd11: 00400000 00020000 "free2"
mtd12: 00100000 00020000 "fdt2"
mtd13: 02800000 00020000 "uimage2"
mtd14: 00400000 00020000 "free3"
mtd15: 02000000 00020000 "ubi"
mtd16: 00400000 00020000 "free4"

Create /etc/fw_env.config with

/dev/mtd4 0x0000 0x10000 0x1000

Set boot delay to 2 sec and reboot

fw_setenv bootdelay 2

boot into uboot and load fdt into memory and print it:

sf probe
sf nand_read 0x81000000 0x300000 0xdc9139
sf nand_read 0x80000000 0x200000 0x4353
ftd addr 0x80000000
fdt print

lankme · April 30, 2023, 1:32pm

Hier is Device tree:

/ {
  compatible = "sophos,red20", "fsl,ls1012a-frwy", "fsl,ls1012a";
  interrupt-parent = <0x00000001>;
  #address-cells = <0x00000002>;
  #size-cells = <0x00000002>;
  model = "Sophos RED20";
  aliases {
    crypto = "/soc/crypto@1700000";
    rtic_a = "/soc/crypto@1700000/rtic@60000/rtic-a@0";
    rtic_b = "/soc/crypto@1700000/rtic@60000/rtic-b@20";
    rtic_c = "/soc/crypto@1700000/rtic@60000/rtic-c@40";
    rtic_d = "/soc/crypto@1700000/rtic@60000/rtic-d@60";
    sec_mon = "/soc/sec_mon@1e90000";
    ethernet0 = "/pfe@04000000/ethernet@0";
    ethernet1 = "/pfe@04000000/ethernet@1";
  };
  cpus {
    #address-cells = <0x00000001>;
    #size-cells = <0x00000000>;
    cpu@0 {
      device_type = "cpu";
      compatible = "arm,cortex-a53";
      reg = <0x00000000>;
      clocks = <0x00000002 0x00000001 0x00000000>;
      #cooling-cells = <0x00000002>;
      cpu-idle-states = <0x00000003>;
      linux,phandle = <0x00000009>;
      phandle = <0x00000009>;
    };
  };
  idle-states {
    entry-method = "arm,psci";
    cpu-ph20 {
      compatible = "arm,idle-state";
      idle-state-name = "PH20";
      arm,psci-suspend-param = <0x00000000>;
      entry-latency-us = <0x000003e8>;
      exit-latency-us = <0x000003e8>;
      min-residency-us = <0x00000bb8>;
      linux,phandle = <0x00000003>;
      phandle = <0x00000003>;
    };
  };
  sysclk {
    compatible = "fixed-clock";
    #clock-cells = <0x00000000>;
    clock-frequency = <0x07735940>;
    clock-output-names = "sysclk";
    linux,phandle = <0x00000005>;
    phandle = <0x00000005>;
  };
  coreclk {
    compatible = "fixed-clock";
    #clock-cells = <0x00000000>;
    clock-frequency = <0x05f5e100>;
    clock-output-names = "coreclk";
    linux,phandle = <0x00000006>;
    phandle = <0x00000006>;
  };
  timer {
    compatible = "arm,armv8-timer";
    interrupts = <0x00000001 0x0000000d 0x00000008 0x00000001 0x0000000e 0x00000008 0x00000001 0x0000000b 0x00000008 0x00000001 0x0000000a 0x00000008>;
  };
  pmu {
    compatible = "arm,armv8-pmuv3";
    interrupts = <0x00000000 0x0000006a 0x00000004>;
  };
  interrupt-controller@1400000 {
    compatible = "arm,gic-400";
    #interrupt-cells = <0x00000003>;
    interrupt-controller;
    reg = <0x00000000 0x01401000 0x00000000 0x00001000 0x00000000 0x01402000 0x00000000 0x00002000 0x00000000 0x01404000 0x00000000 0x00002000 0x00000000 0x01406000 0x00000000 0x00002000>;
    interrupts = <0x00000001 0x00000009 0x00000008>;
    linux,phandle = <0x00000001>;
    phandle = <0x00000001>;
  };
  reboot {
    compatible = "syscon-reboot";
    regmap = <0x00000004>;
    offset = <0x000000b0>;
    mask = <0x00000002>;
  };
  soc {
    compatible = "simple-bus";
    #address-cells = <0x00000002>;
    #size-cells = <0x00000002>;
    ranges;
    esdhc@1560000 {
      compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
      reg = <0x00000000 0x01560000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x0000003e 0x00000004>;
      clocks = <0x00000002 0x00000004 0x00000000>;
      voltage-ranges = <0x00000708 0x00000708 0x00000ce4 0x00000ce4>;
      sdhci,auto-cmd12;
      big-endian;
      bus-width = <0x00000004>;
      status = "disabled";
    };
    scfg@1570000 {
      compatible = "fsl,ls1012a-scfg", "syscon";
      reg = <0x00000000 0x01570000 0x00000000 0x00010000>;
      big-endian;
      linux,phandle = <0x00000015>;
      phandle = <0x00000015>;
    };
    esdhc@1580000 {
      compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
      reg = <0x00000000 0x01580000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x00000041 0x00000004>;
      clocks = <0x00000002 0x00000004 0x00000000>;
      voltage-ranges = <0x00000708 0x00000708 0x00000ce4 0x00000ce4>;
      sdhci,auto-cmd12;
      big-endian;
      broken-cd;
      bus-width = <0x00000004>;
      status = "disabled";
    };
    crypto@1700000 {
      compatible = "fsl,sec-v5.4", "fsl,sec-v5.0", "fsl,sec-v4.0";
      fsl,sec-era = <0x00000008>;
      #address-cells = <0x00000001>;
      #size-cells = <0x00000001>;
      ranges = <0x00000000 0x00000000 0x01700000 0x00100000>;
      reg = <0x00000000 0x01700000 0x00000000 0x00100000>;
      interrupts = <0x00000000 0x0000004b 0x00000004>;
      jr@10000 {
        compatible = "fsl,sec-v5.4-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
        reg = <0x00010000 0x00010000>;
        interrupts = <0x00000000 0x00000047 0x00000004>;
      };
      jr@20000 {
        compatible = "fsl,sec-v5.4-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
        reg = <0x00020000 0x00010000>;
        interrupts = <0x00000000 0x00000048 0x00000004>;
      };
      jr@30000 {
        compatible = "fsl,sec-v5.4-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
        reg = <0x00030000 0x00010000>;
        interrupts = <0x00000000 0x00000049 0x00000004>;
      };
      jr@40000 {
        compatible = "fsl,sec-v5.4-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
        reg = <0x00040000 0x00010000>;
        interrupts = <0x00000000 0x0000004a 0x00000004>;
      };
      rtic@60000 {
        compatible = "fsl,sec-v5.4-rtic", "fsl,sec-v5.0-rtic", "fsl,sec-v4.0-rtic";
        #address-cells = <0x00000001>;
        #size-cells = <0x00000001>;
        reg = <0x00060000 0x00000100 0x00060e00 0x00000018>;
        ranges = <0x00000000 0x00060100 0x00000500>;
        rtic-a@0 {
          compatible = "fsl,sec-v5.4-rtic-memory", "fsl,sec-v5.0-rtic-memory", "fsl,sec-v4.0-rtic-memory";
          reg = <0x00000000 0x00000020 0x00000100 0x00000100>;
        };
        rtic-b@20 {
          compatible = "fsl,sec-v5.4-rtic-memory", "fsl,sec-v5.0-rtic-memory", "fsl,sec-v4.0-rtic-memory";
          reg = <0x00000020 0x00000020 0x00000200 0x00000100>;
        };
        rtic-c@40 {
          compatible = "fsl,sec-v5.4-rtic-memory", "fsl,sec-v5.0-rtic-memory", "fsl,sec-v4.0-rtic-memory";
          reg = <0x00000040 0x00000020 0x00000300 0x00000100>;
        };
        rtic-d@60 {
          compatible = "fsl,sec-v5.4-rtic-memory", "fsl,sec-v5.0-rtic-memory", "fsl,sec-v4.0-rtic-memory";
          reg = <0x00000060 0x00000020 0x00000400 0x00000100>;
        };
      };
    };
    sec_mon@1e90000 {
      compatible = "fsl,sec-v5.4-mon", "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon";
      reg = <0x00000000 0x01e90000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x0000004e 0x00000004 0x00000000 0x0000004f 0x00000004>;
    };
    dcfg@1ee0000 {
      compatible = "fsl,ls1012a-dcfg", "syscon";
      reg = <0x00000000 0x01ee0000 0x00000000 0x00001000>;
      big-endian;
      linux,phandle = <0x00000004>;
      phandle = <0x00000004>;
    };
    clocking@1ee1000 {
      compatible = "fsl,ls1012a-clockgen";
      reg = <0x00000000 0x01ee1000 0x00000000 0x00001000>;
      #clock-cells = <0x00000002>;
      clocks = <0x00000005 0x00000006>;
      clock-names = "sysclk", "coreclk";
      linux,phandle = <0x00000002>;
      phandle = <0x00000002>;
    };
    tmu@1f00000 {
      compatible = "fsl,qoriq-tmu";
      reg = <0x00000000 0x01f00000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x00000021 0x00000004>;
      fsl,tmu-range = <0x000b0000 0x0009002a 0x0006004c 0x00030062>;
      fsl,tmu-calibration = * 0x00000000800011a8 [0x00000108];
      big-endian;
      #thermal-sensor-cells = <0x00000001>;
      linux,phandle = <0x00000007>;
      phandle = <0x00000007>;
    };
    thermal-zones {
      thermal-zone0 {
        polling-delay-passive = <0x000003e8>;
        polling-delay = <0x00001388>;
        thermal-sensors = <0x00000007 0x00000000>;
        status = "okay";
        trips {
          alert0 {
            temperature = <0x000124f8>;
            hysteresis = <0x000007d0>;
            type = "passive";
            linux,phandle = <0x00000008>;
            phandle = <0x00000008>;
          };
          crit0 {
            temperature = <0x00014c08>;
            hysteresis = <0x000007d0>;
            type = "critical";
          };
        };
        cooling-maps {
          map0 {
            trip = <0x00000008>;
            cooling-device = <0x00000009 0xffffffff 0xffffffff>;
          };
        };
      };
      thermal-zone1 {
        polling-delay-passive = <0x000003e8>;
        polling-delay = <0x00001388>;
        thermal-sensors = <0x00000007 0x00000001>;
        status = "disabled";
        trips {
          alert1 {
            temperature = <0x000124f8>;
            hysteresis = <0x000007d0>;
            type = "passive";
            linux,phandle = <0x0000000a>;
            phandle = <0x0000000a>;
          };
          crit1 {
            temperature = <0x00014c08>;
            hysteresis = <0x000007d0>;
            type = "critical";
          };
        };
        cooling-maps {
          map0 {
            trip = <0x0000000a>;
            cooling-device = <0x00000009 0xffffffff 0xffffffff>;
          };
        };
      };
      thermal-zone2 {
        polling-delay-passive = <0x000003e8>;
        polling-delay = <0x00001388>;
        thermal-sensors = <0x00000007 0x00000002>;
        status = "disabled";
        trips {
          alert2 {
            temperature = <0x000124f8>;
            hysteresis = <0x000007d0>;
            type = "passive";
            linux,phandle = <0x0000000b>;
            phandle = <0x0000000b>;
          };
          crit2 {
            temperature = <0x00014c08>;
            hysteresis = <0x000007d0>;
            type = "critical";
          };
        };
        cooling-maps {
          map0 {
            trip = <0x0000000b>;
            cooling-device = <0x00000009 0xffffffff 0xffffffff>;
          };
        };
      };
      thermal-zone3 {
        polling-delay-passive = <0x000003e8>;
        polling-delay = <0x00001388>;
        thermal-sensors = <0x00000007 0x00000003>;
        status = "disabled";
        trips {
          alert3 {
            temperature = <0x000124f8>;
            hysteresis = <0x000007d0>;
            type = "passive";
            linux,phandle = <0x0000000c>;
            phandle = <0x0000000c>;
          };
          crit3 {
            temperature = <0x00014c08>;
            hysteresis = <0x000007d0>;
            type = "critical";
          };
        };
        cooling-maps {
          map0 {
            trip = <0x0000000c>;
            cooling-device = <0x00000009 0xffffffff 0xffffffff>;
          };
        };
      };
      thermal-zone4 {
        polling-delay-passive = <0x000003e8>;
        polling-delay = <0x00001388>;
        thermal-sensors = <0x00000007 0x00000004>;
        status = "disabled";
        trips {
          alert4 {
            temperature = <0x000124f8>;
            hysteresis = <0x000007d0>;
            type = "passive";
            linux,phandle = <0x0000000d>;
            phandle = <0x0000000d>;
          };
          crit4 {
            temperature = <0x00014c08>;
            hysteresis = <0x000007d0>;
            type = "critical";
          };
        };
        cooling-maps {
          map0 {
            trip = <0x0000000d>;
            cooling-device = <0x00000009 0xffffffff 0xffffffff>;
          };
        };
      };
      thermal-zone5 {
        polling-delay-passive = <0x000003e8>;
        polling-delay = <0x00001388>;
        thermal-sensors = <0x00000007 0x00000005>;
        status = "disabled";
        trips {
          alert5 {
            temperature = <0x000124f8>;
            hysteresis = <0x000007d0>;
            type = "passive";
            linux,phandle = <0x0000000e>;
            phandle = <0x0000000e>;
          };
          crit5 {
            temperature = <0x00014c08>;
            hysteresis = <0x000007d0>;
            type = "critical";
          };
        };
        cooling-maps {
          map0 {
            trip = <0x0000000e>;
            cooling-device = <0x00000009 0xffffffff 0xffffffff>;
          };
        };
      };
      thermal-zone6 {
        polling-delay-passive = <0x000003e8>;
        polling-delay = <0x00001388>;
        thermal-sensors = <0x00000007 0x00000006>;
        status = "disabled";
        trips {
          alert6 {
            temperature = <0x000124f8>;
            hysteresis = <0x000007d0>;
            type = "passive";
            linux,phandle = <0x0000000f>;
            phandle = <0x0000000f>;
          };
          crit6 {
            temperature = <0x00014c08>;
            hysteresis = <0x000007d0>;
            type = "critical";
          };
        };
        cooling-maps {
          map0 {
            trip = <0x0000000f>;
            cooling-device = <0x00000009 0xffffffff 0xffffffff>;
          };
        };
      };
      thermal-zone7 {
        polling-delay-passive = <0x000003e8>;
        polling-delay = <0x00001388>;
        thermal-sensors = <0x00000007 0x00000007>;
        status = "disabled";
        trips {
          alert7 {
            temperature = <0x000124f8>;
            hysteresis = <0x000007d0>;
            type = "passive";
            linux,phandle = <0x00000010>;
            phandle = <0x00000010>;
          };
          crit7 {
            temperature = <0x00014c08>;
            hysteresis = <0x000007d0>;
            type = "critical";
          };
        };
        cooling-maps {
          map0 {
            trip = <0x00000010>;
            cooling-device = <0x00000009 0xffffffff 0xffffffff>;
          };
        };
      };
    };
    ftm0@29d0000 {
      compatible = "fsl,ls1012a-ftm-alarm";
      reg = <0x00000000 0x029d0000 0x00000000 0x00010000 0x00000000 0x01ee2140 0x00000000 0x00000004>;
      reg-names = "ftm", "pmctrl";
      interrupts = <0x00000000 0x00000056 0x00000004>;
      big-endian;
    };
    i2c@2180000 {
      compatible = "fsl,vf610-i2c", "fsl,ls1012a-vf610-i2c";
      #address-cells = <0x00000001>;
      #size-cells = <0x00000000>;
      reg = <0x00000000 0x02180000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x00000038 0x00000004>;
      clocks = <0x00000002 0x00000004 0x00000003>;
      scl-gpios = <0x00000011 0x0000000d 0x00000000>;
      status = "okay";
      tca9555@22 {
        compatible = "nxp,pca9555";
        reg = <0x00000022>;
        gpio-controller;
        interrupt-controller;
        interrupt-parent = <0x00000011>;
        interrupts = <0x0000000f 0x00000002>;
        sfp_abs {
          input;
          gpios = <0x00000005 0x00000000>;
          line-name = "sfp-abs";
        };
      };
      mcu@40 {
        compatible = "nexcom,stm8s105k6";
        reg = <0x00000040>;
        linux,phandle = <0x00000018>;
        phandle = <0x00000018>;
      };
      clocking@69 {
        compatible = "clkgen,IDT6V49205BPAGI8";
        reg = <0x00000069>;
      };
    };
    i2c@2190000 {
      compatible = "fsl,vf610-i2c";
      #address-cells = <0x00000001>;
      #size-cells = <0x00000000>;
      reg = <0x00000000 0x02190000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x00000039 0x00000004>;
      clocks = <0x00000002 0x00000004 0x00000003>;
      status = "okay";
    };
    dspi@2100000 {
      compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi";
      #address-cells = <0x00000001>;
      #size-cells = <0x00000000>;
      reg = <0x00000000 0x02100000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x00000040 0x00000004>;
      clock-names = "dspi";
      clocks = <0x00000002 0x00000004 0x00000000>;
      spi-num-chipselects = <0x00000005>;
      big-endian;
      status = "disabled";
    };
    serial@21c0500 {
      compatible = "fsl,ns16550", "ns16550a";
      reg = <0x00000000 0x021c0500 0x00000000 0x00000100>;
      interrupts = <0x00000000 0x00000036 0x00000004>;
      clocks = <0x00000002 0x00000004 0x00000000>;
      status = "okay";
    };
    serial@21c0600 {
      compatible = "fsl,ns16550", "ns16550a";
      reg = <0x00000000 0x021c0600 0x00000000 0x00000100>;
      interrupts = <0x00000000 0x00000036 0x00000004>;
      clocks = <0x00000002 0x00000004 0x00000000>;
      status = "disabled";
    };
    gpio@2300000 {
      compatible = "fsl,qoriq-gpio";
      reg = <0x00000000 0x02300000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x00000042 0x00000004>;
      gpio-controller;
      #gpio-cells = <0x00000002>;
      interrupt-controller;
      #interrupt-cells = <0x00000002>;
      linux,phandle = <0x00000011>;
      phandle = <0x00000011>;
      sw_reset_pb {
        input;
        gpios = <0x00000010 0x00000001>;
        line-name = "sw-reset-pb";
      };
      board_id0 {
        input;
        gpios = <0x00000016 0x00000000>;
        line-name = "board-id0";
      };
      board_id0_ab {
        input;
        gpios = <0x00000015 0x00000000>;
        line-name = "board-id0-ab";
      };
      board_id1 {
        input;
        gpios = <0x00000011 0x00000000>;
        line-name = "board-id1";
      };
      jtag_detect {
        input;
        gpios = <0x00000016 0x00000000>;
        line-name = "jtag-detect";
      };
    };
    gpio@2310000 {
      compatible = "fsl,qoriq-gpio";
      reg = <0x00000000 0x02310000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x00000043 0x00000004>;
      gpio-controller;
      #gpio-cells = <0x00000002>;
      interrupt-controller;
      #interrupt-cells = <0x00000002>;
    };
    wdog@2ad0000 {
      compatible = "fsl,ls1012a-wdt", "fsl,imx21-wdt";
      reg = <0x00000000 0x02ad0000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x00000053 0x00000004>;
      clocks = <0x00000002 0x00000004 0x00000000>;
      big-endian;
    };
    quadspi@1550000 {
      compatible = "fsl,ls1012a-qspi", "fsl,ls1021a-qspi";
      #address-cells = <0x00000001>;
      #size-cells = <0x00000000>;
      reg = <0x00000000 0x01550000 0x00000000 0x00010000 0x00000000 0x40000000 0x00000000 0x10000000>;
      reg-names = "QuadSPI", "QuadSPI-memory";
      interrupts = <0x00000000 0x00000063 0x00000004>;
      clock-names = "qspi_en", "qspi";
      clocks = <0x00000002 0x00000004 0x00000000 0x00000002 0x00000004 0x00000000>;
      big-endian;
      status = "okay";
      num-cs = <0x00000001>;
      bus-num = <0x00000000>;
      w25q16dw@0 {
        compatible = "macronix,w25q16dw";
        #address-cells = <0x00000001>;
        #size-cells = <0x00000001>;
        m25p,fast-read;
        spi-max-frequency = <0x01312d00>;
        spi-rx-bus-width = <0x00000002>;
        spi-tx-bus-width = <0x00000001>;
        reg = <0x00000000>;
        partition@0 {
          read-only;
          lock;
          label = "rcw";
          reg = <0x00000000 0x00020000>;
        };
        partition@20000 {
          read-only;
          lock;
          label = "pfe";
          reg = <0x00020000 0x00040000>;
        };
        partition@60000 {
          read-only;
          lock;
          label = "uboot";
          reg = <0x00060000 0x00100000>;
        };
        partition@160000 {
          label = "free1";
          reg = <0x00160000 0x00070000>;
        };
        partition@1d0000 {
          label = "uboot-env";
          reg = <0x001d0000 0x00010000>;
        };
        partition@1e0000 {
          label = "reserved1";
          reg = <0x001e0000 0x00010000>;
        };
        partition@1f0000 {
          label = "free2";
          reg = <0x001f0000 0x00010000>;
        };
      };
      w25q16dw@1 {
        compatible = "macronix,w25q16dw";
        #address-cells = <0x00000001>;
        #size-cells = <0x00000001>;
        m25p,fast-read;
        spi-max-frequency = <0x01312d00>;
        reg = <0x00000000>;
        partition@0 {
          read-only;
          lock;
          label = "self";
          reg = <0x00000000 0x00100000>;
        };
        partition@100000 {
          label = "free1";
          reg = <0x00100000 0x00100000>;
        };
        partition@200000 {
          label = "fdt1";
          reg = <0x00200000 0x00100000>;
        };
        partition@300000 {
          label = "uimage1";
          reg = <0x00300000 0x02800000>;
        };
        partition@2b00000 {
          label = "free2";
          reg = <0x02b00000 0x00400000>;
        };
        partition@2f00000 {
          label = "fdt2";
          reg = <0x02f00000 0x00100000>;
        };
        partition@3000000 {
          label = "uimage2";
          reg = <0x03000000 0x02800000>;
        };
        partition@5800000 {
          label = "free3";
          reg = <0x05800000 0x00400000>;
        };
        partition@5c00000 {
          label = "ubi";
          reg = <0x05c00000 0x02000000>;
        };
        partition@7c00000 {
          label = "free4";
          reg = <0x07c00000 0x00400000>;
        };
      };
    };
    sai@2b50000 {
      #sound-dai-cells = <0x00000000>;
      compatible = "fsl,vf610-sai";
      reg = <0x00000000 0x02b50000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x00000094 0x00000004>;
      clocks = <0x00000002 0x00000004 0x00000003 0x00000002 0x00000004 0x00000003 0x00000002 0x00000004 0x00000003 0x00000002 0x00000004 0x00000003>;
      clock-names = "bus", "mclk1", "mclk2", "mclk3";
      dma-names = "tx", "rx";
      dmas = <0x00000012 0x00000001 0x0000002f 0x00000012 0x00000001 0x0000002e>;
      status = "disabled";
    };
    sai@2b60000 {
      #sound-dai-cells = <0x00000000>;
      compatible = "fsl,vf610-sai";
      reg = <0x00000000 0x02b60000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x00000095 0x00000004>;
      clocks = <0x00000002 0x00000004 0x00000003 0x00000002 0x00000004 0x00000003 0x00000002 0x00000004 0x00000003 0x00000002 0x00000004 0x00000003>;
      clock-names = "bus", "mclk1", "mclk2", "mclk3";
      dma-names = "tx", "rx";
      dmas = <0x00000012 0x00000001 0x0000002d 0x00000012 0x00000001 0x0000002c>;
      status = "okay";
    };
    edma@2c00000 {
      #dma-cells = <0x00000002>;
      compatible = "fsl,vf610-edma";
      reg = <0x00000000 0x02c00000 0x00000000 0x00010000 0x00000000 0x02c10000 0x00000000 0x00010000 0x00000000 0x02c20000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x00000067 0x00000004 0x00000000 0x00000067 0x00000004>;
      interrupt-names = "edma-tx", "edma-err";
      dma-channels = <0x00000020>;
      big-endian;
      clock-names = "dmamux0", "dmamux1";
      clocks = <0x00000002 0x00000004 0x00000003 0x00000002 0x00000004 0x00000003>;
      linux,phandle = <0x00000012>;
      phandle = <0x00000012>;
    };
    usb3@2f00000 {
      compatible = "snps,dwc3";
      reg = <0x00000000 0x02f00000 0x00000000 0x00010000>;
      interrupts = <0x00000000 0x0000003c 0x00000004>;
      dr_mode = "host";
      snps,quirk-frame-length-adjustment = <0x00000020>;
      snps,dis_rxdet_inp3_quirk;
      snps,incr-burst-type-adjustment = <0x00000001 0x00000004 0x00000008 0x00000010>;
      snps,host-vbus-glitches;
    };
    sata@3200000 {
      compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci";
      reg = <0x00000000 0x03200000 0x00000000 0x00010000 0x00000000 0x20140520 0x00000000 0x00000004>;
      reg-names = "ahci", "sata-ecc";
      interrupts = <0x00000000 0x00000045 0x00000004>;
      clocks = <0x00000002 0x00000004 0x00000000>;
      dma-coherent;
      status = "disabled";
    };
    usb2@8600000 {
      compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
      reg = <0x00000000 0x08600000 0x00000000 0x00001000>;
      interrupts = <0x00000000 0x0000008b 0x00000004>;
      dr_mode = "host";
      phy_type = "ulpi";
      status = "disabled";
    };
    msi-controller1@1572000 {
      compatible = "fsl,ls1012a-msi";
      reg = <0x00000000 0x01572000 0x00000000 0x00000008>;
      msi-controller;
      interrupts = <0x00000000 0x0000007e 0x00000004>;
      linux,phandle = <0x00000013>;
      phandle = <0x00000013>;
    };
    pcie@3400000 {
      compatible = "fsl,ls1012a-pcie", "snps,dw-pcie";
      reg = <0x00000000 0x03400000 0x00000000 0x00100000 0x00000040 0x00000000 0x00000000 0x00002000>;
      reg-names = "regs", "config";
      interrupts = <0x00000000 0x00000076 0x00000004 0x00000000 0x00000075 0x00000004>;
      interrupt-names = "aer", "pme";
      #address-cells = <0x00000003>;
      #size-cells = <0x00000002>;
      device_type = "pci";
      num-lanes = <0x00000004>;
      bus-range = <0x00000000 0x000000ff>;
      ranges = <0x81000000 0x00000000 0x00000000 0x00000040 0x00010000 0x00000000 0x00010000 0x82000000 0x00000000 0x40000000 0x00000040 0x40000000 0x00000000 0x40000000>;
      msi-parent = <0x00000013>;
      #interrupt-cells = <0x00000001>;
      interrupt-map-mask = <0x00000000 0x00000000 0x00000000 0x00000007>;
      interrupt-map = * 0x0000000080003720 [0x00000080];
      status = "okay";
    };
    rcpm@1ee2000 {
      compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1";
      reg = <0x00000000 0x01ee2000 0x00000000 0x00001000>;
      fsl,#rcpm-wakeup-cells = <0x00000001>;
      linux,phandle = <0x00000016>;
      phandle = <0x00000016>;
    };
  };
  reserved-memory {
    #address-cells = <0x00000002>;
    #size-cells = <0x00000002>;
    ranges;
    packetbuffer@83400000 {
      reg = <0x00000000 0x83400000 0x00000000 0x00c00000>;
      linux,phandle = <0x00000014>;
      phandle = <0x00000014>;
    };
  };
  pfe@04000000 {
    compatible = "fsl,pfe";
    reg = <0x00000000 0x04000000 0x00000000 0x00c00000 0x00000000 0x83400000 0x00000000 0x00c00000>;
    reg-names = "pfe", "pfe-ddr";
    fsl,pfe-num-interfaces = <0x00000002>;
    interrupts = <0x00000000 0x000000ac 0x00000004 0x00000000 0x000000ad 0x00000004 0x00000000 0x000000ae 0x00000004>;
    interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
    memory-region = <0x00000014>;
    fsl,pfe-scfg = <0x00000015 0x00000000>;
    fsl,rcpm-wakeup = <0x00000016 0xf0000020>;
    clocks = <0x00000002 0x00000004 0x00000000>;
    clock-names = "pfe";
    status = "okay";
    #address-cells = <0x00000001>;
    #size-cells = <0x00000000>;
    ethernet@0 {
      compatible = "fsl,pfe-gemac-port";
      #address-cells = <0x00000001>;
      #size-cells = <0x00000000>;
      reg = <0x00000000>;
      fsl,mdio-mux-val = <0x00000000>;
      phy-mode = "sgmii";
      fsl,pfe-phy-if-flags = <0x00000001>;
      fsl,gemac-phy-id = <0x0000001d>;
    };
    ethernet@1 {
      compatible = "fsl,pfe-gemac-port";
      #address-cells = <0x00000001>;
      #size-cells = <0x00000000>;
      reg = <0x00000001>;
      fsl,mdio-mux-val = <0x00000000>;
      phy-mode = "rgmii-txid";
      phy-handle = <0x00000017>;
    };
    mdio@0 {
      #address-cells = <0x00000001>;
      #size-cells = <0x00000000>;
      ethernet-phy@3 {
        reg = <0x00000003>;
        linux,phandle = <0x00000017>;
        phandle = <0x00000017>;
      };
      switch-smi@1d {
        compatible = "nexcom,rtl8367s";
        reg = <0x0000001d>;
        port-mapping = <0x00000000 0x00000002 0x00000001 0x00000003>;
        interrupt-parent = <0x00000011>;
        interrupts = <0x00000013 0x00000002>;
        led-phandle = <0x00000018>;
      };
    };
  };
  firmware {
    optee {
      compatible = "linaro,optee-tz";
      method = "smc";
    };
  };
  clock-mclk {
    compatible = "fixed-clock";
    #clock-cells = <0x00000000>;
    clock-frequency = <0x017d7840>;
  };
  regulator-1p8v {
    compatible = "regulator-fixed";
    regulator-name = "1P8V";
    regulator-min-microvolt = <0x001b7740>;
    regulator-max-microvolt = <0x001b7740>;
    regulator-always-on;
  };
};

FlashKiller · May 14, 2023, 4:11pm

hi. did you manage to build the firmware for red20 ?

lankme · June 25, 2023, 11:46am

Well.. Sophos red 20 is already in openwrt repository as layerscape(armv8_64b) ls1012a-frwy reference board, but without USB and second flash support. Last month I try to add USB support, but without success.
I hope, It should be pretty easy to add USB to kernel and second flash to device tree, but something are going wrong.

FlashKiller · June 25, 2023, 12:17pm

Я попробовал собрать прошивку как 1012a-rdb и применить собственный патч, который сделал на основе дерева устройств от red20
У меня получилось запустить wifi, usb и wan порт определяет подключение кабеля. Так же я вижу все разделы на nor flash. Вторую флэшку запустить пока не смог
Я работаю над падчем для rtl8367s но пока без результата.
У меня есть родная прошивка для red20 в распакованном виде. Там есть все драйвера. Возможно ли их использовать?

frollic · June 25, 2023, 12:59pm

Try English instead, or at least both ?

FlashKiller · June 26, 2023, 6:09am

I tried to build the firmware as 1012a-rdb and apply my own patch, which I made based on the device tree from red20
I managed to start wifi, usb and wan port determines the cable connection. I also see all sections on nor flash. I haven't been able to start the second flash drive yet.
I'm working on a patch for rtl8367s but no results so far.
I have unpacked native firmware for red20. All drivers are there. Is it possible to use them?

jdwl1o1 · June 26, 2023, 10:01am

Not unless you have the source code

FlashKiller · June 27, 2023, 12:20pm

I managed to run all the devices in red20, except nand flash. how to run stackflash?
I publish my patches as soon as I check that everything works

FlashKiller · July 4, 2023, 12:45pm

Hello
I downloaded an openwrt initram-image from usb flash. tell me how to fully install openwrt on usb flash?
I set setenv:

setenv bootargs_owrt "echo Start USB; usb start; usb storage; usb dev 0; fatload usb 0:1 0x90000000 openwrt-layerscape-armv8_64b-fsl_ls1012a-frwy-sdboot-initramfs-kernel.bin; pfe stop; bootm 0x90000000"
setenv bootcmd run bootargs_owrt
saveenv

FlashKiller · July 13, 2023, 12:31pm

The only way I've found is to use booting the initramfs image from a USB flash. I made a custom image by copying the etc folder to /openwrt/files/.
patches for building the image must be placed in the folder
/openwrt/target/linux/layerscape/patches-5.10
https://disk.yandex.ru/d/6P0HVpVnc5HqPg
the image must include firmawre for ath10 qca988х

in uboot, configure the settings that I wrote earlier.
copy the firmware file to usb flash.
I will be very grateful if you help me make nand work and make a fully working firmware.
but even in this form, red20 has been working without failures for a week