Upgrade TP-link_TL-WDR4300 from 8M to 16M flash

[gergepalfi]

I am currently trying the suggestion from this post:

[ath79] DTB update mechanism

Generating a "official" kernel image with modded dtb is key. I met the same problem as reported in this thread on my wdr4900v2 modded with a 16MiB rom, and I managed to achieve above goal by making use of both image builder and the source tree: Modify the dts file for the target. (It had better be made a local commit in its own branch, as it can be cherry-picked upon future revisions) Build a minimalist custom build for the target (which is unlikely to fail, as it is minimalist), to build all…

I have successfully compiled a modified image from source (not tested yet).

I modified 2 files:

• openwrt/target/linux/ath79/dts/ar9344_tplink_tl-wdrxxxx.dtsi (modify the partitions)
• openwrt/target/linux/ath79/image/generic-tp-link.mk (change $(Device/tplink-8mlzma) to $(Device/tplink-16mlzma) under define Device/tplink_tl-wdr4300-v1)

I checked the dtb:

openwrt/build_dir/target-mips_24kc_musl/linux-ath79_generic$ dtc -I dtb -O dts image-ar9344_tplink_tl-wdr4300-v1.dtb

output has the desired outcome:

                                partitions {
                                        compatible = "fixed-partitions";
                                        #address-cells = <0x01>;
                                        #size-cells = <0x01>;

                                        partition@0 {
                                                label = "u-boot";
                                                reg = <0x00 0x20000>;
                                                read-only;
                                                compatible = "nvmem-cells";
                                                #address-cells = <0x01>;
                                                #size-cells = <0x01>;

                                                macaddr@1fc00 {
                                                        reg = <0x1fc00 0x06>;
                                                        phandle = <0x07>;
                                                };
                                        };

                                        partition@20000 {
                                                compatible = "tplink,firmware";
                                                label = "firmware";
                                                reg = <0x20000 0xfd0000>;
                                        };

                                        partition@ff0000 {
                                                label = "art";
                                                reg = <0xff0000 0x10000>;
                                                read-only;
                                                compatible = "nvmem-cells";
                                                #address-cells = <0x01>;
                                                #size-cells = <0x01>;

                                                cal@1000 {
                                                        reg = <0x1000 0x440>;
                                                        phandle = <0x0c>;
                                                };

                                                cal@5000 {
                                                        reg = <0x5000 0x440>;
                                                        phandle = <0x0f>;
                                                };
                                        };
                                };

so my partition changes are included by the build process. Now I just need to test it on the hardware.