TP-Link Archer MR600 v1

For Developers
1 
// SPDX-License-Identifier: GPL-2.0-or-later

#include "mt7621.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {
	compatible = "tplink,mr600-v1-eu", "mediatek,mt7621-soc";
	model = "TP-Link MR600 v1 (EU)";

	aliases {
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;
		label-mac-device = &gmac0;
	};

	chosen {
		bootargs = "console=ttyS0,115200";
	};

	keys {
		compatible = "gpio-keys";

		wlan {
			label = "wlan";
			gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WLAN>;
		};

		reset {
			label = "reset";
			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_power: power {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_WHITE>;
			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
		};
		wlan {
			function = LED_FUNCTION_WLAN;
			color = <LED_COLOR_ID_WHITE>;
			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy1tpt";
		};
		wan {
			function = LED_FUNCTION_WAN;
			color = <LED_COLOR_ID_WHITE>;
			gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
		};

		signal1 {
			label = "white:signal1";
			gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
		};

		signal2 {
			label = "white:signal2";
			gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
		};

		signal3 {
			label = "white:signal3";
			gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
		};

		4g {
			label = "white:4g";
			gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
		};
		lan {
			function = LED_FUNCTION_LAN;
			color = <LED_COLOR_ID_WHITE>;
			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
		};
	};

};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <50000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "uboot";
				reg = <0x00000 0x20000>;
				read-only;
			};

			partition@20000 {
				compatible = "openwrt,uimage";
				openwrt,offset = <512>; /* account for the 512-byte long header */
				label = "firmware";
				reg = <0x20000 0xfa0000>;
			};

			partition@fc0000 {
				label = "romfile";
				reg = <0xfc0000 0x10000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					macaddr_romfile_f100: romfile@f100 {
						compatible = "mac-base";
						reg = <0xf100 0x6>;
						#nvmem-cell-cells = <1>;
					};
				};
			};

			partition@fd0000 {
				label = "config";
				reg = <0xfd0000 0x10000>;
				read-only;
			};

			partition@fe0000 {
				label = "radio";
				reg = <0xfe0000 0x10000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					eeprom_radio_0: eeprom@0 {
						reg = <0x0 0x400>;
					};

					eeprom_radio_8000: eeprom@8000 {
						reg = <0x8000 0x4da8>;
					};
				};
			};
		};
	};
};

&pcie {
	status = "okay";
};


&pcie0 {
	mt76@0,0 {
		compatible = "mediatek,mt76";
		reg = <0x0000 0 0 0 0>;
		nvmem-cells = <&eeprom_radio_0>, <&macaddr_romfile_f100 0>;
		nvmem-cell-names = "eeprom", "mac-address";
		ieee80211-freq-limit = <2400000 2500000>;
	};
};

&pcie1 {
	mt76@0,0 {
		compatible = "mediatek,mt76";
		reg = <0x0000 0 0 0 0>;
		ieee80211-freq-limit = <5000000 6000000>;
		nvmem-cells = <&eeprom_radio_8000>, <&macaddr_romfile_f100 (-1)>;
		nvmem-cell-names = "eeprom", "mac-address";
	};
};

&gmac0 {
	nvmem-cells = <&macaddr_romfile_f100 0>;
	nvmem-cell-names = "mac-address";
};

&gmac1 {
	status = "okay";
	label = "wan";
	phy-handle = <&ethphy4>;

	nvmem-cells = <&macaddr_romfile_f100 0>;
	nvmem-cell-names = "mac-address";
};

&ethphy4 {
	/delete-property/ interrupts;
};

&switch0 {
	ports {
		port@1 {
			status = "okay";
			label = "lan1";
		};
		port@2 {
			status = "okay";
			label = "lan2";
		};
		port@3 {
			status = "okay";
			label = "lan3";
		};
	};
};
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