Support for RTL838x based managed switches

For Developers
1593

Hey Guys,

You have no idea how exstatic I am to have found someone porting OpenWRT on a switch. A long time dream of mine and had been looking for potentially even doing it myself, had I gotten some useful hardware. Currently I have, besides a box of tons of cheap ethernet/gigabit switches, actually in use; a HP 1810-24G (Which I believe is broadcom based), an PS1810-8G same deal, regardless, equally useless I think and a DGS-1100-8P (POE), which has an old interesting SoC, and even while swapping out the Flash, doesn't have the RAM anyway. The 24G and POE switch sit in the attic, with a current combined load of about 12 ports, though for the short term, I will retire the 24G and only use the DGS only for the time being. I have a few (ancient) servers and things also up there. In the office, I have the PS1810-8G, which I'll replace first.

To join the fun, I've been looking a lot at potentially supportable switches. Doing the leg-work myself, is a non-issue, but obviously I'd want something that is achievable (e.g. not some non-realtek chip in this case). I can get a XGS-1010-12 for about €150,- shipped, so after my holliday, I will get that one to start hacking. I've learned from this thread it is identical to the XGS-1210-12, so that's cool. The XGS-1250-12 looks better on paper, but costs more then double, so, meh. Why the 1010-12? It has more ports then I need (6 - 8 only really) but I only need 1 fast uplink, and the 2 max 2.5 downlinks are fine. Can still connect 10gbit to the SFP at some point; besides, I only own 1gbit equipment and a few SFP PCIe cards anyway :slight_smile:

So first question; is the XGS-1010-12 a worthy contender? I know it uses the 93xx series, which is more modern (yay) but also slightly less supported. Though I think if you want to go beyond 1g it is needed; so fine. So first, what are the open tasks? I think it hasn't been mainlined yet, so that's easy enough after testing it works. I read on the wiki that GPIO's haven't been worked out. I can spend some time on that easily, take some high-res pictures etc. I've also ordered the cheapest SFP module I could fine off of ebay, so I can take it appart and use it as a GPIO prober. But what else?

More importantly however, I also want to replace my POE switch in the (longer) term. What I'd want is 2+ 10gbit ports, a handful of 2.5gbit ports; the rest being 1gbit is fine; A few POE++ ports, a couple of POE+ ports; but doesn't have to cover every single port. 16 ports as a minimum total; 24 ports is fine. Ideally fanless, or somewhat quiet fans :slight_smile: Last but not least, a directly connected POE controller, such as the TP-Link has, so I can work on that. The Ubiquity UniFi Pro Gen2 looks alright (but all gbit though 2SFP for the bandwith needs). However a) it costs €750,- here, and b) UI has been a bit nasty in violating the GPL, where we expected better ... The TL-SX3206HPP looks great, but 'coming soon' and not enough ports by far; but might be using an I2C based POE controller ... can't wait to see some pics of that. The /t1600g-28ps looks really cool too; but again, lacks high-speed ports; and at the price, for an 'inbetween' solution ... it's a bit too much; and I even was tempted with the TL-SG108PE and figuring if I could make the low port count work; but also, in between and while I really want to join the fun, it's still expensive.

In short; after this long post; any tips to look at switches that could be reasonably priced that hits the POE++ spots? Probably have to wait a bit ... especially being a cheapsake with a budget of around €500,0 to max €750,-. My 1810-24G has lasted me 12 years and it's still running fine; the reason that triggered me to go buy stuff, is openwrt :slight_smile:

So in time (the very very little I have) what can I do; where can I help and what do you recommend?

Thanks,

1594

I have a probably stupid question: You are talking about fixed-link and manged. But what you should be using is the EXTERNAL_SFP_PHY() macro like for the rtl8382_d-link_dgs-1210-28.dts and enrich this with I2C and GPIO. Have you tried that? When there is an external PHY, the SoC identifies a link by polling that PHY and once it has identified a state change, it issues a Switch Interrupt which calls DSA to bring up the Interface. For fixed-link the link is always up and for managed this fails because it looks at the link to the MAC (managed is used for the internal SerDes connected to SFP ports on the RTL93xx where this link needs to be configurable), not the PHY.

1595

I'm sorry, I should have been clearer about the actual device tree I'm using. The base of it has been in my branch on Github the entire time, but I really should have linked to it when I first posted about the SFP issues.

These are the variants I tried most recently (with results as described in my last post):

Variant A 
&ethernet0 {
	mdio: mdio-bus {
		…

		EXTERNAL_SFP_PHY(24)
		EXTERNAL_SFP_PHY(25)
		EXTERNAL_SFP_PHY(26)
		EXTERNAL_SFP_PHY(27)
	};
};

&switch0 {
	ports {
		…

		port@24 {
			reg = <24>;
			label = "lan17";
			phy-mode = "qsgmii";
			phy-handle = <&phy24>;
			managed = "in-band-status";
			sfp = <&sfp0>;
		};

		port@25 {
			reg = <25>;
			label = "lan18";
			phy-mode = "qsgmii";
			phy-handle = <&phy25>;
			managed = "in-band-status";
			sfp = <&sfp1>;
		};

		port@26 {
			reg = <26>;
			label = "lan19";
			phy-mode = "qsgmii";
			phy-handle = <&phy26>;
			managed = "in-band-status";
			sfp = <&sfp2>;
		};

		port@27 {
			reg = <27>;
			label = "lan20";
			phy-mode = "qsgmii";
			phy-handle = <&phy27>;
			managed = "in-band-status";
			sfp = <&sfp3>;
		};

		…
	};
};
Variant B 
&ethernet0 {
	mdio: mdio-bus {
		…

		EXTERNAL_SFP_PHY(24)
		EXTERNAL_SFP_PHY(25)
		EXTERNAL_SFP_PHY(26)
		EXTERNAL_SFP_PHY(27)
	};
};

&switch0 {
	ports {
		…

		port@24 {
			reg = <24>;
			label = "lan17";
			phy-mode = "qsgmii";
			phy-handle = <&phy24>;
			sfp = <&sfp0>;

			fixed-link {
				speed = <1000>;
				full-duplex;
			};
		};

		port@25 {
			reg = <25>;
			label = "lan18";
			phy-mode = "qsgmii";
			phy-handle = <&phy25>;
			sfp = <&sfp1>;

			fixed-link {
				speed = <1000>;
				full-duplex;
			};
		};

		port@26 {
			reg = <26>;
			label = "lan19";
			phy-mode = "qsgmii";
			phy-handle = <&phy26>;
			sfp = <&sfp2>;

			fixed-link {
				speed = <1000>;
				full-duplex;
			};
		};

		port@27 {
			reg = <27>;
			label = "lan20";
			phy-mode = "qsgmii";
			phy-handle = <&phy27>;
			sfp = <&sfp3>;

			fixed-link {
				speed = <1000>;
				full-duplex;
			};
		};

		…
	};
};
I2C/GPIO 
/ {
	gpio1: rtl8231-gpio {
		compatible = "realtek,rtl8231-gpio";
		#gpio-cells = <2>;
		gpio-controller;
		indirect-access-bus-id = <0>;
	};

	i2c0: i2c-gpio-0 {
		compatible = "i2c-gpio";
		sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		i2c-gpio,delay-us = <2>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	sfp0: sfp-0 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c0>;
		los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>;
		// tx-fault unconnected
		// tx-disable connected to RTL8214FC
	};

	i2c1: i2c-gpio-1 {
		compatible = "i2c-gpio";
		sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		i2c-gpio,delay-us = <2>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	sfp1: sfp-1 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c1>;
		los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
		// tx-fault unconnected
		// tx-disable connected to RTL8214FC
	};

	i2c2: i2c-gpio-2 {
		compatible = "i2c-gpio";
		sda-gpios = <&gpio1 27 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		scl-gpios = <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		i2c-gpio,delay-us = <2>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	sfp2: sfp-2 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c2>;
		los-gpio = <&gpio1 30 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
		// tx-fault unconnected
		// tx-disable connected to RTL8214FC
	};

	i2c3: i2c-gpio-3 {
		compatible = "i2c-gpio";
		sda-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		scl-gpios = <&gpio1 32 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		i2c-gpio,delay-us = <2>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	sfp3: sfp-3 {
		compatible = "sff,sfp";
		i2c-bus = <&i2c3>;
		los-gpio = <&gpio1 34 GPIO_ACTIVE_HIGH>;
		mod-def0-gpio = <&gpio1 33 GPIO_ACTIVE_LOW>;
		// tx-fault unconnected
		// tx-disable connected to RTL8214FC
	};
};

Aside from that, I noticed that the TX output power reported by the SFP module stays zero when the media type is set to tp. Maybe the TX disable outputs of the RTL8214FC are linked to the configured media type? I'm mentioning this because you wrote earlier that it is unclear how the TX disable outputs are controlled.

1596

Variant a is in so far wrong as this is not "in-band-managed" and b should not be a fixed link. The PHY is a true external PHY which needs to be managed via MDIO. There is simply no code that would allow to do in-band-management in combination with that PHY (the kernel has some default code for 802.3z modes where it knows how to read the in-band status from e.g. the 1000BX link https://elixir.bootlin.com/linux/v5.18.1/source/drivers/net/phy/phylink.c#L1515 but we are using qsgmii).

If you can receive packets at the switch fabric, this means the link MAC <-> PHY is fully up, it is impossible for the qsgmii link to be only up in one direction. Since you can receive packets from the outside of the switch, at least the RX link of the SFP module and PHY work. Could you double check, that the TX link is physically up, i.e. there is laser-light coming out of the transmitter? If this is OK, you need to debug where phylink fails to bring up the link. For this I usually put debug statements into the state machine of phylink and compare with a working device, where states are not correctly attained, because e.g. the rtl83xx driver does not provide the right input to the state, but more often it is just some things in the .dts that do not match up.

1597

What's the newest version of u-boot that has been found/could be used on these RTL838x switches? Is anyone using a mainline u-boot?

1598

Hello guys,

I'm joining the fun with RTL83[89]x switches. I fixed some issues with the DGS-1210-28 F3 port and even got a working factory image (D-Link DGS-1210 rev F working factory images (no serial needed)). I just need to replicate imghdr tool from D-Link before submitting it upstream.

Now I'm trying to port DGS-1210-52. It uses a RTL8393 SoC with 6 RTL8218D and one RTL8214FC. However, the ports 49-52 shared with the SFP ports are not working as expected. If I load an image (tftpboot) using one of those ports, they simply work. However, if I boot using another port, They do not work. zyxel_gs1900-48 shares the same SoC but has only two dedicated SFP ports. DGS-1210-28 boot msg does say it uses the same RTL8214FC but the same config does not work. I'm guessing I need to do something with the SFP port that is not required for DGS-1210-28. Does anyone have a clue?

3 Likes
1599

You don't say whether the SFP fiber or twisted pair port does not work. When you boot with u-boot it might set one or the other. You always need to switch between the two explicitly, e.g. via
ethtool -s lan17 port fibre

1600

Hi all, So I have an industrial switch from China, a Gxcom device that has 8 GE with POE+ and 2 SFP. It's a lovely compact design and has a console port that allows easy access to the serial console. The partition layout is similar to the Zyxel gs1900-10hp but has a U-Boot part that's 512KB. It boots with the initramfs Zyxel image but with errors in the bootlog and takes a very long time before ports become active. I think the SFP ports aren't working but have never actually used them!

Here's the bootlog from OpenWrt:

<CMD># # bootm
## Booting kernel from Legacy Image at 84f00000 ...
   Image Name:   MIPS OpenWrt Linux-5.10.120
   Created:      2022-06-22  16:37:40 UTC
   Image Type:   MIPS Linux Kernel Image (gzip compressed)
   Data Size:    6529735 Bytes = 6.2 MB
   Load Address: 80000000
   Entry Point:  80000400
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK

Starting kernel ...

[    0.000000] Linux version 5.10.120 (builder@buildhost) (mips-openwrt-linux-musl-gcc (OpenWrt GCC 11.3.0 r19878-d6eebaf995) 11.3.0, GNU ld (GNU Binutils) 2.37) #0 Wed Jun 22 16:37:40 2022
[    0.000000] RTL838X model is 83826800
[    0.000000] SoC Type: RTL8382
[    0.000000] Kernel command line:
[    0.000000] printk: bootconsole [early0] enabled
[    0.000000] CPU0 revision is: 00019070 (MIPS 4KEc)
[    0.000000] MIPS: machine is ZyXEL GS1900-10HP Switch
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] Using appended Device Tree.
[    0.000000] Primary instruction cache 16kB, VIPT, 4-way, linesize 16 bytes.
[    0.000000] Primary data cache 16kB, 2-way, VIPT, cache aliases, linesize 16 bytes
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] On node 0 totalpages: 32768
[    0.000000]   Normal zone: 288 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 32768 pages, LIFO batch:7
[    0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
[    0.000000] pcpu-alloc: [0] 0
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 32480
[    0.000000] Kernel command line: console=ttyS0,115200
[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear)
[    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 113600K/131072K available (5874K kernel code, 624K rwdata, 1264K rodata, 8164K init, 212K bss, 17472K reserved, 0K cma-reserved)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] NR_IRQS: 256
[    0.000000] CPU frequency from device tree: 500MHz
[    0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041786 ns
[    0.000018] sched_clock: 32 bits at 250MHz, resolution 4ns, wraps every 8589934590ns
[    0.008812] Calibrating delay loop... 498.89 BogoMIPS (lpj=2494464)
[    0.075666] pid_max: default: 32768 minimum: 301
[    0.081154] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.089200] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.104113] dyndbg: Ignore empty _ddebug table in a CONFIG_DYNAMIC_DEBUG_CORE build
[    0.119251] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.130177] futex hash table entries: 256 (order: -1, 3072 bytes, linear)
[    0.137841] pinctrl core: initialized pinctrl subsystem
[    0.149353] NET: Registered protocol family 16
[    0.330398] clocksource: Switched to clocksource MIPS
[    0.338901] NET: Registered protocol family 2
[    0.344372] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear)
[    0.354174] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
[    0.363609] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.372177] TCP bind hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.379940] TCP: Hash tables configured (established 1024 bind 1024)
[    0.387586] UDP hash table entries: 256 (order: 0, 4096 bytes, linear)
[    0.394953] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes, linear)
[    0.403395] NET: Registered protocol family 1
[    0.823904] workingset: timestamp_bits=14 max_order=15 bucket_order=1
[    0.839596] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.846103] jffs2: version 2.2 (NAND) (SUMMARY) (ZLIB) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    0.861177] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 252)
[    0.872803] pinctrl-single 1b001000.pinmux: 32 pins, size 4
[    0.879584] pinctrl-single 1b00a000.pinmux: 32 pins, size 4
[    0.887883] Probing RTL8231 GPIOs
[    0.891669] rtl8231_init called, MDIO bus ID: 0
[    0.896625] rtl8231-gpio rtl8231-gpio: no device found at bus address 0
[    1.009468] Serial: 8250/16550 driver, 16 ports, IRQ sharing enabled
[    1.023229] printk: console [ttyS0] disabled
[    1.028028] 18002000.uart: ttyS0 at MMIO 0x18002000 (irq = 31, base_baud = 12500000) is a 16550A
[    1.037859] printk: console [ttyS0] enabled
[    1.037859] printk: console [ttyS0] enabled
[    1.047204] printk: bootconsole [early0] disabled
[    1.047204] printk: bootconsole [early0] disabled
[    1.059268] 18002100.uart: ttyS1 at MMIO 0x18002100 (irq = 30, base_baud = 12500000) is a 16550A
[    1.815740] brd: module loaded
[    1.830576] spi-nor spi0.0: gd25q128 (16384 Kbytes)
[    1.836177] 7 fixed-partitions partitions found on MTD device spi0.0
[    1.843446] Creating 7 MTD partitions on "spi0.0":
[    1.848839] 0x000000000000-0x000000040000 : "u-boot"
[    1.860742] 0x000000040000-0x000000050000 : "u-boot-env"
[    1.869589] 0x000000050000-0x000000060000 : "u-boot-env2"
[    1.883553] 0x000000060000-0x000000160000 : "jffs"
[    1.892002] 0x000000160000-0x000000260000 : "jffs2"
[    1.905307] 0x000000260000-0x000000930000 : "firmware"
[    1.915215] 2 uimage-fw partitions found on MTD device firmware
[    1.922009] Creating 2 MTD partitions on "firmware":
[    1.927588] 0x000000000000-0x000000040000 : "rootfs"
[    1.940783] mtd: device 6 (rootfs) set to be root filesystem
[    1.947287] mtdsplit: no squashfs found in "rootfs"
[    1.953000] 0x000000040000-0x00000067abb0 : "kernel"
[    1.958561] mtd: partition "kernel" doesn't end on an erase/write block -- force read-only
[    1.973177] 0x000000930000-0x000001000000 : "runtime2"
[    1.999304] Probing RTL838X eth device pdev: 82092e00, dev: 82092e10
[    2.057011] Found SoC ID: 8382: RTL8382, family 8380
[    2.062798] rtl8380_init_mac
[    2.066072] Using MAC 000000e04c000000
[    2.206692] Realtek RTL8218B (internal) mdio-bus:08: Detected internal RTL8218B
[    2.214994] Firmware loaded. Size 1184, magic: 83808380
[    5.006411] mdio_bus mdio-bus: MDIO device at address 24 is missing.
[    5.013841] mdio_bus mdio-bus: MDIO device at address 26 is missing.
[    5.022840] i2c /dev entries driver
[    5.031483] NET: Registered protocol family 10
[    5.061706] Segment Routing with IPv6
[    5.066043] NET: Registered protocol family 17
[    5.071345] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.
[    5.086697] 8021q: 802.1Q VLAN Support v1.8
[    5.145024] Realtek RTL8218B (internal) rtl838x slave mii-0:08: Detected internal RTL8218B
[    5.154398] Firmware loaded. Size 1184, magic: 83808380
[    8.101067] rtl83xx_mdio_probe found port 8
[    8.105773] rtl83xx_mdio_probe port 8 has phandle
[    8.111152] rtl83xx_mdio_probe port -1 has SDS
[    8.116144] rtl83xx_mdio_probe found port 9
[    8.120931] rtl83xx_mdio_probe port 9 has phandle
[    8.126197] rtl83xx_mdio_probe port -1 has SDS
[    8.131277] rtl83xx_mdio_probe found port 10
[    8.136068] rtl83xx_mdio_probe port 10 has phandle
[    8.141516] rtl83xx_mdio_probe port -1 has SDS
[    8.146504] rtl83xx_mdio_probe found port 11
[    8.151387] rtl83xx_mdio_probe port 11 has phandle
[    8.156751] rtl83xx_mdio_probe port -1 has SDS
[    8.161850] rtl83xx_mdio_probe found port 12
[    8.166640] rtl83xx_mdio_probe port 12 has phandle
[    8.172122] rtl83xx_mdio_probe port -1 has SDS
[    8.177110] rtl83xx_mdio_probe found port 13
[    8.181999] rtl83xx_mdio_probe port 13 has phandle
[    8.187367] rtl83xx_mdio_probe port -1 has SDS
[    8.192445] rtl83xx_mdio_probe found port 14
[    8.197237] rtl83xx_mdio_probe port 14 has phandle
[    8.202685] rtl83xx_mdio_probe port -1 has SDS
[    8.207672] rtl83xx_mdio_probe found port 15
[    8.212553] rtl83xx_mdio_probe port 15 has phandle
[    8.217921] rtl83xx_mdio_probe port -1 has SDS
[    8.222998] rtl83xx_mdio_probe found port 28
[    8.227791] rtl83xx_mdio_probe found port 24
[    8.232682] rtl83xx-switch switch@1b000000: Port node 24 misses phy-handle
[    8.240476] rtl83xx_mdio_probe found port 26
[    8.245275] rtl83xx-switch switch@1b000000: Port node 26 misses phy-handle
[    8.292320] In rtl83xx_vlan_setup
[    8.296065] UNKNOWN_MC_PMASK: 000000001fffffff
[    8.301182] VLAN profile 0: L2 learning: 1, UNKN L2MC FLD PMSK 511,          UNKN IPMC FLD PMSK 511, UNKN IPv6MC FLD PMSK: 511
[    9.390446] rtl83xx_enable_phy_polling:             ff00
[   10.431253] rtl83xx-switch switch@1b000000 lan1 (uninitialized): PHY [mdio-bus:08] driver [Realtek RTL8218B (internal)] (irq=POLL)
[   10.447035] rtl83xx-switch switch@1b000000 lan2 (uninitialized): PHY [mdio-bus:09] driver [Realtek RTL8218B (internal)] (irq=POLL)
[   10.462808] rtl83xx-switch switch@1b000000 lan3 (uninitialized): PHY [mdio-bus:0a] driver [Realtek RTL8218B (internal)] (irq=POLL)
[   10.478584] rtl83xx-switch switch@1b000000 lan4 (uninitialized): PHY [mdio-bus:0b] driver [Realtek RTL8218B (internal)] (irq=POLL)
[   10.494354] rtl83xx-switch switch@1b000000 lan5 (uninitialized): PHY [mdio-bus:0c] driver [Realtek RTL8218B (internal)] (irq=POLL)
[   10.510128] rtl83xx-switch switch@1b000000 lan6 (uninitialized): PHY [mdio-bus:0d] driver [Realtek RTL8218B (internal)] (irq=POLL)
[   10.525903] rtl83xx-switch switch@1b000000 lan7 (uninitialized): PHY [mdio-bus:0e] driver [Realtek RTL8218B (internal)] (irq=POLL)
[   10.541674] rtl83xx-switch switch@1b000000 lan8 (uninitialized): PHY [mdio-bus:0f] driver [Realtek RTL8218B (internal)] (irq=POLL)
[   10.561468] rtl83xx-switch switch@1b000000: configuring for fixed/internal link mode
[   10.570957] DSA: tree 0 setup
[   10.574363] LINK state irq: 20
[   10.577839] In rtl83xx_setup_qos
[   10.581586] Setting up RTL838X QoS
[   10.585406] RTL838X_PRI_SEL_TBL_CTRL(i): 00033112
[   10.590754] Current Intprio2queue setting: 00000000
[   10.596213] QM_PKT2CPU_INTPRI_MAP: 00fac688
[   10.601184] rtl838x_dbgfs_init called
[   10.729950] Freeing unused kernel memory: 8164K
[   10.735161] This architecture does not have kernel memory protection.
[   10.742480] Run /init as init process
[   10.746585]   with arguments:
[   10.749893]     /init
[   10.752527]   with environment:
[   10.756046]     HOME=/
[   10.758675]     TERM=linux
[   10.761973] rtl83xx-switch switch@1b000000: Link is Up - 1Gbps/Full - flow control off
[   10.771893] rtl83xx_fib_event_work_do: FIB4 default rule failed
[   10.778539] rtl83xx_fib_event_work_do: FIB4 default rule failed
[   11.968102] init: Console is alive
[   11.973065] init: - watchdog -
[   12.017000] kmodloader: loading kernel modules from /etc/modules-boot.d/*
[   12.036274] kmodloader: done loading kernel modules from /etc/modules-boot.d/*
[   12.056218] init: - preinit -
[   12.526005] random: jshn: uninitialized urandom read (4 bytes read)
[   12.680659] random: jshn: uninitialized urandom read (4 bytes read)
[   12.990017] RTL8380 Link change: status: 1, ports 8000
[   13.778862] random: jshn: uninitialized urandom read (4 bytes read)
[   13.874871] random: jshn: uninitialized urandom read (4 bytes read)
[   14.096599] random: jshn: uninitialized urandom read (4 bytes read)
[   14.249261] RESETTING 8380, CPU_PORT 28
[   14.454407] rtl838x-eth 1b00a300.ethernet eth0: configuring for fixed/internal link mode
[   14.463477] In rtl838x_mac_config, mode 1
[   14.471186] rtl83xx-switch switch@1b000000 lan1: configuring for phy/internal link mode
[   14.480989] 8021q: adding VLAN 0 to HW filter on device lan1
[   14.487830] In rtl838x_mac_config, mode 1
[   14.492497] rtl838x-eth 1b00a300.ethernet eth0: Link is Up - 1Gbps/Full - flow control off
[   14.551102] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[   14.558239] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   14.565945] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   14.607424] rtl83xx_fib_event_work_do: FIB4 failed
[   14.620580] rtl83xx_fib_event_work_do: FIB4 failed
[   14.625970] rtl83xx_fib_event_work_do: FIB4 failed
[   14.640920] rtl83xx_fib_event_work_do: FIB4 failed
Press the [f] key and hit [enter] to enter failsafe mode
Press the [1], [2], [3] or [4] key and hit [enter] to select the debug level
[   15.710535] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   16.954310] rtl83xx_fib4_del: no such gateway: 0.0.0.0
[   16.960092] rtl83xx_fib4_del: no such gateway: 0.0.0.0
[   16.977081] rtl83xx_fib4_del: no such gateway: 0.0.0.0
[   16.990601] rtl83xx_fib4_del: no such gateway: 0.0.0.0
[   17.031080] procd: - early -
[   17.034983] procd: - watchdog -
[   19.742863] procd: - watchdog -
[   19.747616] procd: - ubus -
[   19.770812] urandom_read_iter: 1 callbacks suppressed
[   19.770829] random: ubusd: uninitialized urandom read (4 bytes read)
[   19.802480] random: ubusd: uninitialized urandom read (4 bytes read)
[   19.810915] random: ubusd: uninitialized urandom read (4 bytes read)
[   19.825454] procd: - init -
Please press Enter to activate this console.
[   21.001961] urandom_read_iter: 13 callbacks suppressed
[   21.001978] random: jshn: uninitialized urandom read (4 bytes read)
[   21.084440] random: ubusd: uninitialized urandom read (4 bytes read)
[   21.185927] kmodloader: loading kernel modules from /etc/modules.d/*
[   21.207268] GACT probability on
[   21.224253] Mirror/redirect action on
[   21.288640] u32 classifier
[   21.291818]     input device check on
[   21.295918]     Actions configured
[   21.681782] kmodloader: done loading kernel modules from /etc/modules.d/*
[   21.774605] urngd: v1.0.2 started.
[   22.054456] random: crng init done
[   22.058287] random: 2 urandom warning(s) missed due to ratelimiting
[   26.739362] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   69.500972] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   69.596471] in rtl838x_eth_stop
[   69.600144] rtl838x-eth 1b00a300.ethernet eth0: Link is Down
[   70.143329] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   70.150959] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   70.158442] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   70.166064] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   71.080871] RESETTING 8380, CPU_PORT 28
[   71.286022] rtl838x-eth 1b00a300.ethernet eth0: configuring for fixed/internal link mode
[   71.295058] In rtl838x_mac_config, mode 1
[   71.300014] In rtl838x_mac_config, mode 1
[   71.304680] rtl838x-eth 1b00a300.ethernet eth0: Link is Up - 1Gbps/Full - flow control off
[   71.321931] rtl83xx-switch switch@1b000000 lan1: configuring for phy/internal link mode
[   71.342078] 8021q: adding VLAN 0 to HW filter on device lan1
[   71.349441] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[   71.356723] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   71.364420] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   71.373963] switch: port 1(lan1) entered blocking state
[   71.379839] switch: port 1(lan1) entered disabled state
[   71.387147] device lan1 entered promiscuous mode
[   71.392437] device eth0 entered promiscuous mode
[   71.471747] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   71.491722] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   71.574652] rtl83xx-switch switch@1b000000 lan2: configuring for phy/internal link mode
[   71.584315] 8021q: adding VLAN 0 to HW filter on device lan2
[   71.698864] switch: port 2(lan2) entered blocking state
[   71.704876] switch: port 2(lan2) entered disabled state
[   71.711676] device lan2 entered promiscuous mode
[   71.852067] rtl83xx-switch switch@1b000000 lan3: configuring for phy/internal link mode
[   71.861669] 8021q: adding VLAN 0 to HW filter on device lan3
[   71.911572] switch: port 3(lan3) entered blocking state
[   71.917444] switch: port 3(lan3) entered disabled state
[   71.936518] device lan3 entered promiscuous mode
[   71.993622] rtl83xx-switch switch@1b000000 lan4: configuring for phy/internal link mode
[   72.003270] 8021q: adding VLAN 0 to HW filter on device lan4
[   72.052769] switch: port 4(lan4) entered blocking state
[   72.058646] switch: port 4(lan4) entered disabled state
[   72.085851] device lan4 entered promiscuous mode
[   72.151129] rtl83xx-switch switch@1b000000 lan5: configuring for phy/internal link mode
[   72.160789] 8021q: adding VLAN 0 to HW filter on device lan5
[   72.211523] switch: port 5(lan5) entered blocking state
[   72.217392] switch: port 5(lan5) entered disabled state
[   72.240649] device lan5 entered promiscuous mode
[   72.302312] rtl83xx-switch switch@1b000000 lan6: configuring for phy/internal link mode
[   72.312181] 8021q: adding VLAN 0 to HW filter on device lan6
[   72.366080] switch: port 6(lan6) entered blocking state
[   72.372082] switch: port 6(lan6) entered disabled state
[   72.396239] device lan6 entered promiscuous mode
[   72.445519] rtl83xx-switch switch@1b000000 lan7: configuring for phy/internal link mode
[   72.455084] 8021q: adding VLAN 0 to HW filter on device lan7
[   72.511510] switch: port 7(lan7) entered blocking state
[   72.517406] switch: port 7(lan7) entered disabled state
[   72.540642] device lan7 entered promiscuous mode
[   72.584727] rtl83xx-switch switch@1b000000 lan8: configuring for phy/internal link mode
[   72.594549] 8021q: adding VLAN 0 to HW filter on device lan8
[   72.628939] RTL8380 Link change: status: 1, ports 8000
[   72.651521] switch: port 8(lan8) entered blocking state
[   72.657393] switch: port 8(lan8) entered disabled state
[   72.664224] device lan8 entered promiscuous mode
[   72.718182] rtl83xx-switch switch@1b000000 lan9: configuring for inband/1000base-x link mode
[   72.728040] 8021q: adding VLAN 0 to HW filter on device lan9
[   72.750619] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   72.758190] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   72.771556] switch: port 9(lan9) entered blocking state
[   72.777425] switch: port 9(lan9) entered disabled state
[   72.784281] device lan9 entered promiscuous mode
[   72.838711] rtl83xx-switch switch@1b000000 lan10: configuring for inband/1000base-x link mode
[   72.848696] 8021q: adding VLAN 0 to HW filter on device lan10
[   72.891530] switch: port 10(lan10) entered blocking state
[   72.897590] switch: port 10(lan10) entered disabled state
[   72.904616] device lan10 entered promiscuous mode
[   72.954693] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   78.435032] RTL8380 Link change: status: 1, ports 8000
[   78.833968] rtl83xx-switch switch@1b000000 lan8: Link is Up - 100Mbps/Full - flow control rx/tx
[   78.843888] switch: port 8(lan8) entered blocking state
[   78.849750] switch: port 8(lan8) entered forwarding state
[   78.860861] IPv6: ADDRCONF(NETDEV_CHANGE): switch: link becomes ready
[   78.868977] IPv6: ADDRCONF(NETDEV_CHANGE): switch.1: link becomes ready
[   80.510664] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported
[   80.518221] rtl83xx_fib_event: FIB_RULE ADD/DELL for IPv6 not supported

Here's the U-Boot log:

U-Boot Version  (May 18 2021 - 16:58:03)

Board: RTL838x CPU:500MHz LXB:200MHz MEM:300MHz
DRAM:  128 MB
SPI-F: 1x16 MB
flash id = 0xc22018
Loading 65536B env. variables from offset 0x80000
*** Warning - bad CRC, using default environment

BOARD_VERSION:RTL8380M_INTPHY_2FIB_1G_DEMO
Switch Model: RTL8380M_INTPHY_2FIB_1G_DEMO (Port Count: 10)
Switch Chip: RTL8380M
**************************************************
#### RTL8218B config - MAC ID = 8 ####
Now Internal PHY
PHY[1]: not supported in EEE
Net:   Net Initialization Skipped
rtl8380#0
get uid
uid = 4536363634073f4a
Hit any key to stop autoboot:  0

Env variables:

<CMD># # printenv
baudrate=115200
boardmodel=RTL8382M_8218B_INTPHY_8218B_8214FC_DEMO
bootcmd=boota
bootdelay=1
ethact=rtl8380#0
ethaddr=00:E0:4C:00:00:00
file_linux2=vmlinux.bix
flashoffset_env=0x80000
flashoffset_linux=0x2a0000
flashoffset_linux2=0x950000
flashoffset_uboot=0x0
ipaddr=192.168.1.1
load_addr=0xb4100000
serverip=192.168.1.111
ssize_env=0x10000
ssize_linux=0x6b0000
ssize_linux2=0x6b0000
ssize_uboot=0x80000
stderr=serial
stdin=serial
stdout=serial
update_linux2=tftp $(freemem) $(file_linux2);sf probe 0;sf erase $(flashoffset_linux2) $(ssize_linux2);sf write $(fileaddr) $(flashoffset_linux2) $(ssize_linux2)

Environment size: 653/65532 bytes

Sys variables:

<CMD># # printsys
boardid=5
bootpartition=1
resetdefault=0
dualfname1=vmlinux-oem_8 2_en-poe-ic .bix
dualfname0=vmlinux-oem_8 2_cn.bix
System information size: 117/4096 bytes

Flash partition layout:

<CMD># # flshow
=============== FLASH Partition Layout ===============
Index  Name       Size       Address
------------------------------------------------------
  0     LOADER     0x80000    0xb4000000-0xb407ffff
  1     BDINFO     0x10000    0xb4080000-0xb408ffff
  2     SYSINFO    0x10000    0xb4090000-0xb409ffff
  3     JFFS2_CFG  0x100000   0xb40a0000-0xb419ffff
  4     JFFS2_LOG  0x100000   0xb41a0000-0xb429ffff
  5     RUNTIME1   0x6b0000   0xb42a0000-0xb494ffff
  6     RUNTIME2   0x6b0000   0xb4950000-0xb4ffffff
======================================================

Would appreciate some pointers on what I should be looking to do to fix the errors and the long boot time so I can get this device ported!

1 Like
1601

That's actually a super interesting switch/vendor. Not in terms of the product; but finding ODM/unbranded switches on alibaba. GXcom even 'claims 'OpenWRT' on their site/page. Interesting if that's a route to go in general; get one of those ODM's, "co-develop" a perfect switch, get excellent OpenWRT support on it; and smash a logo on it.

2 Likes
1602

Any issues I should be aware of running OpenWRT on Zyxel GS1900-16?

1603

I removed the managed property from variant A and tested again, but this doesn't change anything.

After adding debug output to rtl838x_switch_irq, I noticed that it always reads the link as down, i.e. dsa_port_phylink_mac_change is never called with a true parameter (also for the non-SFP ports). Reading the link status twice (as in the RTL93xx code) seems to give the correct link status. However, this doesn't change anything in the end result, non-SFP ports work as before, and SFP ports still don't work.

Then I added some debug output to the phylink and sfp code. This shows that phylink_resolve is never called because phylink_disable_state remains set. The problem seems to be that phylink_sfp_config returns -EINVAL (after checking phy_interface_mode_is_8023z(iface) && pl->phydev). As a result, the SFP goes into an error state.

Kernel log output after plugging in SFP module 
[  479.026051] RTL8380 Link change: status: 1, ports 8000000
[  479.043933] rtl838x_switch_irq port 27 link val 8004000 -> 8000000
[  479.064397] phylink_run_resolve: not queueing (phylink_disable_state)
[  479.085716] rtl83xx-switch switch@1b000000 lan20: mac link up
[  479.105978] sfp sfp-3: mod-def0 0 -> 1
[  479.118517] sfp sfp-3: los 1 -> 0
[  479.129619] sfp sfp-3: SM: enter empty:up:down event insert
[  479.148206] sfp_sm_module
[  479.156995] sfp_sm_module: default
[  479.168410] sfp sfp-3: SM: exit probe:up:down
[  479.182976] sfp sfp-3: SM: enter probe:up:down event los_low
[  479.201839] sfp_sm_module
[  479.210620] sfp_sm_module: SFP_MOD_PROBE
[  479.223729] sfp sfp-3: SM: exit probe:up:down
[  479.257399] phylink_run_resolve: not queueing (phylink_disable_state)
[  479.278873] rtl83xx-switch switch@1b000000 lan20: phy link up qsgmii/10Mbps/Half
[  479.473745] sfp sfp-3: SM: enter probe:up:down event timeout
[  479.492615] sfp_sm_module
[  479.501386] sfp_sm_module: SFP_MOD_PROBE
[  479.592557] sfp sfp-3: module WTD              RTXM191-400      rev 3.0  sn EC122500180652   dc 120622  
[  479.624117] sfp_sm_module: SFP_MOD_WAITDEV
[  479.637809] phylink_sfp_module_insert: phylink_sfp_config
[  479.655828] In rtl83xx_phylink_validate port 27, state is 0
[  479.655854] In rtl83xx_phylink_validate port 27, state is 21
[  479.674478] rtl83xx-switch switch@1b000000 lan20: requesting link mode inband/1000base-x with support 0000000,00000200,00006440
[  479.731445] phylink_sfp_config: phy_interface_mode_is_8023z(iface) && pl->phydev
[  479.756090] sfp_sm_module: sfp_module_insert err -22
[  479.772668] sfp sfp-3: SM: exit error:up:down
[  480.283949] RTL8380 Link change: status: 1, ports 8000000
[  480.301836] rtl838x_switch_irq port 27 link val 4000 -> 0
[  480.319710] phylink_run_resolve: not queueing (phylink_disable_state)
[  480.341028] rtl83xx-switch switch@1b000000 lan20: mac link down
[  480.360773] RTL8380 Link change: status: 1, ports 8000000
[  480.378667] rtl838x_switch_irq port 27 link val 8004000 -> 8000000
[  480.399127] phylink_run_resolve: not queueing (phylink_disable_state)
[  480.420450] rtl83xx-switch switch@1b000000 lan20: mac link up
[  480.519614] RTL8380 Link change: status: 1, ports 8000000
[  480.537512] rtl838x_switch_irq port 27 link val 4000 -> 0
[  480.555385] phylink_run_resolve: not queueing (phylink_disable_state)
[  480.576705] rtl83xx-switch switch@1b000000 lan20: mac link down
[  480.596432] RTL8380 Link change: status: 1, ports 8000000
[  480.614316] rtl838x_switch_irq port 27 link val 8004000 -> 8000000
[  480.634776] phylink_run_resolve: not queueing (phylink_disable_state)
[  480.656100] rtl83xx-switch switch@1b000000 lan20: mac link up

After searching around a bit, I think the PHY driver needs SFP support for this to work properly. In the device tree, the SFP should then only be referenced at the PHY.

For a quick test, I added some very basic SFP support to the PHY driver. With that change and adjusted DTS it works now (rtl8382_hpe_1920.dtsi, rtl8382_hpe_1920-16g.dts).

There is still the small annoyance that the media type has to be switched manually if the bootloader did not initialize networking. I guess this should be fixable by responding to insertion/removal of an SFP module in the PHY driver?

1604

Wow. That's a big step forward. I was looking for a way to send SFP events into the PHY driver since more than a year. The first time this came up was when I added the initial support for the RTL8214FC, but I see now that under 5.4, there was no support in the kernel for that, it was added later and the only example seems to be the marvel10g driver. Then it came up again to do different calibrations of the internal SerDes/PHY of the RTL93xx in combination with the insertion of different DAC cables and recently again to have SFP support for the RTL8214QF. So this is a real breakthrough for considerably improved SFP support on several RTL devices.

To proceed: why don't you add the

	int (*module_insert)(void *priv, const struct sfp_eeprom_id *id);
	void (*module_remove)(void *priv);

members to the sfp_upstream_ops structure and have them call rtl8380_rtl8214fc_media_set(). Then you can provide a PR for your device so people can test with other devices which have an RTL8214FC?

In the meantime I will play with what you learned on the RTL8214QF and the RTL93xx PHYs.

1605

I can confirm this is in the latest SDK we have. They do it also for the RTL839x, not just on the RTL93xx. It seems to be necessary in combination with certain PHYs. Interesting that it was working with the RTL8214FC before. The comment in the code for the RTL839x code says it is needed because of latency, but on the RTL93xx consensus seemed to be it was due to latching. But now with what we see on the 8214FC I tend again to attribute this to latency, because it seems to work in certain conditions. Also the 8214FC is 1/2 of an RTL8218B (the last digit states the number of ports provided, FC seems to be support for cable and fibre. 1/2 because the 8218b has 2 QSGMII links, the 8214s have only one. This makes the 8214QF a quad port fibre only PHY, as stated on the product page, and the RTL8214C a quad port cable only chip. The PHY registers seem to be 100% identical.), so it is really unclear why this is never necessary on the 8218B if it is latching, which is a PHY property. Stupid me to not check the latest SDK for the RTL83xx when I realized it was necessary for the RTL8226 on the RTL9300, I am pretty sure this was not in the earlier SDK copies we have, which did not have the RTL93xx support.

1606

The following seems to work perfectly on a D-Link DGS1210-16 and automatically switches media when inserting an SFP module:

static int rtl8214fc_sfp_insert(void *upstream, const struct sfp_eeprom_id *id)
{
	struct phy_device *phydev = upstream;

	rtl8380_rtl8214fc_media_set(phydev, true);

	return 0;
}

static void rtl8214fc_sfp_remove(void *upstream)
{
	struct phy_device *phydev = upstream;

	rtl8380_rtl8214fc_media_set(phydev, false);
}

static const struct sfp_upstream_ops rtl8214fc_sfp_ops = {
	.attach = phy_sfp_attach,
	.detach = phy_sfp_detach,
	.module_insert = rtl8214fc_sfp_insert,
	.module_remove = rtl8214fc_sfp_remove,
};
1607

Since this device has neither SFP nor PoE all functions appear to be working with no issues.

1 Like
1608

On this device, it is necessary for all PHYs (internal RTL8218B, RTL8218D, RTL8214FC) to read the link state correctly. It doesn't seem to make any difference in actual functionality, though.

This works.

However, there is an issue with rtl8380_rtl8214fc_media_set itself. Media switching has always been a bit buggy here when networking was not initialized by the bootloader: After switching to fiber for the first time, it is necessary to do a ifconfig down/up cycle until the port actually works (I can't tell how copper ports would behave, as this device doesn't have combo ports). The first SFP port doesn't have this issue. The problem is that the phy_package_write_paged is used for powering ports off/on, which always changes the first port. Changing that to phy_write_paged fixes this issue.

I also implemented a change to make power configuration independent from media switching. This is necessary to avoid powering up a port while its interface is down. I kept rtl8380_rtl8214fc_on_off as it is, as it uses different code (phy_modify for fiber), and I don't know why this is the case. As this device rtl8380_phy_reset is called instead, I cannot test if a change there would break anything.

Aside from that, I saw in the kernel log that the PHYs seem to be initialized twice. Is this expected behaviour?

Kernel log 
[    2.247381] Probing RTL838X eth device pdev: 82086a00, dev: 82086a10
[    2.318991] Found SoC ID: 8382: RTL8382, family 8380
[    2.335667] rtl8380_init_mac
[    2.345370] Using MAC 0000d894033cc5ac
[    2.460660] Realtek RTL8218B (internal) mdio-bus:08: Detected internal RTL8218B
[    2.485046] Firmware loaded. Size 1184, magic: 83808380
[    5.102427] Realtek RTL8214FC mdio-bus:18: Detected external RTL8214FC
[    5.124195] Firmware loaded. Size 1676, magic: 83808380
[    6.435370] i2c /dev entries driver
[    6.450486] NET: Registered protocol family 10
[    6.488510] Segment Routing with IPv6
[    6.501024] NET: Registered protocol family 17
[    6.516832] 8021q: 802.1Q VLAN Support v1.8
[    6.532371] i2c-gpio i2c-gpio-0: Slow GPIO pins might wreak havoc into I2C/SMBus bus timing
[    6.560683] i2c-gpio i2c-gpio-0: using lines 464 (SDA) and 465 (SCL)
[    6.582537] i2c-gpio i2c-gpio-1: Slow GPIO pins might wreak havoc into I2C/SMBus bus timing
[    6.610876] i2c-gpio i2c-gpio-1: using lines 474 (SDA) and 475 (SCL)
[    6.632863] i2c-gpio i2c-gpio-2: Slow GPIO pins might wreak havoc into I2C/SMBus bus timing
[    6.661160] i2c-gpio i2c-gpio-2: using lines 478 (SDA) and 479 (SCL)
[    6.683150] i2c-gpio i2c-gpio-3: Slow GPIO pins might wreak havoc into I2C/SMBus bus timing
[    6.711453] i2c-gpio i2c-gpio-3: using lines 482 (SDA) and 483 (SCL)
[    6.734364] sfp sfp-0: Host maximum power 1.0W
[    6.749281] sfp sfp-0: No tx_disable pin: SFP modules will always be emitting.
[    6.775025] sfp sfp-1: Host maximum power 1.0W
[    6.789934] sfp sfp-1: No tx_disable pin: SFP modules will always be emitting.
[    6.815688] sfp sfp-2: Host maximum power 1.0W
[    6.830588] sfp sfp-2: No tx_disable pin: SFP modules will always be emitting.
[    6.856401] sfp sfp-3: Host maximum power 1.0W
[    6.871328] sfp sfp-3: No tx_disable pin: SFP modules will always be emitting.
[    6.951523] Realtek RTL8218B (internal) rtl838x slave mii-0:08: Detected internal RTL8218B
[    6.979055] Firmware loaded. Size 1184, magic: 83808380
[    7.362079] sfp sfp-3: module WTD              RTXM191-400      rev 3.0  sn EC122500180652   dc 120622  
[    7.393655] rtl8380_rtl8214fc_media_set: port 27, set_fibre: 1
[    7.453556] rtl8380_rtl8214fc_power_set: Powering off COPPER (port 27)
[    7.495520] rtl8380_rtl8214fc_power_set: Powering on FIBRE (port 27)
[    9.585902] Realtek RTL8214FC rtl838x slave mii-0:18: Detected external RTL8214FC
[    9.610855] Firmware loaded. Size 1676, magic: 83808380

Also, there is still the issue of duplicated hwmons. Every time an SFP module is powered up (after plugging it in or using ifconfig up), an additional one appears. This doesn't happen if the SFP is not referenced in the PHY node in the device tree.

1609

Since the details about realtek PoE support went to a different sister topic, just wanted to inform that since last weekend the ZyXEL GS1900-24HPv1 is having some early PoE support on ports 1-24!

3 Likes
1610

The link state is something the SoC reads out of the PHY, for this, the SoC actively polls the PHY via MDIO, reads out the PHY registers and triggers the interrupt when a link change is detected. The link change bit of the port is set correctly for the ISR. But the link state bit seems to be not always correctly set, at least it needs to be read 2x in some conditions.

The wrong link state read from the SoC seems to be corrected by phylink in some cases by reading out the PHY link state directly. It also reads out the PHY link state by polling itself every couple of seconds, so it can compensate even for no poling happening at all. The way to stop polling by phylink would be to have the PHY issue an IRQ, but the RTL SoCs do not have sufficiently many GPIOs that would allow to have a HW interrupt when the PHY issues it.

The behaviour of MAC_LINK_STS does either not seem to be considered a bug by Realtek or otherwise too difficult or not worth it to fix. The PHY polling is a central feature of the SoCs as it also is used to control the LEDs. Without polling the port leds do not work automatically. On the RTL93xx the SoC can even poll c45 PHYs and has per-mdio bus registers to configure which PHY registers are being polled and how to interpret them.

I will test this on the D-Link DGS1210-16 with its combo ports.

1611

I have written support for configuration of the LEDs on the RTL838x. It works similarly to the ones found in the RTL839x and newer SoCs. It takes information about the PHYs and combines this with configuration values for the setup of the serial control. This can be used when u-boot does not properly initialize the LEDs. The control is then via the SoC, but it could also be the basis for a separate LED manual controller, which could be limited to merely poke values into the software LED on/off registers, and which would not need to e.g. have port/PHY information.
This is the code, the commit contains instructions of use:

There are currently 2 examples of usage:

1 Like
1612

This should target the CAMEO tag issues.

2 Likes