Support for RTL838x based managed switches

Thanks @nemSoma for pointing me to the changes possibly needed to get v1 version up and running. Especially the memory@0 with 64MB reference in your .dts to override the generic "rtl8380_zyxel_gs1900.dtsi", with my limited knowledge I had just hardcoded the ram value in that generic .dtsi file for testing.

To see how the ethernet / sfp / switch port(s) are numbered hooked up internal / phy mode / qsgmii gpio etc can you share your "show tech-support info" to compare if these also needs changing code since the PoE was already different.

Yes, please. Thank you!

There is also the GS1900-24EP available. I'm hoping it is just a GS1900E w/ added POE. The GS1900-24 and GS1900-24HP v1 should differ only by the POE.

1 Like

This is my show board output.
All SFP/I2C GPIOs were identical to the ones on the GS1900-10HP
I would be surprised if the v1 was any different

****************************
 GS1900-24HP
****************************
============================
 Board GPIO
============================
Device  Pin  Direction  Default  Current
------- ---- ---------- -------- --------
INT     0    OUT        0        0       
INT     1    OUT        1        1       
INT     2    OUT        0        0       
INT     3    OUT        0        0       
INT     8    OUT        1        1       
INT     9    OUT        1        1       
INT     12   IN         0        0       
INT     13   OUT        1        1       
INT     14   OUT        1        1       
INT     15   OUT        1        1       
INT     16   IN         0        0       
INT     17   OUT        1        1       
INT     18   OUT        0        0       
INT     19   IN         0        0       
INT     20   OUT        1        1       
INT     21   IN         0        0       
INT     22   IN         0        0       
INT     23   OUT        1        1       
EXT     0    IN  (IN  ) 0        1       
EXT     1    IN  (IN  ) 0        1       
EXT     2    IN  (IN  ) 0        0       
EXT     3    IN  (IN  ) 0        1       
EXT     4    IN  (IN  ) 0        1       
EXT     5    OUT (OUT ) 1        1       
EXT     6    OUT (OUT ) 1        1       
EXT     7    IN  (IN  ) 0        1       
EXT     8    OUT (OUT ) 1        1       
EXT     13   OUT (OUT ) 0        1       
EXT     14   OUT (OUT ) 0        0       
EXT     15   OUT (OUT ) 0        0       
EXT     16   OUT (OUT ) 0        0       
EXT     17   OUT (IN  ) 0        0       
EXT     18   OUT (IN  ) 0        0       
EXT     21   IN  (IN  ) 0        0       
EXT     22   IN  (IN  ) 0        1       
EXT     23   OUT (OUT ) 0        0       
EXT     24   OUT (OUT ) 0        1       
EXT     25   OUT (OUT ) 0        1       
EXT     26   IN  (IN  ) 0        1       
EXT     27   IN  (IN  ) 0        1       
EXT     28   IN  (IN  ) 0        0       
EXT     29   OUT (OUT ) 0        0       
EXT     30   OUT (OUT ) 0        1       
EXT     31   OUT (OUT ) 0        1       
EXT     32   IN  (IN  ) 0        0       
EXT     33   IN  (IN  ) 0        0       
EXT     34   OUT (OUT ) 1        1       

============================
 Board Configuration
============================
====== Port ==================
Type       Usr  Phy     Media       Speed          Duplex   Attr
---------- ---- ------- ----------- -------------- -------- -------
1000M      1    (0) 0   Copper      (A) ALL        Auto     1      
1000M      2    (0) 1   Copper      (A) ALL        Auto     1      
1000M      3    (0) 2   Copper      (A) ALL        Auto     1      
1000M      4    (0) 3   Copper      (A) ALL        Auto     1      
1000M      5    (0) 4   Copper      (A) ALL        Auto     1      
1000M      6    (0) 5   Copper      (A) ALL        Auto     1      
1000M      7    (0) 6   Copper      (A) ALL        Auto     1      
1000M      8    (0) 7   Copper      (A) ALL        Auto     1      
1000M      9    (0) 8   Copper      (A) ALL        Auto     1      
1000M      10   (0) 9   Copper      (A) ALL        Auto     1      
1000M      11   (0) 10  Copper      (A) ALL        Auto     1      
1000M      12   (0) 11  Copper      (A) ALL        Auto     1      
1000M      13   (0) 12  Copper      (A) ALL        Auto     1      
1000M      14   (0) 13  Copper      (A) ALL        Auto     1      
1000M      15   (0) 14  Copper      (A) ALL        Auto     1      
1000M      16   (0) 15  Copper      (A) ALL        Auto     1      
1000M      17   (0) 16  Copper      (A) ALL        Auto     1      
1000M      18   (0) 17  Copper      (A) ALL        Auto     1      
1000M      19   (0) 18  Copper      (A) ALL        Auto     1      
1000M      20   (0) 19  Copper      (A) ALL        Auto     1      
1000M      21   (0) 20  Copper      (A) ALL        Auto     1      
1000M      22   (0) 21  Copper      (A) ALL        Auto     1      
1000M      23   (0) 22  Copper      (A) ALL        Auto     1      
1000M      24   (0) 23  Copper      (A) ALL        Auto     1      
1000M      25   (0) 24  Fiber       (A) ALL        Auto     0      
1000M      26   (0) 26  Fiber       (A) ALL        Auto     0      


====== Fiber =================
Fiber Port Number: 2

------------ Fiber Detect
LPort  Present  MediaChg  OE Status              LOS Status
------ -------- --------- ---------------------- ----------------------
24     OE       OE        Enabled  (GPIO:EXT_26) Enabled  (GPIO:EXT_27)
25     OE       OE        Enabled  (GPIO:EXT_32) Enabled  (GPIO:EXT_33)

------------ Fiber Optical
LPort  SMI DEV  SMI TYPE  ID    Delay   SCK    SDA
------ -------- --------- ----- ------- ------ ------
24     SFP1     8 BITS    0x50  4000    EXT_25 EXT_24
25     SFP2     8 BITS    0x50  4000    EXT_31 EXT_30

------------ Fiber TX Disable
LPort  GPIO
------ ------
24     EXT_23
25     EXT_29


====== Button ================

------------ Reset Button
GPIO: EXT_3 
Timer: 6(sec)  Action: Restore Factory


====== Led ===================
SYS (REG)
ALARM (REG)


====== Reset =================
Type: GPIO
GPIO: EXT_5 


====== WatchDog ==============
Type: REG


====== PoE ===================

Power Configuration
--------------------------------
Nominal Power (admin) : 170000 mW
Nominal Power (actual): 180000 mW

Class Power Configuration
--------------------------------
Class    Power Limit (mW)
-------- ----------------
0        16200           
1        4200            
2        7400            
3        16200           

Port Configuration
--------------------------------
LPort    PoE Port Default Mode
-------- -------- ----------------
0        0.0      IEEE 802.3at
1        0.1      IEEE 802.3at
2        0.2      IEEE 802.3at
3        0.3      IEEE 802.3at
4        0.4      IEEE 802.3at
5        0.5      IEEE 802.3at
6        0.6      IEEE 802.3at
7        0.7      IEEE 802.3at
8        0.8      IEEE 802.3at
9        0.9      IEEE 802.3at
10       0.10     IEEE 802.3at
11       0.11     IEEE 802.3at
12       0.12     IEEE 802.3at
13       0.13     IEEE 802.3at
14       0.14     IEEE 802.3at
15       0.15     IEEE 802.3at
16       0.16     IEEE 802.3at
17       0.17     IEEE 802.3at
18       0.18     IEEE 802.3at
19       0.19     IEEE 802.3at
20       0.20     IEEE 802.3at
21       0.21     IEEE 802.3at
22       0.22     IEEE 802.3at
23       0.23     IEEE 802.3at

LED Configuration
--------------------------------

Port LED Configuration
--------------------------------
Port     Type     Configuration                   
-------- -------- --------------------------------
0        SW_CTRL  Entity: 2, Port 0
1        SW_CTRL  Entity: 2, Port 1
2        SW_CTRL  Entity: 2, Port 2
3        SW_CTRL  Entity: 2, Port 3
4        SW_CTRL  Entity: 2, Port 4
5        SW_CTRL  Entity: 2, Port 5
6        SW_CTRL  Entity: 2, Port 6
7        SW_CTRL  Entity: 2, Port 7
8        SW_CTRL  Entity: 2, Port 8
9        SW_CTRL  Entity: 2, Port 9
10       SW_CTRL  Entity: 2, Port 10
11       SW_CTRL  Entity: 2, Port 11
12       SW_CTRL  Entity: 2, Port 12
13       SW_CTRL  Entity: 2, Port 13
14       SW_CTRL  Entity: 2, Port 14
15       SW_CTRL  Entity: 2, Port 15
16       SW_CTRL  Entity: 2, Port 16
17       SW_CTRL  Entity: 2, Port 17
18       SW_CTRL  Entity: 2, Port 18
19       SW_CTRL  Entity: 2, Port 19
20       SW_CTRL  Entity: 2, Port 20
21       SW_CTRL  Entity: 2, Port 21
22       SW_CTRL  Entity: 2, Port 22
23       SW_CTRL  Entity: 2, Port 23

SMI Configuration
--------------------------------
Type: UART
Buadrate: 19200 bps

Disabled Pin Configuration
--------------------------------
Type     GPIO     Active  
-------- -------- --------
DISABLE  EXT_13   0   

Reset Pin Configuration
--------------------------------
Type     GPIO     Active   Period Time(sec) Restart(sec)     
-------- -------- -------- ---------------- ---------------- 
RESET    EXT_34   0        500              3500            



Thanks so far the only difference between GS1900-24HP v1/v2 show board info, seems to be button time option for reset and led entity 1 <-> 2.

I was putting together some of the info from the SDK, and noticed the DPM control bits are actually the 0x0200 value (cpu_tag[2]) in rtl838x_create_tx_header. So the DPM field would be used as a "logical port map" in this case (if I understand the SDK code correctly). L2 learning is indeed the lowest bit in 0x401 (cpu_tag[1])

Furthermore, the reason values don't really make sense to me, when I compare them to the mapping from the SDK for maple (838x) and cypress (839x).

@looi Maybe the reason you were seeing packet flooding is due to these things? I must say I don't really know the ethernet/DSA code, so I've just been copying from the SDK what I could make sense of.

Hi @kobi, thank you very much for your work on upstreaming these switches. I have a question about this biot wiki page you wrote about the ZyXEL GS1900-48, which mentions that the J4 header provides a RS232 serial port, and is connected to the SOCs UART. Does this mean I can just use a regular adapter like this one? And does it come up directly so I can select the backup firmware partition (just asking for a friend...), or is it brought up later by the OS?

Hi Edwinistrator,
the header will fit and you will be able to get an 12V RS232 connection port for the outside. What I do not know is whether the PIN-configuration is going to be correct. On the photo on biot's wiki I marked TX, RX and GND. Whether by plugging in the header and cable you will get the desired configuration:

I really do not know. You should try out. If the pins are wrong you need to change the way the cable connects header and DB9 plug. What is sure however is that the signals are going to be RS232 compatible.

Birger

Hi, I got a Panasonic Switch-M48eG PN28480K (en) and I'm working to add OpenWrt support for it.

  • SoC: RTL8393M
  • RAM: 128 MiB
  • Flash: 32 MiB
  • Ports:
    • 1-40: 5x RTL8218B
    • 41-48: RTL8218FB
      • 8x TP + 4x SFP (combo, 45-48)
      • only TP ports work by RTL8218B support
  • U-Boot boardmodel: RTL8393M_8218B_8218FB_2SFP

I've succeeded to boot, but the kernel hangs when trying to scan ethernet-phy 52 in drivers/net/phy/mdio_bus.c#L418.

I put 52 to the for loop instead of PHY_MAX_ADDR as a work-around and it solves this issue.
How should I fix it correctly?

changes for test and log
	pr_info("mdio_bus: enter loop for scanning phys\n");
	for (i = 0; i < PHY_MAX_ADDR; i++) {
		if ((bus->phy_mask & (1 << i)) == 0) {
			struct phy_device *phydev;

			phydev = mdiobus_scan(bus, i);
			pr_info("mdio_bus: phy scanned %d\n", i);
			if (IS_ERR(phydev) && (PTR_ERR(phydev) != -ENODEV)) {
				err = PTR_ERR(phydev);
				goto error;
			}
		}
	}
[   15.568487] libphy: mdio_bus: enter loop for scanning phys
[   15.658509] enter rtl8218b_ext_phy_probe
[   15.710181] exit rtl8218b_ext_phy_probe
[   15.760658] libphy: mdio_bus: phy scanned 0
[   15.830676] enter rtl8218b_ext_phy_probe
[   15.882282] exit rtl8218b_ext_phy_probe
...
[   23.713127] libphy: mdio_bus: phy scanned 46
[   23.784011] enter rtl8218b_ext_phy_probe
[   23.835694] exit rtl8218b_ext_phy_probe
[   23.886169] libphy: mdio_bus: phy scanned 47
[   23.943188] libphy: mdio_bus: phy scanned 48
[   24.000370] libphy: mdio_bus: phy scanned 49
[   24.057130] libphy: mdio_bus: phy scanned 50
[   24.114313] libphy: mdio_bus: phy scanned 51  <-- hang
1 Like

There are 2 types of solutions for this.
The quick and dirty, which works very well for me for all 839x based switches:

And then there would be the proper solution. While working on the 93xx SoCs I finally understood that the SoCs actually address transparently multiple MDIO busses. For the 839x they are automatically configured on reset, there does not seem to be any example in the SDK how to do this manually. But they can be configured freely, i.e. which virtual PHY address (0-64) maps to which bus/physical PHY address on that bus, I am pretty sure. You can find an example how this is done on the 930x here:

With the configuration of the SMI/MDIO bus address e.g. here:

Again, this is merely an intermediate solution which while allowing to configure things freely, is not really proper.

The proper solution would be to expose the multiple busses to the .dtsi, configure the phys with their respective physical address on the physical bus in the .dts and then write code for the driver that converts the physical bus/ phy address to the virtual phy address used through the SoC registers.

2 Likes

@kobi Has there been any progress on the 93xx family? I might be looking at an extra switch and the XGS1250-12 e.g. looks tempting.

I had a closer look at the MDIO / SMI bus mapping configuration code again. The relevant code is in sdk/src/hal/mac/drv/drv_rtlXXXX.c:smiAddr_init
While on all other architectures (including the 838x!) there is an actual mapping done, this is not the case for the 839x, everything seems to be automagical. I am very sure that the PHYs do not sit on a single SMI bus, though and have PHY-addresses >=32. That would be completely incompatible when mixing with non-RTL PHYs and the RTL PHYs would be useless for other vendors. Very likely there are at least 2 PHY busses and the RTL839x SoCs have a fixed mapping for them. I even think that the mapping is actually different for 8391, 8392, 8393 and 8396, why else would there be so many different SoCs, which do not seem to differ in features? Maybe you can check whether there are traces between the PHYs on your board that chain them on 2 busses? I was never able to figure that out. Anyway, I suggest to use the dirty solution for OWRT, but I am pretty sure that will never be able to go upstream.

1 Like

There has been considerable progress on the rtl9300. Offloading of both routing and traffic filtering works, making this spectacularly fast (multi-gbit wirespeed). I could get the 3 Aquantia PHYs working up to 5GBit on the XGS1250. The 2 2.5 GBit ports on the XGS1210 work flawlessly. What does not (yet) work is the 10GBit SFP+ ports on both models and the 10GBit mode on the 3 multi-gbit ports on the XGS1250. The reason is that the 10GBit mode needs a calibration based on the actual cable or fibre used. In the SDK there are even different sets of initial calibrations for direct attach cables of the SFP+ port depending on the cable length (.5m, 1m, 2m, 5m). Code for this is in the SDK but it is complicated and I do not understand it due to my lack of technical knowledge of eye-diagrams and timings for such ethernet speeds. Also not working yet is the fan on the XGS1250, which seems to be simply a PWM on a GPIO, but I did not really try, I simply unplugged it. I would suggest to bye the device, unless you really need a 10GBit fibre port.

3 Likes

Thanks a bunch! Goes on the list then :slight_smile:

I finally had the time to create a PR with the latest features: packet filtering offload and L3 routing offload as well as 10G support. Please test:

I also want to draw your attention to some more exiting work by brainslayer together with @blogic building on this:

He has started with RTL931x support and Link Aggregation finally works!

5 Likes

Hi kobi,
I was able to get a serial connection to the ZyXEL GS1900-48 by manually connecting TXD,RXD and GND to a male DB9 RS232 port.

White is the switches TXD, connected to a male DB-9, pin 2 (RXD).
Black is the switches RXD, connected to a male DB-9, pin 3 (TXD).
Purple is GND, connected to GND.
Baudrate is 115200, otherwise standard settings for screen or minicom.
Autoboot is set to 1 second. Pressing space multiple times before the autoboot prompt works for me.

I'm currently compiling your master branch. I'll probably test it tomorrow.

Edwin

3 Likes

Hi,
so I've tried booting the kernel-initramfs via tftpboot. I also tried flashing it via the OEM webinterface, for which I had to patch the image Makefile (same as Default/gs1900, using UIMAGE_MAGIC and ZYXEL_VERS and a customized KERNEL_INITRAMFS, but I'm not sure whether both were necessary).
Unfortunately, the kernel hangs after random: fast init done and then comes back with random: crng init done only to freeze completely. There's no reaction to keypresses and network also does not seem to come up. The behaviour and (kernel) log is the same with both methods.

Boot log
II: Copied Preloader data from 0x9fc00000(15804B) to 0x9f000000.
II: Cleared Preloader BSS section at 0x9f003dbc(0B).
II: PLL...�II: PLL is set by SW... OK
Setting DTR
II: DRAM is set by software calibration... PASSED

DCDR(0xb8001060):0x80000000
DIDER(0xb8001050):0x80800000
MCR (0xb8001000):0x200421e0, 0x21220000, 0x65533b30, 0x05050313
DTR2(0xb8001010):0x08311000
PHY Registers(0xb8001500):
0xb8001500:0x80060730, 0x0000007f, 0xa1a00000, 0xffffffff
0xb8001510:0x00180c00, 0x00180c00, 0x001a0d00, 0x00160b00
0xb8001520:0x001a0d00, 0x00160b00, 0x001a0d00, 0x00160b00
0xb8001530:0x00180c00, 0x001a0d00, 0x00160b00, 0x00180c00
0xb8001540:0x00180c00, 0x00180c00, 0x00160b00, 0x00180c00
0xb8001550:0x00180c00, 0x00180c00, 0x001a0d00, 0x00160b00
0xb8001560:0x00180c00, 0x00160b00, 0x001a0d00, 0x00160b00
0xb8001570:0x00180c00, 0x00180c00, 0x00160b00, 0x00180c00
0xb8001580:0x00180c00, 0x00180c00, 0x00160b00, 0x00180c00
0xb8001590:0x00000000, 0x81810505, 0x02000820, 0x50505858
0xb80015a0:0x5a5a4a4a, 0x00000000, 0x00000000, 0x00000000
II: Selected DRAM model #0.
II: Copying U-Boot from 0x9fc03dbc(225728B) to 0x83f00000... OK
II: NOR SPI Flash... searching flash parameters... supported flash ID: [c22018][c22018][c22018]... detected flash ID: [c22018]... OK


U-Boot 1.0.2-svn45936 (Jan 15 2014 - 16:30:16)

Board: RTL839x CPU:750MHz LXB:200MHz MEM:400MHz
DRAM:  128 MB
SPI-F: 1x16 MB
Loading 1024B env. variables from offset 0x40000
Switch Model: ZyXEL_GS1900_48 (Port Count: 50)
Switch Chip: RTL8393M
Model Info: 83936802
### RTL8218B config - MAC ID = 0 ###
### RTL8218B config - MAC ID = 8 ###
### RTL8218B config - MAC ID = 16 ###
### RTL8218B config - MAC ID = 24 ###
### RTL8218B config - MAC ID = 32 ###
### RTL8218B config - MAC ID = 40 ###
PHY[0]: disable EEE
PHY[1]: disable EEE
PHY[2]: disable EEE
PHY[3]: disable EEE
PHY[4]: disable EEE
PHY[5]: disable EEE
PHY[6]: not supported in EEE
Net:   Net Initialization Skipped
rtl8390#0
Hit any key to stop autoboot:  1  0 
RTL839x#     setenv bootargs console=ttyS0,115200 console=ttyS1,115200 mem=128M;
RTL839x# setenv ipaddr 192.168.2.16;
RTL839x# setenv serverip 192.168.2.8;
RTL839x# rtk network on;
Enable network
Please wait for PHY init-time ...

RTL839x# tftpboot 0x84f00000 zyxel/kinit.bin
Using rtl8390#0 device
TFTP from server 192.168.2.8; our IP address is 192.168.2.16
Filename 'zyxel/kinit.bin'.
Load address: 0x84f00000
Loading: *#################################################################
	 ####################################T #############################
	 #################################################################
	 #################################################################
	 #################################################################
	 #################################################################
	 ########################
done
Bytes transferred = 6066589 (5c919d hex)
RTL839x# bootm
## Booting kernel from Legacy Image at 84f00000 ...
   Image Name:   MIPS OpenWrt Linux-5.4.143
   Created:      2021-09-04   6:39:45 UTC
   Image Type:   MIPS Linux Kernel Image (gzip compressed)
   Data Size:    6066525 Bytes = 5.8 MB
   Load Address: 80000000
   Entry Point:  80000400
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK

Starting kernel ...

[    0.000000] Linux version 5.4.143 (edwin@medusa) (gcc version 10.3.0 (OpenWrt GCC 10.3.0 r17476-27a99e40f7)) #0 Sat Sep 4 06:39:45 2021
[    0.000000] RTL838X model is ffffffff
[    0.000000] RTL839X model is 83936802
[    0.000000] SoC Type: RTL8393
[    0.000000] Kernel command line: console=ttyS0,115200 console=ttyS1,115200 mem=128M 
[    0.000000] printk: bootconsole [early0] enabled
[    0.000000] CPU0 revision is: 00019555 (MIPS 34Kc)
[    0.000000] MIPS: machine is Zyxel GS1900-48
[    0.000000] Registering _machine_restart
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] Using appended Device Tree.
[    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] On node 0 totalpages: 32768
[    0.000000]   Normal zone: 288 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 32768 pages, LIFO batch:7
[    0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
[    0.000000] pcpu-alloc: [0] 0 
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 32480
[    0.000000] Kernel command line: console=ttyS0,115200
[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear)
[    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
[    0.000000] Writing ErrCtl register=00000003
[    0.000000] Readback ErrCtl register=00000003
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 114804K/131072K available (5078K kernel code, 166K rwdata, 1104K rodata, 8364K init, 199K bss, 16268K reserved, 0K cma-reserved)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] NR_IRQS: 32
[    0.000000] random: get_random_bytes called from start_kernel+0x288/0x468 with crng_init=0
[    0.000000] timer_probe: no matching timers found
[    0.000000] CPU frequency from device tree: 700MHz
[    0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 5460744132 ns
[    0.000008] sched_clock: 32 bits at 350MHz, resolution 2ns, wraps every 6135667710ns
[    0.009211] Calibrating delay loop... 464.48 BogoMIPS (lpj=2322432)
[    0.076465] pid_max: default: 32768 minimum: 301
[    0.082095] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.090673] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.106989] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.118580] futex hash table entries: 256 (order: -1, 3072 bytes, linear)
[    0.126674] pinctrl core: initialized pinctrl subsystem
[    0.133380] NET: Registered protocol family 16
[    0.170149] workqueue: max_active 576 requested for napi_workq is out of range, clamping between 1 and 512
[    0.185194] clocksource: Switched to clocksource MIPS
[    0.192286] NET: Registered protocol family 2
[    0.197506] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear)
[    0.206639] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
[    0.216516] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.225506] TCP bind hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.233804] TCP: Hash tables configured (established 1024 bind 1024)
[    0.241475] UDP hash table entries: 256 (order: 0, 4096 bytes, linear)
[    0.249175] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes, linear)
[    0.257682] NET: Registered protocol family 1
[    0.420351] workingset: timestamp_bits=14 max_order=15 bucket_order=1
[    0.435447] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.442246] jffs2: version 2.2 (NAND) (SUMMARY) (ZLIB) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    0.475165] pinctrl-single bb001000.pinmux: 32 pins, size 4
[    0.482067] Probing RTL8231 GPIOs
[    0.485943] rtl8231_init called, MDIO bus ID: 3
[    0.496427] Probing RTL838X GPIOs
[    0.537144] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
[    0.545652] printk: console [ttyS0] disabled
[    0.550646] b8002000.uart: ttyS0 at MMIO 0xb8002000 (irq = 31, base_baud = 12500000) is a 16550A
[    0.561052] printk: console [ttyS0] enabled
[    0.561052] printk: console [ttyS0] enabled
[    0.570963] printk: bootconsole [early0] disabled
[    0.570963] printk: bootconsole [early0] disabled
[    0.582960] b8002100.uart: ttyS1 at MMIO 0xb8002100 (irq = 30, base_baud = 12500000) is a 16550A
[    0.734079] brd: module loaded
[    0.738160] Initializing rtl838x_nor_driver
[    0.743170] SPI resource base is b8001200
[    0.747997] Address mode is 3 bytes
[    0.752145] rtl838x_nor_init called
[    0.761297] rtl838x-nor b8001200.spi: mx25l12805d (16384 Kbytes)
[    0.768575] 7 fixed-partitions partitions found on MTD device rtl838x_nor
[    0.776709] Creating 7 MTD partitions on "rtl838x_nor":
[    0.782954] 0x000000000000-0x000000040000 : "u-boot"
[    0.789976] 0x000000040000-0x000000050000 : "u-boot-env"
[    0.797421] 0x000000050000-0x000000060000 : "u-boot-env2"
[    0.804863] 0x000000060000-0x000000160000 : "jffs"
[    0.811678] 0x000000160000-0x000000260000 : "jffs2"
[    0.818575] 0x000000260000-0x000000930000 : "runtime"
[    0.836137] 0x000000930000-0x000001000000 : "runtime2"
[    0.844088] libphy: Fixed MDIO Bus: probed
[    0.851118] Probing RTL838X eth device pdev: 87c9aa00, dev: 87c9aa10
[    0.861028] Found SoC ID: 8393: RTL8393, family 8390
[    0.867023] Using MAC 0000588bf3fe05d5
[    0.871669] libphy: rtl839x-eth-mdio: probed
[    1.558020] rtl8393_serdes_probe: id: 48
[    1.562712] Realtek RTL8393 SERDES mdio-bus:30: Detected internal RTL8390 SERDES
[    1.584358] rtl8393_serdes_probe: id: 49
[    1.589099] Realtek RTL8393 SERDES mdio-bus:31: Detected internal RTL8390 SERDES
[    1.600417] NET: Registered protocol family 10
[    1.610836] Segment Routing with IPv6
[    1.615381] NET: Registered protocol family 17
[    1.620996] 8021q: 802.1Q VLAN Support v1.8
[    1.626858] i2c-gpio i2c-gpio-0: Slow GPIO pins might wreak havoc into I2C/SMBus bus timing
[    1.637024] i2c-gpio i2c-gpio-0: using lines 184 (SDA) and 185 (SCL)
[    1.644893] i2c-gpio i2c-gpio-1: Slow GPIO pins might wreak havoc into I2C/SMBus bus timing
[    1.655066] i2c-gpio i2c-gpio-1: using lines 190 (SDA) and 191 (SCL)
[    1.662956] libphy: SFP I2C Bus: probed
[    1.667943] sfp sfp-p9: Host maximum power 1.0W
[    1.673762] libphy: SFP I2C Bus: probed
[    1.678773] sfp sfp-p10: Host maximum power 1.0W
[    2.595182] random: fast init done
[  133.795239] random: crng init done

Have a look at https://github.com/openwrt/openwrt/pull/4535 and https://gitlab.com/bkoblitz/openwrt-rtl838x/-/tree/rtl839x (I'd suggest trying to import the device specifics into the new PR#4535.

1 Like

Yes, indeed that PR#4535 was actually continuously tested with the Zyxel GS-1900-48 as my RTL839x test device. Just clone my repository, checkout branch merge_pie (which corresponds to the PR), and then add the device-specific .dts, which you can find here:

and the image makefile I use is here:

The device support is not in the PR because I do not have a way of installing the image without opening the device. There is also a fan, which I did not investigate how to control. So I unplugged it because for my tests with maybe 3 Ethernet ports and an SFP port used, a fan is very likely not necessary (and would probably have considerably driven up the number of bugs due to its annoying sound).

Here is a boot-log:

3 Likes

@kobi I checked out merge_pie and then checked out the image Makefile and the dts dir from the xgs1250 branch. Boot still hangs at the same step:

Boot log
II: Copied Preloader data from 0x9fc00000(15804B) to 0x9f000000.
II: Cleared Preloader BSS section at 0x9f003dbc(0B).
II: PLL...�II: PLL is set by SW... OK
Setting DTR
II: DRAM is set by software calibration... PASSED

DCDR(0xb8001060):0x80000000
DIDER(0xb8001050):0x80800000
MCR (0xb8001000):0x200421e0, 0x21220000, 0x65533b30, 0x05050313
DTR2(0xb8001010):0x08311000
PHY Registers(0xb8001500):
0xb8001500:0x80060730, 0x0000007f, 0xa1a00000, 0xffffffff
0xb8001510:0x00180c00, 0x00180c00, 0x001a0d00, 0x00180c00
0xb8001520:0x001a0d00, 0x00160b00, 0x001a0d00, 0x00160b00
0xb8001530:0x00180c00, 0x001a0d00, 0x00160b00, 0x00180c00
0xb8001540:0x00180c00, 0x00180c00, 0x00160b00, 0x00180c00
0xb8001550:0x00180c00, 0x00180c00, 0x001a0d00, 0x00160b00
0xb8001560:0x00180c00, 0x00160b00, 0x001a0d00, 0x00160b00
0xb8001570:0x00180c00, 0x00180c00, 0x00160b00, 0x00180c00
0xb8001580:0x00180c00, 0x00180c00, 0x00160b00, 0x00180c00
0xb8001590:0x00000000, 0x89810525, 0x20202020, 0x5050505a
0xb80015a0:0x5a5a4a4a, 0x00000000, 0x00000000, 0x00000000
II: Selected DRAM model #0.
II: Copying U-Boot from 0x9fc03dbc(225728B) to 0x83f00000... OK
II: NOR SPI Flash... searching flash parameters... supported flash ID: [c22018][c22018][c22018]... detected flash ID: [c22018]... OK


U-Boot 1.0.2-svn45936 (Jan 15 2014 - 16:30:16)

Board: RTL839x CPU:750MHz LXB:200MHz MEM:400MHz
DRAM:  128 MB
SPI-F: 1x16 MB
Loading 1024B env. variables from offset 0x40000
Switch Model: ZyXEL_GS1900_48 (Port Count: 50)
Switch Chip: RTL8393M
Model Info: 83936802
### RTL8218B config - MAC ID = 0 ###
### RTL8218B config - MAC ID = 8 ###
### RTL8218B config - MAC ID = 16 ###
### RTL8218B config - MAC ID = 24 ###
### RTL8218B config - MAC ID = 32 ###
### RTL8218B config - MAC ID = 40 ###
PHY[0]: disable EEE
PHY[1]: disable EEE
PHY[2]: disable EEE
PHY[3]: disable EEE
PHY[4]: disable EEE
PHY[5]: disable EEE
PHY[6]: not supported in EEE
Net:   Net Initialization Skipped
rtl8390#0
Hit any key to stop autoboot:  1  0 
RTL839x#         setenv bootargs console=ttyS0,115200 mem=128M;
RTL839x# setenv ipaddr 192.168.2.16;
RTL839x# setenv serverip 192.168.2.8;
RTL839x# rtk network on;
Enable network
Please wait for PHY init-time ...

RTL839x# tftpboot 0x84f00000 zyxel/kinit.bin;
Using rtl8390#0 device
TFTP from server 192.168.2.8; our IP address is 192.168.2.16
Filename 'zyxel/kinit.bin'.
Load address: 0x84f00000
Loading: *#################################################################
	 #################################################################
	 #################################################################
	 #################################################################
	 #################################################################
	 #################################################################
	 ######################
done
Bytes transferred = 6043794 (5c3892 hex)
RTL839x# bootm
## Booting kernel from Legacy Image at 84f00000 ...
   Image Name:   MIPS OpenWrt Linux-5.4.143
   Created:      2021-09-11   8:16:17 UTC
   Image Type:   MIPS Linux Kernel Image (gzip compressed)
   Data Size:    6043730 Bytes = 5.8 MB
   Load Address: 80000000
   Entry Point:  80000400
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK

Starting kernel ...

[    0.000000] Linux version 5.4.143 (edwin@medusa) (gcc version 10.3.0 (OpenWrt GCC 10.3.0 r17476-27a99e40f7)) #0 Sat Sep 11 08:16:17 2021
[    0.000000] RTL838X model is ffffffff
[    0.000000] RTL839X model is 83936802
[    0.000000] SoC Type: RTL8393
[    0.000000] Kernel command line: console=ttyS0,115200 mem=128M 
[    0.000000] printk: bootconsole [early0] enabled
[    0.000000] CPU0 revision is: 00019555 (MIPS 34Kc)
[    0.000000] MIPS: machine is Zyxel GS1900-48
[    0.000000] Registering _machine_restart
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] Using appended Device Tree.
[    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
[    0.000000] On node 0 totalpages: 32768
[    0.000000]   Normal zone: 288 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 32768 pages, LIFO batch:7
[    0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
[    0.000000] pcpu-alloc: [0] 0 
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 32480
[    0.000000] Kernel command line: console=ttyS0,115200
[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes, linear)
[    0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
[    0.000000] Writing ErrCtl register=000297f0
[    0.000000] Readback ErrCtl register=000297f0
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 114868K/131072K available (5122K kernel code, 169K rwdata, 1116K rodata, 8240K init, 199K bss, 16204K reserved, 0K cma-reserved)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] NR_IRQS: 32
[    0.000000] random: get_random_bytes called from start_kernel+0x288/0x468 with crng_init=0
[    0.000000] timer_probe: no matching timers found
[    0.000000] CPU frequency from device tree: 700MHz
[    0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 5460744132 ns
[    0.000008] sched_clock: 32 bits at 350MHz, resolution 2ns, wraps every 6135667710ns
[    0.009211] Calibrating delay loop... 464.48 BogoMIPS (lpj=2322432)
[    0.076462] pid_max: default: 32768 minimum: 301
[    0.082092] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.090664] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.106681] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.118269] futex hash table entries: 256 (order: -1, 3072 bytes, linear)
[    0.126369] pinctrl core: initialized pinctrl subsystem
[    0.133084] NET: Registered protocol family 16
[    0.169923] workqueue: max_active 576 requested for napi_workq is out of range, clamping between 1 and 512
[    0.184951] clocksource: Switched to clocksource MIPS
[    0.192078] NET: Registered protocol family 2
[    0.197302] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear)
[    0.206432] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
[    0.216309] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.225302] TCP bind hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.233598] TCP: Hash tables configured (established 1024 bind 1024)
[    0.241266] UDP hash table entries: 256 (order: 0, 4096 bytes, linear)
[    0.248968] UDP-Lite hash table entries: 256 (order: 0, 4096 bytes, linear)
[    0.257471] NET: Registered protocol family 1
[    0.419211] workingset: timestamp_bits=14 max_order=15 bucket_order=1
[    0.434198] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.441062] jffs2: version 2.2 (NAND) (SUMMARY) (ZLIB) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    0.473534] pinctrl-single bb001000.pinmux: 32 pins, size 4
[    0.480440] Probing RTL8231 GPIOs
[    0.484265] rtl8231_init called, MDIO bus ID: 3
[    0.491168] Probing RTL838X GPIOs
[    0.534614] Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
[    0.543161] printk: console [ttyS0] disabled
[    0.548224] b8002000.uart: ttyS0 at MMIO 0xb8002000 (irq = 31, base_baud = 12500000) is a 16550A
[    0.558561] printk: console [ttyS0] enabled
[    0.558561] printk: console [ttyS0] enabled
[    0.568497] printk: bootconsole [early0] disabled
[    0.568497] printk: bootconsole [early0] disabled
[    0.580493] b8002100.uart: ttyS1 at MMIO 0xb8002100 (irq = 30, base_baud = 12500000) is a 16550A
[    0.730716] brd: module loaded
[    0.734724] Initializing rtl838x_nor_driver
[    0.739803] SPI resource base is b8001200
[    0.744581] Address mode is 3 bytes
[    0.748763] rtl838x_nor_init called
[    0.757896] rtl838x-nor b8001200.spi: mx25l12805d (16384 Kbytes)
[    0.765157] 7 fixed-partitions partitions found on MTD device rtl838x_nor
[    0.773261] Creating 7 MTD partitions on "rtl838x_nor":
[    0.779535] 0x000000000000-0x000000040000 : "u-boot"
[    0.786542] 0x000000040000-0x000000050000 : "u-boot-env"
[    0.793941] 0x000000050000-0x000000060000 : "u-boot-env2"
[    0.801475] 0x000000060000-0x000000160000 : "jffs"
[    0.808269] 0x000000160000-0x000000260000 : "jffs2"
[    0.815193] 0x000000260000-0x000000930000 : "runtime"
[    0.832549] 0x000000930000-0x000001000000 : "runtime2"
[    0.840938] libphy: Fixed MDIO Bus: probed
[    0.848178] Probing RTL838X eth device pdev: 87c9aa00, dev: 87c9aa10
[    0.872290] Found SoC ID: 8393: RTL8393, family 8390
[    0.878270] Using MAC 0000588bf3fe05d5
[    0.883141] libphy: rtl839x-eth-mdio: probed
[    1.572281] rtl8393_serdes_probe: id: 48
[    1.577038] Realtek RTL8393 SERDES mdio-bus:30: Detected internal RTL8390 SERDES
[    1.598602] rtl8393_serdes_probe: id: 49
[    1.603297] Realtek RTL8393 SERDES mdio-bus:31: Detected internal RTL8390 SERDES
[    1.614613] NET: Registered protocol family 10
[    1.624917] Segment Routing with IPv6
[    1.629454] NET: Registered protocol family 17
[    1.635166] 8021q: 802.1Q VLAN Support v1.8
[    1.641034] i2c-gpio i2c-gpio-0: Slow GPIO pins might wreak havoc into I2C/SMBus bus timing
[    1.651210] i2c-gpio i2c-gpio-0: using lines 184 (SDA) and 185 (SCL)
[    1.659134] i2c-gpio i2c-gpio-1: Slow GPIO pins might wreak havoc into I2C/SMBus bus timing
[    1.669300] i2c-gpio i2c-gpio-1: using lines 190 (SDA) and 191 (SCL)
[    1.677215] libphy: SFP I2C Bus: probed
[    1.682135] sfp sfp-p9: Host maximum power 1.0W
[    1.688006] libphy: SFP I2C Bus: probed
[    1.692955] sfp sfp-p10: Host maximum power 1.0W
[    2.594937] random: fast init done
[  133.794996] random: crng init done

I noticed in the boot log you posted that your GS1900-48 runs a different u-boot version (2.0.0.59413 (Jul 08 2015 - 10:01:28)) than mine (U-Boot 1.0.2-svn45936 (Jan 15 2014 - 16:30:16)). Also, your kernel prints
[ 0.000000] RTL839X model is 83936806,
while mine prints
[ 0.000000] RTL839X model is 83936802.