ath8327 use mdio only for communicate with ar8327 switch ! I tried to disable ath8327_read and ath8327_write functions, but this only affected an interfaces byte counters.
When I enable/disable an interface, the link is still appeared/disappeared(phy is responsible for this!)
At this moment I have a kernel module that can disarm(writes ret instruction) any of kernel functions.
Hm, if ath8327.ko is not important then dakota_eth.ko and eventually qca_nss_gmac.ko must be the ones to look into.
dakota_eth.ko has ipq40xx_mdio_write and ipq40xx_mdio_read functions
Now I will also try to read from 90000.mdio registers, but from RouterOS kernel module.
Do ether5 disable
ipq_mdio reg0 = 0x150ff
ipq_mdio reg1 = 0x1c01
ipq_mdio reg2 = 0x1200
ipq_mdio reg3 = 0x796d
Do ether5 enable
ipq_mdio reg0 = 0x150ff
ipq_mdio reg1 = 0x1b01
ipq_mdio reg2 = 0x800
ipq_mdio reg3 = 0x7949
Do ether5 disable
ipq_mdio reg0 = 0x150ff
ipq_mdio reg1 = 0x1c01
ipq_mdio reg2 = 0x1200
ipq_mdio reg3 = 0x7949
eth4: phy link up (1000/full)
Do ether5 enable
ipq_mdio reg0 = 0x150ff
ipq_mdio reg1 = 0x1b01
ipq_mdio reg2 = 0x800
ipq_mdio reg3 = 0x7949
So it looks like you were right and it does use an 90000.mdio.
We are very close to solving the problem!
And it looks like we will have to manually set those registers as U-boot usually initialises those.
Hm, maybe we can reuse some existing generic kernel way for it?
There is something else that breaks mdio for U-Boot and the OpenWRT kernel. I think that init is nothing to do with.
Maybe we are using a wrong phy addresses for access to 8075 registers ? U-Boot tries to read PHY ID1 and PHY ID2 from 0x0 phy address ! But RouterOS uses 0x1B and 0x1C !!!
Hm, that is easily possible if Mikrotik did something weird.
I tried to fix U-Boot by giving him instead of addresses 0 and 1, 0x1B and 0x1C. Leds on even empty ports start brinking.
And now U-Boot says:
PHY ID1: 0x4d
PHY ID2: 0xd0b1
Well that makes sense, on my 8dev Jalapeno also prints those 2
PHY ID1: 0x4d
PHY ID2: 0xd0b2
Can you try to tftpboot, then it should print all port adresses in U-boot?
tftpboot is stuck but I continue digging...
port5 disable:
reg1 new val = 0x1c00
reg1 new val = 0x1b01
port5_enable:
reg1 new val = 0x1c00
reg1 new val = 0x1c01
port4 disable:
reg1 new val = 0x1b00
reg1 new val = 0x1c01
port4_enable:
reg1 new val = 0x1b00
reg1 new val = 0x1b01
port3_disable:
reg1 new val = 0x1a00
reg1 new val = 0x1b01
port3_enable:
reg1 new val = 0x1a00
reg1 new val = 0x1a01
port2_disable:
reg1 new val = 0x1900
reg1 new val = 0x1a01
port2_enable:
reg1 new val = 0x1900
reg1 new val = 0x1901
port1_disable:
reg1 new val = 0x1800
reg1 new val = 0x1901
port1 enable:
reg1 new val = 0x1804
reg1 new val = 0x1800
reg1 new val = 0x1801
So. Port1 has phy_id = 0x18, and Port5 has phy_id = 0x1c
RB450Gx4, as a christmas tree, consistently(From Port1 to Port5) ON and OFF a LEDs from the ports.
That is really not standard at all.
Driver has hardcoded values for PHYs.
So adding this would require patching the driver to include different values if DT binding matches.
They are all lighting UP as no configuration has been done.
Leds, speed and everything has to be set and with completely wrong IDs everything fails.
U-Boot blinked for about 5 minutes and print this:
eth0 PHY0 Down Speed :10 Half duplex
eth0 PHY1 Down Speed :10 Half duplex
eth0 PHY2 Down Speed :10 Half duplex
eth0 PHY3 Down Speed :10 Half duplex
eth0 PHY4 Down Speed :10 Half duplex
It prints that when it does not detect that something is connected.
Most likely register location it checks is wrong as most likely everything is offset.
Can you publish your current version of U-boot as I completely messed up my local tree and I really dont know what makes it stop booting since a lot of custom stuff was done in it
diff --git a/Makefile b/Makefile
index 7646c94..ecefc44 100755
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
export BUILD_TOPDIR=$(PWD)
-export STAGING_DIR=/home/lancer/workspace/openwrt/ipq40xx/std/qsdk5/staging_dir
-export TOOLPATH=$(STAGING_DIR)/toolchain-arm_cortex-a7_gcc-4.8-linaro_uClibc-1.0.14_eabi/
+export STAGING_DIR=/home/prog/openwrt/lede-all/2019-openwrt-all/openwrt-ipq4xxx/staging_dir
+export TOOLPATH=$(STAGING_DIR)/toolchain-arm_cortex-a7+neon-vfpv4_gcc-7.4.0_musl_eabi
export PATH:=$(TOOLPATH)/bin:${PATH}
export MAKECMD=make --silent ARCH=arm CROSS_COMPILE=arm-openwrt-linux-
diff --git a/uboot/arch/arm/cpu/armv7/config.mk b/uboot/arch/arm/cpu/armv7/config.mk
index 560c084..5b35c71 100644
--- a/uboot/arch/arm/cpu/armv7/config.mk
+++ b/uboot/arch/arm/cpu/armv7/config.mk
@@ -20,7 +20,7 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
+PLATFORM_RELFLAGS += -fno-common -ffixed-r8
# If armv7-a is not supported by GCC fall-back to armv5, which is
# supported by more tool-chains
diff --git a/uboot/arch/arm/lib/board.c b/uboot/arch/arm/lib/board.c
index 84ff214..8c83076 100755
--- a/uboot/arch/arm/lib/board.c
+++ b/uboot/arch/arm/lib/board.c
@@ -265,6 +265,10 @@ init_fnc_t *init_sequence[] = {
NULL,
};
+#define WDT_BASE 0xB017000
+#define WDT_RST (WDT_BASE + 0x4)
+#define WDT_EN (WDT_BASE + 0x8)
+
void board_init_f(ulong bootflag)
{
bd_t *bd;
@@ -284,6 +288,9 @@ void board_init_f(ulong bootflag)
memset((void *)gd, 0, sizeof(gd_t));
+ writel(0, WDT_EN);
+ writel(1, WDT_RST);
+
gd->mon_len = _bss_end_ofs;
#ifdef CONFIG_OF_EMBED
/* Get a pointer to the FDT */
@@ -298,6 +305,7 @@ void board_init_f(ulong bootflag)
for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
if ((*init_fnc_ptr)() != 0) {
+ printf("AAA! HANG!\n");
hang ();
}
}
@@ -442,7 +450,6 @@ void board_init_f(ulong bootflag)
post_bootmode_init();
post_run(NULL, POST_ROM | post_bootmode_get(0));
#endif
-
gd->bd->bi_baudrate = gd->baudrate;
/* Ram ist board specific, so move it to board code ... */
dram_init_banksize();
@@ -458,10 +465,8 @@ void board_init_f(ulong bootflag)
gd->start_addr_sp = addr_sp;
gd->reloc_off = addr - _TEXT_BASE;
#endif
-
debug("relocation Offset is: %08lx\n", gd->reloc_off);
memcpy(id, (void *)gd, sizeof(gd_t));
-
#ifdef CONFIG_IPQ40XX_XIP
relocate_code(addr_sp, id, _TEXT_BASE);
#else
diff --git a/uboot/board/qcom/ipq40xx_cdp/ipq40xx_board_param.h b/uboot/board/qcom/ipq40xx_cdp/ipq40xx_board_param.h
index 9f84de4..9096f70 100755
--- a/uboot/board/qcom/ipq40xx_cdp/ipq40xx_board_param.h
+++ b/uboot/board/qcom/ipq40xx_cdp/ipq40xx_board_param.h
@@ -1325,7 +1325,7 @@ board_ipq40xx_params_t board_params[] = {
},
{
.machid = MACH_TYPE_IPQ40XX_AP_DK01_1_C1,
- .ddr_size = (256 << 20),
+ .ddr_size = (128 << 20),
.mtdids = "nand2=spi0.0",
.console_uart_cfg = &uart1_console_uart_dk01,
.sw_gpio = sw_gpio_qfn,
diff --git a/uboot/board/qcom/ipq40xx_cdp/ipq40xx_cdp.c b/uboot/board/qcom/ipq40xx_cdp/ipq40xx_cdp.c
index bc1fc57..0906db4 100755
--- a/uboot/board/qcom/ipq40xx_cdp/ipq40xx_cdp.c
+++ b/uboot/board/qcom/ipq40xx_cdp/ipq40xx_cdp.c
@@ -404,6 +404,7 @@ int dram_init(void)
int i;
int mx = ARRAY_SIZE(rtable.parts);
+ printf("dram_init start\n");
if (smem_ram_ptable_init(&rtable) > 0) {
gd->ram_size = 0;
for (i = 0; i < mx; i++) {
@@ -416,6 +417,7 @@ int dram_init(void)
} else {
gd->ram_size = gboard_param->ddr_size;
}
+ printf("dram_init done\n");
return 0;
}
diff --git a/uboot/common/miiphyutil.c b/uboot/common/miiphyutil.c
index 2cc23b4..6969528 100644
--- a/uboot/common/miiphyutil.c
+++ b/uboot/common/miiphyutil.c
@@ -77,6 +77,7 @@ struct mii_dev *miiphy_get_dev_by_name(const char *devname)
void miiphy_init(void)
{
INIT_LIST_HEAD(&mii_devs);
+ printf("miiphy_init\n");
current_mii = NULL;
}
@@ -141,7 +142,7 @@ void miiphy_register(const char *name,
ldev->write = write;
new_dev->priv = ldev;
- debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
+ printf("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
new_dev->name, ldev->read, ldev->write);
/* add it to the list */
@@ -172,6 +173,9 @@ int mdio_register(struct mii_dev *bus)
if (!bus || !bus->name || !bus->read || !bus->write)
return -1;
+ printf("mdio_register: device name '%s'\n",
+ bus->name);
+
/* check if we have unique name */
if (miiphy_get_dev_by_name(bus->name)) {
printf("mdio_register: non unique device name '%s'\n",
diff --git a/uboot/drivers/net/ipq40xx/ipq40xx_edma_eth.c b/uboot/drivers/net/ipq40xx/ipq40xx_edma_eth.c
index 58af88d..68297eb 100755
--- a/uboot/drivers/net/ipq40xx/ipq40xx_edma_eth.c
+++ b/uboot/drivers/net/ipq40xx/ipq40xx_edma_eth.c
@@ -829,6 +829,7 @@ int ipq40xx_edma_init(ipq40xx_edma_board_cfg_t *edma_cfg)
int i;
int ret;
+ printf("OWL Z0 - ipq40xx_edma_init\n");
memset(c_info, 0, (sizeof(c_info) * IPQ40XX_EDMA_DEV));
memset(enet_addr, 0, sizeof(enet_addr));
/* Getting the MAC address from ART partition */
@@ -928,6 +929,7 @@ int ipq40xx_edma_init(ipq40xx_edma_board_cfg_t *edma_cfg)
c_info[i]->q_cinfo[i].rx_status = 0;
c_info[i]->q_cinfo[i].c_info = c_info[i];
+ printf("OWL Z7 - do ipq40xx_sw_mdio_init\n");
ret = ipq40xx_sw_mdio_init(edma_cfg->phy_name);
if (ret)
goto failed;
diff --git a/uboot/drivers/net/ipq40xx/ipq40xx_mdio.c b/uboot/drivers/net/ipq40xx/ipq40xx_mdio.c
index 124def1..ee79b16 100644
--- a/uboot/drivers/net/ipq40xx/ipq40xx_mdio.c
+++ b/uboot/drivers/net/ipq40xx/ipq40xx_mdio.c
@@ -46,6 +46,7 @@ int ipq40xx_mdio_write(int mii_id, int regnum, u16 value)
{
if (ipq40xx_mdio_wait_busy())
return -ETIMEDOUT;
+ mii_id += 0x18;
/* Issue the phy addreass and reg */
writel((mii_id << 8 | regnum),
IPQ40XX_MDIO_BASE + MDIO_CTRL_1_REG);
@@ -69,6 +70,7 @@ int ipq40xx_mdio_write(int mii_id, int regnum, u16 value)
int ipq40xx_mdio_read(int mii_id, int regnum, ushort *data)
{
u32 val;
+ mii_id += 0x18;
if (ipq40xx_mdio_wait_busy())
return -ETIMEDOUT;
@@ -111,6 +113,7 @@ int ipq40xx_phy_read(struct mii_dev *bus,
int ipq40xx_sw_mdio_init(const char *name)
{
struct mii_dev *bus = mdio_alloc();
+ printf("Allocating IPQ MDIO bus\n");
if(!bus) {
printf("Failed to allocate IPQ MDIO bus\n");
return -1;
diff --git a/uboot/drivers/net/ipq40xx/ipq40xx_qca8033.c b/uboot/drivers/net/ipq40xx/ipq40xx_qca8033.c
index db53779..dd7a5dc 100644
--- a/uboot/drivers/net/ipq40xx/ipq40xx_qca8033.c
+++ b/uboot/drivers/net/ipq40xx/ipq40xx_qca8033.c
@@ -105,12 +105,13 @@ int ipq40xx_qca8033_phy_init(struct ipq40xx_eth_dev *info)
phy_data = qca8033_phy_reg_read(0x0, 0x4, QCA8033_PHY_ID2);
printf ("PHY ID2: 0x%x\n", phy_data);
+ printf ("rw start\n");
qca8033_phy_reg_write(0x0, 0x4, 0x1d, 0x5);
qca8033_phy_reg_write(0x0, 0x4, 0x1e, 0x2d47);
qca8033_phy_reg_write(0x0, 0x4, 0x1d, 0xb);
qca8033_phy_reg_write(0x0, 0x4, 0x1e, 0xbc40);
qca8033_phy_reg_write(0x0, 0x4, 0x1d, 0x0);
qca8033_phy_reg_write(0x0, 0x4, 0x1e, 0x82ee);
-
+ printf ("rw end\n");
return 0;
}
diff --git a/uboot/drivers/net/ipq40xx/ipq40xx_qca8075.c b/uboot/drivers/net/ipq40xx/ipq40xx_qca8075.c
index cb04a05..a8db7ea 100644
--- a/uboot/drivers/net/ipq40xx/ipq40xx_qca8075.c
+++ b/uboot/drivers/net/ipq40xx/ipq40xx_qca8075.c
@@ -733,6 +733,7 @@ int ipq40xx_qca8075_phy_init(struct ipq40xx_eth_dev *info)
printf ("PHY ID2: 0x%x\n", phy_data);
qca8075_id = (qca8075_id << 16) | phy_data;
+ printf ("qca8075_id = %x\n", qca8075_id);
if (qca8075_id == QCA8075_PHY_V1_0_5P) {
phy_data = qca8075_phy_mmd_read(0, PSGMII_ID,
QCA8075_PHY_MMD1_NUM, QCA8075_PSGMII_FIFI_CTRL);
@@ -740,6 +741,7 @@ int ipq40xx_qca8075_phy_init(struct ipq40xx_eth_dev *info)
qca8075_phy_mmd_write(0, PSGMII_ID, QCA8075_PHY_MMD1_NUM,
QCA8075_PSGMII_FIFI_CTRL, phy_data);
}
+ printf ("OWL X1\n");
/*
* Enable AZ transmitting ability
@@ -748,6 +750,7 @@ int ipq40xx_qca8075_phy_init(struct ipq40xx_eth_dev *info)
QCA8075_PSGMII_MODE_CTRL,
QCA8075_PHY_PSGMII_MODE_CTRL_ADJUST_VALUE);
+ printf ("OWL X2\n");
/*
* Enable phy power saving function by default
*/
@@ -763,10 +766,11 @@ int ipq40xx_qca8075_phy_init(struct ipq40xx_eth_dev *info)
qca8075_phy_set_hibernate(0x0, phy_id, 0x1);
}
}
+ printf ("OWL X3\n");
phy_data = qca8075_phy_mmd_read(0, 4, QCA8075_PHY_MMD3_NUM, 0x805a);
phy_data &= (~(1 << 1));
qca8075_phy_mmd_write(0, 4, QCA8075_PHY_MMD3_NUM, 0x805a, phy_data);
-
+ printf ("OWL END\n");
return 0;
}
diff --git a/uboot/include/configs/ipq40xx_cdp.h b/uboot/include/configs/ipq40xx_cdp.h
index 5cb0fb2..25a94e4 100755
--- a/uboot/include/configs/ipq40xx_cdp.h
+++ b/uboot/include/configs/ipq40xx_cdp.h
@@ -46,9 +46,15 @@
#endif
#endif /* !DO_DEPS_ONLY */
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_ATHEROS 1
+//#define CONFIG_BITBANGMII
+//#define CONFIG_BITBANGMII_MULTI
+
#define CONFIG_CMD_HTTPD
#define CONFIG_GL_CHECK_ART
#define CONFIG_RESET_DEFAULT_ENV
+#define CONFIG_CMD_LOADB
#define CONFIG_IPQ40XX
#define CONFIG_BOARD_EARLY_INIT_F
@@ -88,9 +94,13 @@
#define CONFIG_TLV_DUMP_SIZE 0x10000
#define CONFIG_SYS_SDRAM_BASE 0x80000000
-#define CONFIG_SYS_TEXT_BASE 0x87300000
+//#define CONFIG_SYS_TEXT_BASE 0x87300000
+//#define CONFIG_SYS_TEXT_BASE 0x80000000
+//#define CONFIG_SYS_TEXT_BASE 0x80900000
+#define CONFIG_SYS_TEXT_BASE 0x80B00000
#define CONFIG_SYS_SDRAM_SIZE 0x10000000
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0x100000 - GENERATED_GBL_DATA_SIZE)
+//#define CONFIG_SYS_INIT_SP_ADDR (0x87300000)
#define CONFIG_MAX_RAM_BANK_SIZE CONFIG_SYS_SDRAM_SIZE
#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + (64 << 20))
#define CONFIG_DTB_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + (96 << 20))
@@ -270,8 +280,8 @@ typedef struct {
#define CONFIG_QCA8033_PHY 1
#define CONFIG_MII
#define CONFIG_CMD_MII
-#define CONFIG_IPADDR 192.168.1.1
-#define CONFIG_SERVERIP 192.168.1.2
+#define CONFIG_IPADDR 172.20.1.3
+#define CONFIG_SERVERIP 172.20.1.77
#define CONFIG_IPQ_NO_MACS 2
/*
* CRASH DUMP ENABLE