Boot console log:
MT7621 stage1 code 10:33:55 (ASIC)
CPU=500000000 HZ BUS=125000000 HZ
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL3 FB_DL: 0x7, 1/0 = 540/484 1D000000
PLL4 FB_DL: 0x13, 1/0 = 513/511 4D000000
PLL2 FB_DL: 0x17, 1/0 = 641/383 5D000000
do DDR setting..[01F40000]
Apply DDR3 Setting...(use customer AC)
0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
--------------------------------------------------------------------------------
0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000E:| 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1
000F:| 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0
0010:| 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0
0011:| 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
rank 0 coarse = 16
rank 0 fine = 40
B:| 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0
opt_dle value:11
DRAMC_R0DELDLY[018]=00001F1E
RX DQS perbit delay software calibration
1.0-15 bit dq delay value
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 9 6 7 7 6 6 7 4 4 7
10 | 6 9 9 11 7 9
2.dqs window
x=pass dqs delay value (min~max)center
y=0-7bit DQ of every group
input delay:DQS0 =30 DQS1 = 31
bit DQS0 bit DQS1
0 (1~58)29 8 (1~55)28
1 (1~58)29 9 (1~60)30
2 (1~58)29 10 (1~57)29
3 (1~58)29 11 (1~58)29
4 (1~57)29 12 (1~61)31
5 (1~58)29 13 (1~59)30
6 (1~58)29 14 (1~60)30
7 (1~60)30 15 (1~61)31
3.dq delay value last
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 10 7 8 8 7 7 8 4 7 8
10 | 8 11 9 12 8 9
TX perbyte calibration
DQS loop = 15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1
dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2
DQ loop=15, cmp_err_1 = ffff00aa
dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=1
DQ loop=14, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=14, finish count=2
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
20,data:88
[EMI] DRAMC calibration passed
MT7621 stage1 code done
CPU=500000000 HZ BUS=125000000 HZ
U-Boot 1.1.3 (Nov 7 2017 - 16:05:28)
Board: Ralink APSoC DRAM: 128 MB
relocate_code Pointer at: 87fa0000
************** Init GPIO Pin Start **************
************** Init GPIO Pin Done **************
Config XHCI 40M PLL
flash manufacture id: c2, device id 20 18
find flash: MX25L12805D
Ralink UBoot Version: 5.0.3.0
--------------------------------------------
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection
DRAM_TYPE: DDR3
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/4
Flash component: SPI Flash
Date:Nov 7 2017 Time:16:05:28
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768
##### The CPU freq = 880 MHZ ####
estimate memory size =128 Mbytes
#Reset_MT7530
set LAN/WAN WLLLL
default: 3
2 1 0
3: System Boot system code via Flash.
## Booting image at bc050000 ...
Magic number at 0xBC050000
Image Name: Linux Kernel Image
Image Type: MIPS Linux Kernel Image (lzma compressed)
Data Size: 6539893 Bytes = 6.2 MB
Load Address: 81001000
Entry Point: 81438aa0
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 81438aa0) ...
## Giving linux memsize in MB, 128
Starting kernel ...
LINUX started...
THIS IS ASIC
SDK 5.0.S.0
Linux version 3.10.14+ (root@localhost.localdomain) (gcc version 4.6.3 (Buildroot 2012.11.1) ) #135 SMP Fri Sep 7 16:08:06 CST 2018
The CPU feqenuce set to 880 MHz
GCMP present
CPU0 revision is: 0001992f (MIPS 1004Kc)
Software DMA cache coherency
Determined physical RAM map:
memory: 08000000 @ 00000000 (usable)
Initrd not found or empty - disabling initrd
Zone ranges:
DMA [mem 0x00000000-0x00ffffff]
Normal [mem 0x01000000-0x07ffffff]
Movable zone start for each node
Early memory node ranges
node 0: [mem 0x00000000-0x07ffffff]
Detected 3 available secondary CPU(s)
Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
PERCPU: Embedded 7 pages/cpu @81b5b000 s6912 r8192 d13568 u32768
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512
Kernel command line: console=ttyS1,57600n8 root=/dev/ram0 console=ttyS0
PID hash table entries: 512 (order: -1, 2048 bytes)
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Writing ErrCtl register=000100ba
Readback ErrCtl register=000100ba
Memory: 119220k/131072k available (4364k kernel code, 11852k reserved, 1459k data, 4472k init, 0k highmem)
Hierarchical RCU implementation.
NR_IRQS:128
console [ttyS1] enabled
Calibrating delay loop... 577.53 BogoMIPS (lpj=1155072)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
launch: starting cpu1
launch: cpu1 gone!
CPU1 revision is: 0001992f (MIPS 1004Kc)
Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
Synchronize counters for CPU 1: done.
launch: starting cpu2
launch: cpu2 gone!
CPU2 revision is: 0001992f (MIPS 1004Kc)
Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
Synchronize counters for CPU 2: done.
launch: starting cpu3
launch: cpu3 gone!
CPU3 revision is: 0001992f (MIPS 1004Kc)
Primary instruction cache 32kB, 4-way, VIPT, linesize 32 bytes.
Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
Synchronize counters for CPU 3: done.
Brought up 4 CPUs
devtmpfs: initialized
NET: Registered protocol family 16
release PCIe RST: RALINK_RSTCTRL = 7000000
PCIE PHY initialize
***** Xtal 40MHz *****
start MT7621 PCIe register access
RALINK_RSTCTRL = 7000000
RALINK_CLKCFG1 = 77ffeff8
*************** MT7621 PCIe RC mode *************
PCIE2 no card, disable it(RST&CLK)
pcie_link status = 0x3
RALINK_RSTCTRL= 3000000
*** Configure Device number setting of Virtual PCI-PCI bridge ***
RALINK_PCI_PCICFG_ADDR = 21007f2 -> 21007f2
PCIE0 enabled
PCIE1 enabled
interrupt enable status: 300000
Port 1 N_FTS = 1b105000
Port 0 N_FTS = 1b105000
config reg done
init_rt2880pci done
bio: create slab <bio-0> at 0
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [mem 0x60000000-0x6fffffff]
pci_bus 0000:00: root bus resource [io 0x1e160000-0x1e16ffff]
pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
pci 0000:00:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
pci 0000:00:00.0: BAR 0: can't assign mem (size 0x80000000)
pci 0000:00:01.0: BAR 0: can't assign mem (size 0x80000000)
pci 0000:00:00.0: BAR 8: assigned [mem 0x60000000-0x600fffff]
pci 0000:00:01.0: BAR 8: assigned [mem 0x60100000-0x601fffff]
pci 0000:00:00.0: BAR 1: assigned [mem 0x60200000-0x6020ffff]
pci 0000:00:01.0: BAR 1: assigned [mem 0x60210000-0x6021ffff]
pci 0000:01:00.0: BAR 0: assigned [mem 0x60000000-0x600fffff 64bit]
pci 0000:00:00.0: PCI bridge to [bus 01]
pci 0000:00:00.0: bridge window [mem 0x60000000-0x600fffff]
pci 0000:02:00.0: BAR 0: assigned [mem 0x60100000-0x601fffff 64bit]
pci 0000:00:01.0: PCI bridge to [bus 02]
pci 0000:00:01.0: bridge window [mem 0x60100000-0x601fffff]
PCI: Enabling device 0000:00:00.0 (0004 -> 0006)
PCI: Enabling device 0000:00:01.0 (0004 -> 0006)
BAR0 at slot 0 = 0
bus=0x0, slot = 0x0
res[0]->start = 0
res[0]->end = 0
res[1]->start = 60200000
res[1]->end = 6020ffff
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
BAR0 at slot 1 = 0
bus=0x0, slot = 0x1
res[0]->start = 0
res[0]->end = 0
res[1]->start = 60210000
res[1]->end = 6021ffff
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
bus=0x1, slot = 0x0, irq=0x4
res[0]->start = 60000000
res[0]->end = 600fffff
res[1]->start = 0
res[1]->end = 0
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
bus=0x2, slot = 0x1, irq=0x18
res[0]->start = 60100000
res[0]->end = 601fffff
res[1]->start = 0
res[1]->end = 0
res[2]->start = 0
res[2]->end = 0
res[3]->start = 0
res[3]->end = 0
res[4]->start = 0
res[4]->end = 0
res[5]->start = 0
res[5]->end = 0
Switching to clocksource MIPS
NET: Registered protocol family 2
TCP established hash table entries: 1024 (order: 1, 8192 bytes)
TCP bind hash table entries: 1024 (order: 1, 8192 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP: reno registered
UDP hash table entries: 256 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
NET: Registered protocol family 1
4 CPUs re-calibrate udelay(lpj = 1167360)
fuse init (API version 7.22)
msgmni has been set to 232
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254)
io scheduler noop registered (default)
Serial: 8250/16550 driver, 2 ports, IRQ sharing disabled
serial8250: ttyS0 at MMIO 0x1e000d00 (irq = 27) is a 16550A
serial8250: ttyS1 at MMIO 0x1e000c00 (irq = 26) is a 16550A
brd: module loaded
flash manufacture id: c2, device id 20 18
MX25L12805D(c2 2018c220) (16384 Kbytes)
mtd .name = raspi, .size = 0x01000000 (16M) .erasesize = 0x00010000 (64K) .numeraseregions = 0
Creating 7 MTD partitions on "raspi":
0x000000000000-0x000000030000 : "Bootloader"
0x000000030000-0x000000040000 : "Config"
0x000000040000-0x000000050000 : "Factory"
0x000000050000-0x000000a50000 : "Uimage"
0x000000a50000-0x000000fd0000 : "Reserved"
0x000000fd0000-0x000000ff0000 : "nvram"
0x000000ff0000-0x000001000000 : "hwconfig"
IMQ driver loaded successfully. (numdevs = 2, numqueues = 1)
Hooking IMQ after NAT on PREROUTING.
Hooking IMQ before NAT on POSTROUTING.
tun: Universal TUN/TAP device driver, 1.6
tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
PPP generic driver version 2.4.2
PPP BSD Compression module registered
PPP MPPE Compression module registered
NET: Registered protocol family 24
PPTP driver version 0.8.5
rdm_major = 253
GMAC1_MAC_ADRH -- : 0x0000000c
GMAC1_MAC_ADRL -- : 0x432880a2
Ralink APSoC Ethernet Driver Initilization. v3.1 1024 rx/tx descriptors allocated, mtu = 1500!
GMAC1_MAC_ADRH -- : 0x0000000c
GMAC1_MAC_ADRL -- : 0x432880c3
PROC INIT OK!
*****run project phy.
FM_OUT value: u4FmOut = 0(0x00000000)
xhci-hcd xhci-hcd: xHCI Host Controller
xhci-hcd xhci-hcd: new USB bus registered, assigned bus number 1
xhci-hcd xhci-hcd: irq 22, io mem 0x1e1c0000
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 2 ports detected
xhci-hcd xhci-hcd: xHCI Host Controller
xhci-hcd xhci-hcd: new USB bus registered, assigned bus number 2
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 1 port detected
usbcore: registered new interface driver usb-storage
Ralink APSoC Hardware Watchdog Timer
GACT probability on
Mirror/redirect action on
Failed to load ipt action
Simple TC action Loaded
netem: version 1.3
u32 classifier
Performance counters on
input device check on
Actions configured
Netfilter messages via NETLINK v0.30.
nf_conntrack version 0.5.0 (1862 buckets, 7448 max)
ctnetlink v0.93: registering with nfnetlink.
xt_time: kernel timezone is -0000
gre: GRE over IPv4 demultiplexor driver
ip_tables: (C) 2000-2006 Netfilter Core Team
Type=Restricted Cone
ipt_CLUSTERIP: ClusterIP Version 0.8 loaded successfully
arp_tables: (C) 2002 David S. Miller
TCP: cubic registered
NET: Registered protocol family 17
l2tp_core: L2TP core driver, V2.0
l2tp_ppp: PPPoL2TP kernel driver, V2.0
8021q: 802.1Q VLAN Support v1.8
Freeing unused kernel memory: 4472K (815b2000 - 81a10000)
init started: BusyBox v1.12.1 (2018-08-20 10:11:39 CST)
starting pid 50, tty '': '/etc/init.d/rcS sysinit'
rc ver. 1.0.7
Initializing...Success!
Mounting file systems...Success!
Creating devices...Success!
Creating loopback device...Success!
starting pid 59, tty '': '/etc/init.d/rcS start'
rc ver. edx_gpio: module license 'unspecified' taints kernel.
1.0.7
InitializDisabling lock debugging due to kernel taint
ing...Success!
Initializing EDX GPIO...Loading dynamic Done
libraries...Success!
Acelink events notification ver. 1.6
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=lo hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_UP name=NAME=lo hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=imq0 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=imq1 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=eth2 hold=
NVRAM access daemon Ver. 1.0 Build 20180820101800
daemon<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=teql0 hold=
ize process
Starting L0000Config.so...Device.isDefault = 1
Done ! (ret=0)
[wlan_main:1386]*** wlan_main start
killall: bndstrg: no process killed
register mt_drv
=== pAd = c2b01000, size = 3746832 ===
<-- RTMPAllocAdapterBlock, Status=0
get_wdev_by_idx: invalid idx(0)
pAd->PciHif.CSRBaseAddress =0xc2a00000, csr_addr=0xc2a00000!
get_wdev_by_idx: invalid idx(0)
RTMPInitPCIeDevice():device_id=0x7615
DriverOwn()::Try to Clear FW Own...
DriverOwn()::Success to clear FW Own
mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
RtmpChipOpsHook(493): Not support for HIF_MT yet! MACVersion=0x0
mt7615_init()-->
Use 1st iPAiLNA default bin.
Use 0st /etc_ro/wlan/MT7615E_EEPROM1.bin default bin.
<--mt7615_init()
ChipOpsMCUHook
cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
cut_through_token_list_init(): 85ed8f88,85ed8f88
cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
cut_through_token_list_init(): 85ed8f98,85ed8f98
<-- RTMPAllocTxRxRingMemory, Status=0
=== pAd = c3001000, size = 3746832 ===
<-- RTMPAllocAdapterBlock, Status=0
get_wdev_by_idx: invalid idx(0)
pAd->PciHif.CSRBaseAddress =0xc2f00000, csr_addr=0xc2f00000!
get_wdev_by_idx: invalid idx(0)
RTMPInitPCIeDevice():device_id=0x7615
DriverOwn()::Try to Clear FW Own...
DriverOwn()::Success to clear FW Own
mt_pci_chip_cfg(): HWVer=0x8a10, FWVer=0x8a10, pAd->ChipID=0x7615
mt_pci_chip_cfg(): HIF_SYS_REV=0x76150001
RtmpChipOpsHook(493): Not support for HIF_MT yet! MACVersion=0x0
mt7615_init()-->
Use 2nd iPAiLNA default bin.
Use 1st /etc_ro/wlan/MT7615E_EEPROM2.bin default bin.
<--mt7615_init()
ChipOpsMCUHook
cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
cut_through_token_list_init(): 86a45208,86a45208
cut_through_token_list_init(): TokenList inited done!id_head/tail=0/4096
cut_through_token_list_init(): 86a45218,86a45218
<-- RTMPAllocTxRxRingMemory, Status=0
pci probe count=2
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_POST_INIT name=NAME=ra0 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=ra0 hold=
[readWlConfig<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_POST_INIT name=NAME=rai0 hold=
:342]NULL Device<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=rai0 hold=
.LAN.2G.ShortGI.Enable
[readWlConfig:342]NULL Device.LAN.2G.STBC.Enable
[readWlConfig:342]NULL Device.LAN.2G.Aggregation.Enable
[readWlConfig:342]NULL Device.LAN.2G.Beamforming.Enable
[readWlConfig:342]NULL Device.LAN.2G.MUMiMO.Enable
[readWlConfig:34get_wdev_by_idx: invalid idx(0)
2]NULL Device.LAget_wdev_by_idx: invalid idx(0)
N.2G.0.RS.IPAddrget_wdev_by_idx: invalid idx(0)
ess
[readWlConfget_wdev_by_idx: invalid idx(0)
ig:342]NULL Deviget_wdev_by_idx: invalid idx(0)
ce.LAN.2G.0.RS.Pget_wdev_by_idx: invalid idx(0)
ort
[readWlConfget_wdev_by_idx: invalid idx(0)
ig:342]NULL DeviDriverOwn()::Return since already in Driver Own...
ce.LAN.2G.0.RS.P===============================
assword
[readWlCurrent DevInfo Num: 0
Config:342]NULL ===============================
Device.LAN.2G.0.===============================
RS.Enable
[readCurrent BssInfo Num: 0
WpsConfig:144]NU===============================
LL Device.LAN.2G===============================
.WPS.FriendlyNamCurrent StaRec Num: 0
e
[readWpsConfi===============================
g:144]NULL Devic<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_PRE_UP name=NAME=ra0 hold=
APWdsInitialize():WdsEntry[0]
APWdsInitialize():WdsEntry[1]
APWdsInitialize():WdsEntry[2]
APWdsInitialize():WdsEntry[3]
RtmpOSFileOpen(): Error 2 opening /etc/Wireless/RT2860/RT2860_5G.dat
Open file "/etc/Wireless/RT2860/RT2860_5G.dat" failed!
E2pAccessMode=2
SSID[0]=WR-5931-2G5357, EdcaIdx=0
SSID[1]=c8d12ab95357, EdcaIdx=0
SSID[2]=ON, EdcaIdx=0
cfg_mode=9
cfg_mode=9
wmode_band_equal(): Band Equal!
e[34m[TxPower] BAND0: 100
e[0me[34m[SKUenable] BAND0: 1
e[0me[34m[PERCENTAGEenable] BAND0: 1
e[0mAPEdca0
APEdca1
APEdca2
APEdca3
HT: Ext Channel = BELOW
WtcSetMaxStaNum: MaxStaNum:83, BssidNum:5, WdsNum:4, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:121
Top Init Done!
Use alloc_skb
RX[0] DESC a0c0e000 size = 8192
RX[1] DESC a0c10000 size = 8192
Hif Init Done!
ctl->txq = c2e91a8c
ctl->rxq = c2e91a98
ctl->ackq = c2e91aa4
ctl->kickq = c2e91ab0
ctl->tx_doneq = c2e91abc
ctl->rx_doneq = c2e91ac8
mt7615_fw_prepare():FW(8a10), HW(8a10), CHIPID(7615))
mt7615_fw_prepare(2752): MT7615_E3, USE E3 patch and ram code binary image
AndesMTLoadRomMethodFwDlRing(1036), cap->rom_patch_len(11150)
AndesRestartCheck: Current TOP_MISC2(0x1)
AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
20170304031443a
platform =
ALPS
hw/sw version =
8a108a10
patch version =
00000010
e.LAN.2G.WPS.ManPatch SEM Status=2
ufacturerUrl
[rMtCmdPatchSemGet:(ret = 0)
eadWpsConfig:144
Patch is not ready && get semaphore success, SemStatus(2)
]NULL Device.LANEventGenericEventHandler: CMD Success
.2G.WPS.ModelDesMtCmdAddressLenReq:(ret = 0)
cription
[readWMtCmdPatchFinishReq
psConfig:144]NULL Device.LAN.2G.WPS.ModelUrl
[readWpsConfig:144]NULL Device.LANEventGenericEventHandler: CMD Success
.2G.WPS.ModelNumSend checksum req..
ber
Patch SEM Status=3
MtCmdPatchSemGet:(ret = 0)
Release patch semaphore, SemStatus(3)
AndesMTEraseRomPatch
WfMcuHwInit: Before NICLoadFirmware, check IcapMode=0
AndesMTLoadFwMethodFwDlRing(810), cap->fw_len(459960)
Build Date:_201705121437
Build Date:_201705121437
AndesRestartCheck: Current TOP_MISC2(0x1)
AndesRestartCheck: (TOP_MISC2 = 1), ready to continue...RET(0)
EventGenericEventHandler: CMD Success
MtCmdAddressLenReq:(ret = 0)
EventGenericEventHandler: CMD Success
MtCmdAddressLenReq:(ret = 0)
MtCmdFwStartReq: override = 1, address = 540672
EventGenericEventHandler: CMD Success
Build Date:_201703141726
EventGenericEventHandler: CMD Success
MtCmdAddressLenReq:(ret = 0)
MtCmdFwStartReq: override = 4, address = 0
EventGenericEventHandler: CMD Success
WfMcuHwInit: NICLoadFirmware OK, Check IcapMode=0
MCU Init Done!
efuse_probe: efuse = 10000212
RtmpChipOpsEepromHook::e2p_type=2, inf_Type=5
RtmpEepromGetDefault::e2p_dafault=1
RtmpChipOpsEepromHook: E2P type(2), E2pAccessMode = 2, E2P default = 1
NVM is FLASH mode. dev_idx [0] FLASH OFFSET [0x0]
NICReadEEPROMParameters():Calling eeinit
e[34mNICReadEEPROMParameters: EEPROM 0x52 b303e[m
e[34mNICReadEEPROMParameters: EEPROM 0x52 b303e[m
Country Region from e2p = 1
mt7615_antenna_default_reset(): TxPath = 4, RxPath = 4
mt7615_antenna_default_reset(): DBDC 2G TxPath = 2, 2G RxPath = 2
mt7615_antenna_default_reset(): DBDC 5G TxPath = 2, 2G RxPath = 2
rtmp_read_txpwr_from_eeprom(243): Don't Support this now!
RTMPReadTxPwrPerRate(1382): Don't Support this now!
RcRadioInit(): DbdcMode=0, ConcurrentBand=1
RcRadioInit(): pRadioCtrl=85ed7440,Band=0,rfcap=3,channel=1,PhyMode=2
MtCmdSetDbdcCtrl:(ret = 0)
Band Rf: 1, Phy Mode: 2
AntCfgInit(2787): Not support for HIF_MT yet!
MtSingleSkuLoadParam: RF_LOCKDOWN Feature OFF !!!
MtBfBackOffLoadTable: RF_LOCKDOWN Feature OFF !!!
EEPROM Init Done!
mt_mac_init()-->
mt_mac_pse_init(2787): Don't Support this now!
mt7615_init_mac_cr()-->
mt7615_init_mac_cr(): TMAC_TRCR0=0x82783c8c
mt7615_init_mac_cr(): TMAC_TRCR1=0x82783c8c
MtAsicSetMacMaxLen(1313): Not finish Yet!
<--mt_mac_init()
CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
CmdRxHdrTransBLUpdateRsp::EventExtCmdResult.u4Status = 0x0
MAC Init Done!
MT7615BBPInit():BBP Initialization.....
Band 0: valid=1, isDBDC=0, Band=2, CBW=1, CentCh/PrimCh=1/1, prim_ch_idx=0, txStream=2
Band 1: valid=0, isDBDC=0, Band=0, CBW=0, CentCh/PrimCh=0/0, prim_ch_idx=0, txStream=0
MT7615BBPInit() todo
PHY Init Done!
tx_pwr_comp_init():NotSupportYet!
MtCmdSetMacTxRx:(ret = 0)
CountryCode(2.4G/5G)=0/0, RFIC=25, PHY mode(2.4G/5G)=14/14, support 11 channels
WifiSysOpen(), wdev idx = 0
wdev_attr_update(): wdevId0 = c8:d1:2a:b9:53:57
MtCmdSetDbdcCtrl:(ret = 0)
ApAutoChannelAtBootUp----------------->
ApAutoChannelAtBootUp: AutoChannelBootup = 0, AutoChannelFlag = 0
ApAutoChannelAtBootUp<-----------------
MtAsicSetChBusyStat(865): Not support for HIF_MT yet!
[PMF]APPMFInit:: apidx=0, MFPC=0, MFPR=0, SHA256=0
[PMF]WPAMakeRsnIeCap: RSNIE Capability MFPC=0, MFPR=0
HcUpdatePhyMode(): Update PhyMode for all wdev for this band PhyMode:14,Channel=11
CountryCode(2.4G/5G)=0/0, RFIC=25, PHY mode(2.4G/5G)=14/14, support 11 channels
Enable 20/40 BSSCoex Channel Scan(BssCoex=1)
MtCmdSetMacTxRx:(ret = 0)
mt7615_apply_dcoc() : reload Central CH [4] BW [0] from cetral freq [2432] offset [2300]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_dpd() : reload Central CH [4] BW [0] from cetral freq [2422] i[44] offset [4b20]
MtCmdGetTXDPDCalResult:(ret = 0)
MtCmdChannelSwitch: control_chl = 4,control_ch2=0, central_chl = 4 DBDCIdx= 0, Band= 0
BW = 0,TXStream = 4, RXStream = 4, scan(1)
SYNC - BBP R4 to 20MHz.l
mt7615_apply_dcoc() : reload Central CH [5] BW [0] from cetral freq [2432] offset [2300]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_dpd() : reload Central CH [5] BW [0] from cetral freq [2442] i[45] offset [4bf8]
MtCmdGetTXDPDCalResult:(ret = 0)
MtCmdChannelSwitch: control_chl = 5,control_ch2=0, central_chl = 5 DBDCIdx= 0, Band= 0
BW = 0,TXStream = 4, RXStream = 4, scan(1)
SYNC - BBP R4 to 20MHz.l
:MtCmdPktBudgetCtrl: bssid(255),wcid(65535),type(0)
mt7615_apply_dcoc() : reload Central CH [6] BW [0] from cetral freq [2432] offset [2300]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_dpd() : reload Central CH [6] BW [0] from cetral freq [2442] i[45] offset [4bf8]
MtCmdGetTXDPDCalResult:(ret = 0)
MtCmdChannelSwitch: control_chl = 6,control_ch2=0, central_chl = 6 DBDCIdx= 0, Band= 0
BW = 0,TXStream = 4, RXStream = 4, scan(1)
SYNC - BBP R4 to 20MHz.l
MtCmdGetTXDPDCalResult:(ret = 0)
MtCmdChannelSwitch: control_chl = 10,control_ch2=0, central_chl = 10 DBDCIdx= 0, Band= 0
BW = 0,TXStream = 4, RXStream = 4, scan(1)
SYNC - BBP R4 to 20MHz.l
mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467] offset [2500]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0]
MtCmdGetTXDPDCalResult:(ret = 0)
MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0
BW = 0,TXStream = 4, RXStream = 4, scan(1)
SYNC - BBP R4 to 20MHz.l
wtc_acquire_groupkey_wcid: Found a non-occupied wtbl_idx:127 for WDEV_TYPE:1
LinkToOmacIdx = 0, LinkToWdevType = 1
bssUpdateBmcMngRate (BSS_INFO_BROADCAST_INFO), CmdBssInfoBmcRate.u2BcTransmit= 0, CmdBssInfoBmcRate.u2McTransmit = 0
[RadarStateCheck]Set into RD_NORMAL_MODE
MtCmdTxPowerSKUCtrl: fgTxPowerSKUEn: 1, BandIdx: 0
MtCmdTxPowerPercentCtrl: fgTxPowerPercentEn: 1, BandIdx: 0
MtCmdTxBfBackoffCtrl: fgTxBFBackoffEn: 0, BandIdx: 0
mt7615_bbp_adjust():rf_bw=0, ext_ch=0, PrimCh=11, HT-CentCh=11, VHT-CentCh=0
mt7615_apply_dcoc() : reload Central CH [11] BW [0] from cetral freq [2467] offset [2500]
MtCmdGetRXDCOCCalResult:(ret = 0)
mt7615_apply_dpd() : reload Central CH [11] BW [0] from cetral freq [2462] i[46] offset [4cd0]
MtCmdGetTXDPDCalResult:(ret = 0)
MtCmdChannelSwitch: control_chl = 11,control_ch2=0, central_chl = 11 DBDCIdx= 0, Band= 0
BW = 0,TXStream = 4, RXStream = 4, scan(0)
ap_phy_rrm_init_byRf(): AP Set CentralFreq at 11(Prim=11, HT-CentCh=11, VHT-CentCh=0, BBP_BW=0)
LeadTimeForBcn, OmacIdx = 0, WDEV_WITH_BCN_ABILITY
MtAsicSetRalinkBurstMode(2618): Not support for HIF_MT yet!
MtAsicSetPiggyBack(802): Not support for HIF_MT yet!
MtAsicSetTxPreamble(2597): Not support for HIF_MT yet!
ap_ftkd> Initialize FT KDP Module...
Main bssid = c8:d1:2a:b9:53:57
AsicRadioOnOffCtrl(): DbdcIdx=0 RadioOn
MtCmdSetMacTxRx:(ret = 0)
fdb_enable()
MCS Set = ff ff ff ff 01
<==== mt_wifi_init, Status=0
MtCmdEDCCACtrl: BandIdx: 0, EDCCACtrl: 0
MtCmdEDCCACtrl: BandIdx: 1, EDCCACtrl: 1
Total allocated 4 WDS interfaces!
WtcSetMaxStaNum: MaxStaNum:83, BssidNum:5, WdsNum:4, ApcliNum:2, MaxNumChipRept:32, MinMcastWcid:121
red_is_enabled: set CR4/N9 RED Enable to 1.
cp_support_is_enabled: set CR4 CP_SUPPORT to Mode 2.
Correct apidx from 0 to 0 for WscUUIDInit
Generate UUID for apidx(0)
UUID: c2b335d8, len = 16
0x0000 : bc 32 9e 00 1d d8 11 b2 86 01 c8 d1 2a b9 53 57
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_POST_INIT name=NAME=ra1 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=ra1 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_POST_INIT name=NAME=ra2 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=ra2 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_POST_INIT name=NAME=ra3 hold=
interface ra0 does not exi<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=ra3 hold=
st!
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_POST_INIT name=NAME=ra4 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=ra4 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_POST_INIT name=NAME=wds0 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=wds0 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_POST_INIT name=NAME=wds1 hold=
get_wdev_by_idx: invalid idx(0)
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=wds1 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_POST_INIT name=NAME=wds2 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=wds2 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_POST_INIT name=NAME=wds3 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=wds3 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_POST_INIT name=NAME=apcli0 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_REGISTER name=NAME=apcli0 hold=
<deferred_gpio_event:188>argv[0]=/sbin/ev_broker i=5 class=2 paction=NETDEV_UP name=NAME=ra0 hold=
Is there more that can be provided?
note the Edimax Gemini RG21S will tftp boot, it just can't be flashed due to magic number?