SF19A2890 commit, possible new devices

tftpboot of evb on bpi wifi5

dmesg
[    0.000000] Linux version 6.6.73 (system@kvm8085) (mipsel-openwrt-linux-musl-gcc (OpenWrt GCC 13.3.0 r28417-daef29c75d) 13.3.0, G5
[    0.000000] CPU0 revision is: 5301a128 (MIPS interAptiv (multi))
[    0.000000] FPU revision is: 0173a000
[    0.000000] MIPS: machine is Siflower SF19A2890 Evaluation Board
[    0.000000] earlycon: pl11 at MMIO 0x18300000 (options '115200n8')
[    0.000000] printk: bootconsole [pl11] enabled
[    0.000000] User-defined physical RAM map overwrite
[    0.000000] OF: reserved mem: 0x01f00000..0x020fffff (2048 KiB) map non-reusable wlandsp@1f00000
[    0.000000] OF: reserved mem: 0x02100000..0x022fffff (2048 KiB) map non-reusable wlandsp@2100000
[    0.000000] Initrd not found or empty - disabling initrd
[    0.000000] VPE topology {2,2} total 4
[    0.000000] Primary instruction cache 16kB, VIPT, 4-way, linesize 32 bytes.
[    0.000000] Primary data cache 16kB, 4-way, VIPT, no aliases, linesize 32 bytes
[    0.000000] MIPS secondary cache 128kB, 8-way, linesize 32 bytes.
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000000000000-0x0000000003ffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000000000000-0x0000000003ffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000003ffffff]
[    0.000000] percpu: Embedded 12 pages/cpu s19584 r8192 d21376 u49152
[    0.000000] pcpu-alloc: s19584 r8192 d21376 u49152 alloc=12*4096
[    0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 
[    0.000000] Kernel command line: earlycon mem=64M
[    0.000000] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes, linear)
[    0.000000] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes, linear)
[    0.000000] Writing ErrCtl register=00000000
[    0.000000] Readback ErrCtl register=00000000
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 16240
[    0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[    0.000000] Memory: 40612K/65536K available (7102K kernel code, 641K rwdata, 1544K rodata, 10416K init, 211K bss, 24924K reserved)
[    0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] rcu: Hierarchical RCU implementation.
[    0.000000]  Tracing variant of Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
[    0.000000] NR_IRQS: 256
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xb881274fa3, max_idle_ns: 440795210636 ns
[    0.000005] sched_clock: 64 bits at 800MHz, resolution 1ns, wraps every 4398046511103ns
[    0.008161] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4778151116 ns
[    0.017529] Calibrating delay loop... 531.66 BogoMIPS (lpj=2658304)
[    0.083796] pid_max: default: 32768 minimum: 301
[    0.098127] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.105591] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.124652] RCU Tasks Trace: Setting shift to 2 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=4.
[    0.135126] rcu: Hierarchical SRCU implementation.
[    0.140000] rcu:     Max phase no-delay instances is 1000.
[    0.146822] smp: Bringing up secondary CPUs ...
[    0.153008] Primary instruction cache 16kB, VIPT, 4-way, linesize 32 bytes.
[    0.153060] Primary data cache 16kB, 4-way, VIPT, no aliases, linesize 32 bytes
[    0.153077] MIPS secondary cache 128kB, 8-way, linesize 32 bytes.
[    0.153169] CPU1 revision is: 5301a128 (MIPS interAptiv (multi))
[    0.153186] FPU revision is: 0173a000
[    0.205641] Synchronize counters for CPU 1: done.
[    0.243960] Primary instruction cache 16kB, VIPT, 4-way, linesize 32 bytes.
[    0.244015] Primary data cache 16kB, 4-way, VIPT, no aliases, linesize 32 bytes
[    0.244032] MIPS secondary cache 128kB, 8-way, linesize 32 bytes.
[    0.244119] CPU2 revision is: 5301a128 (MIPS interAptiv (multi))
[    0.244137] FPU revision is: 0173a000
[    0.303234] Synchronize counters for CPU 2: done.
[    0.340613] Primary instruction cache 16kB, VIPT, 4-way, linesize 32 bytes.
[    0.340668] Primary data cache 16kB, 4-way, VIPT, no aliases, linesize 32 bytes
[    0.340686] MIPS secondary cache 128kB, 8-way, linesize 32 bytes.
[    0.340775] CPU3 revision is: 5301a128 (MIPS interAptiv (multi))
[    0.340794] FPU revision is: 0173a000
[    0.400143] Synchronize counters for CPU 3: done.
[    0.435512] smp: Brought up 1 node, 4 CPUs
[    0.448547] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.458656] futex hash table entries: 1024 (order: 3, 32768 bytes, linear)
[    0.470381] pinctrl core: initialized pinctrl subsystem
[    0.481361] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[    0.488583] FPU Affinity set after 10620 emulations
[    0.496388] Serial: AMBA PL011 UART driver
[    0.503477] /soc: Fixed dependency cycle(s) with /soc/interrupt-controller@1bdc0000
[    0.529789] pps_core: LinuxPPS API ver. 1 registered
[    0.534944] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.544226] PTP clock support registered
[    0.551522] clocksource: Switched to clocksource GIC
[    0.568591] NET: Registered PF_INET protocol family
[    0.574065] IP idents hash table entries: 2048 (order: 2, 16384 bytes, linear)
[    0.582785] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
[    0.591305] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.599295] TCP established hash table entries: 1024 (order: 0, 4096 bytes, linear)
[    0.607134] TCP bind hash table entries: 1024 (order: 2, 16384 bytes, linear)
[    0.614510] TCP: Hash tables configured (established 1024 bind 1024)
[    0.622498] MPTCP token hash table entries: 256 (order: 0, 4096 bytes, linear)
[    0.630253] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
[    0.637009] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
[    0.645468] NET: Registered PF_UNIX/PF_LOCAL protocol family
[    0.655985] workingset: timestamp_bits=14 max_order=14 bucket_order=0
[    0.665618] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[    0.671711] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[    0.724403] loop: module loaded
[    0.743305] NET: Registered PF_INET6 protocol family
[    0.757219] Segment Routing with IPv6
[    0.761263] In-situ OAM (IOAM) with IPv6
[    0.765963] NET: Registered PF_PACKET protocol family
[    0.772495] 8021q: 802.1Q VLAN Support v1.8
[    0.833698] ssp-pl022 18202000.spi: ARM PL022 driver, device ID: 0x00a41022
... (88 lines left)

so got serial access but no ethernet, need to add https://git.openwrt.org/?p=openwrt/openwrt.git;a=blob;f=target/linux/mediatek/files-6.6/drivers/mfd/airoha-an8855.c;h=eeaea348aa412c2ef95c035b52d8752db50c3dcb;hb=0fd9d00cd6fc285b2a925eb03e6350a4b00fc279

into siflower device drivers, does not come up under 24.10.0-rc7 kernel configuration.

stock dmesg

24.10.0-rc7 evaluation board dmesg

@dimfish how do I add a device driver, currently running through the wiki but I know you have added the driver I need for the bpi-wifi5 to the ax3000t, just wondering if it's just a straight copy?

What do u mean by straight copy? straight copy of what?

I'm in the kernel configuration, currently working from
https://git.openwrt.org/?p=openwrt/openwrt.git;a=commit;h=4ed209326b5299584ad22b82d0f5ba0d12ceb169

This can be booted, but it has a RTL ethernet driver, and I need AN8855R Gigabit switch chip, but it's missing from the kernel configuration, so can I create a makefile and add it?

Or is the AN8855R not the AN8855 that the ax3000t uses?

just looking at the .dtsi for siflower as well

I see. I don't know is there are differences between AN8855 and AN8855R.
Anyway you can take driver from filogic and add it to dts similar way as for ax3000t.

2 Likes

@hecatae Not sure if you noticed this, but seems like SiFlower has a bunch more new subtargets incoming, per their git commit

https://git.openwrt.org/?p=openwrt/openwrt.git;a=commit;h=c057db94f8e229054c17bb3473e0914a915695de

1 Like

Thank you, that's a bit of reading.