RTL8367s switch error in boot

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Hi, i’m trying to communicate my custom board with an ethernet switch rtl8367s. My custom is based on a stm32mp257fak3 and i’m customizing the openwrt 24.10 image to detect it. But his error is popping over and over. In the moment i’m using the driver of rtl8365mb, but i’m not pretty sure if it is okay.

[ 1.391141] realtek-smi rtl8367s: ACK timeout[ 1.391171]

realtek-smi rtl8367s: failed to read chip id and version: -110[ 1.391190]

realtek-smi rtl8367s: unable to detect switch[ 1.391205]

realtek-smi: probe of rtl8367s failed with error -110

This the device tree .dts that i’m working on.

// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
/*

  • STM32MP257F GradDeck - RTL8367S OpenWrt Configuration
    */
    /dts-v1/;
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/input/input.h>
    #include <dt-bindings/leds/common.h>
    #include <dt-bindings/regulator/st,stm32mp25-regulator.h>
    #include "stm32mp257.dtsi"
    #include "stm32mp25xf.dtsi"
    #include "stm32mp25-pinctrl.dtsi"
    #include "stm32mp25xxak-pinctrl.dtsi"
    #include "stm32mp257f-ev1-ca35tdcid-resmem.dtsi"
    / {
    model = "GradDeck by Gradhoc";
    compatible = "st,stm32mp257f-ev1", "st,stm32mp257";
    aliases {
    ethernet0 = &eth1;
    ethernet1 = &eth2;
    serial0 = &uart5;
    };
    chosen {
    stdout-path = "serial0:115200n8";
    };
    memory@80000000 {
    device_type = "memory";
    reg = <0x0 0x80000000 0x1 0x0>;
    };
    rtl8367s {
    compatible = "realtek,rtl8365mb";
    mdc-gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>; // PC5
    mdio-gpios = <&gpioc 5 GPIO_ACTIVE_HIGH>; // PC7
    reset-gpios = <&gpioa 2 GPIO_ACTIVE_LOW>; // PH5

    mdio {
    compatible = "realtek,smi-mdio";
    #address-cells = <1>;
    #size-cells = <0>;

      ethphy0: ethernet-phy@0 {
  	reg = <0>;
  };

  ethphy1: ethernet-phy@1 {
  	reg = <1>;
  };

  ethphy2: ethernet-phy@2 {
  	reg = <2>;
  };

  ethphy3: ethernet-phy@3 {
  	reg = <3>;
  };

  ethphy4: ethernet-phy@4 {
  	reg = <4>;
  };

    };

    ports {
    #address-cells = <1>;
    #size-cells = <0>;

      port@0 {
  	reg = <0>;
  	label = "cpu";
  	ethernet = <&eth2>;
  };

  port@1 {
  	reg = <1>;
  	label = "lan1";
  	phy-handle = <&ethphy1>;
  };

  port@2 {
  	reg = <2>;
  	label = "lan2";
  	phy-handle = <&ethphy2>;
  };

  port@3 {
  	reg = <3>;
  	label = "lan3";
  	phy-handle = <&ethphy3>;
  };

  port@4 {
  	reg = <4>;
  	label = "lan4";
  	phy-handle = <&ethphy4>;
  };

    };
    };
    };
    &a35ss_syscfg {
    status = "okay";
    };
    &arm_wdt {
    timeout-sec = <32>;
    status = "okay";
    };
    &combophy {
    clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>;
    clock-names = "apb-clk", "ker-clk";
    st,rx_equalizer = <1>;
    status = "okay";
    };
    &crc {
    status = "okay";
    };
    &cryp1 {
    status = "okay";
    };
    /* ETH1 - WAN port with RTL8211F PHY /
    &eth1 {
    status = "okay";
    pinctrl-0 = <&eth1_mdio_pins_mx>, <&eth1_rgmii_pins_mx>;
    pinctrl-1 = <&eth1_mdio_sleep_pins_mx>, <&eth1_rgmii_sleep_pins_mx>;
    pinctrl-names = "default", "sleep";
    phy-mode = "rgmii-id";
    max-speed = <1000>;
    phy-handle = <&phy1_eth1>;
    st,ext-phyclk;
    mdio1 {
    #address-cells = <1>;
    #size-cells = <0>;
    compatible = "snps,dwmac-mdio";
    phy1_eth1: ethernet-phy@5 {
    compatible = "ethernet-phy-id001c.c916";
    reg = <5>;
    reset-gpios = <&gpiof 3 GPIO_ACTIVE_LOW>;
    reset-assert-us = <10000>;
    reset-deassert-us = <80000>;
    realtek,eee-disable;
    };
    };
    };
    /     ETH2 - Direct connection to RTL8367S switch /
    &eth2 {
    status = "okay";
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&eth2_rgmii_pins_mx>;
    pinctrl-1 = <&eth2_rgmii_sleep_pins_mx>;
    phy-mode = "rgmii-id"; /     Cambiado de rgmii-txid a rgmii-id /
    max-speed = <1000>;
    st,ext-phyclk;
    /     Fixed link configuration */
    fixed-link {
    speed = <1000>;
    full-duplex;
    pause;
    };
    };

&gpu {
status = "okay";
};
&hpdma {
memory-region = <&hpdma1_lli>;
};
&hpdma2 {
memory-region = <&hpdma2_lli>;
};
&hpdma3 {
memory-region = <&hpdma3_lli>;
};
&ipcc1 {
status = "okay";
};
&ipcc2 {
status = "okay";
};
&lptimer3 {
status = "okay";
timer {
status = "okay";
};
};
&pcie_rc {
pinctrl-names = "default", "init", "sleep";
pinctrl-0 = <&pcie_pins_a>;
pinctrl-1 = <&pcie_init_pins_a>;
pinctrl-2 = <&pcie_sleep_pins_a>;
status = "okay";
};
&rtc {
status = "okay";
};
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_pins_mx>;
pinctrl-1 = <&sdmmc2_opendrain_pins_mx>;
pinctrl-2 = <&sdmmc2_sleep_pins_mx>;
vmmc-supply = <&scmi_vdd_emmc>;
vqmmc-supply = <&scmi_v1v8>;
status = "okay";
};
&scmi_regu {
scmi_vddio1: regulator@0 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
scmi_vddcore: regulator@b {
reg = <VOLTD_SCMI_STPMIC2_BUCK2>;
regulator-name = "vddcore";
};
scmi_v1v8: regulator@e {
reg = <VOLTD_SCMI_STPMIC2_BUCK5>;
regulator-name = "v1v8";
};
scmi_v3v3: regulator@10 {
reg = <VOLTD_SCMI_STPMIC2_BUCK7>;
regulator-name = "v3v3";
};
scmi_vdd_emmc: regulator@12 {
reg = <VOLTD_SCMI_STPMIC2_LDO2>;
regulator-name = "vdd_emmc";
};
scmi_vdd3v3_usb: regulator@14 {
reg = <VOLTD_SCMI_STPMIC2_LDO4>;
regulator-name = "vdd3v3_usb";
};
scmi_vdd_sdcard: regulator@17 {
reg = <VOLTD_SCMI_STPMIC2_LDO7>;
regulator-name = "vdd_sdcard";
};
};
&uart5 {
pinctrl-names = "default", "idle", "sleep";
pinctrl-0 = <&uart5_pins_mx>;
pinctrl-1 = <&uart5_idle_pins_mx>;
pinctrl-2 = <&uart5_sleep_pins_mx>;
status = "okay";
};