hello and thank you for your reply. this is the full log when when installing
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U-Boot 1.1.3 (Mar 28 2022 - 08:12:25)
Board: Ralink APSoC DRAM: 256 MB
gpio_init: gpio = 6, dir = 0, val = -1
mtk_set_gpio_dir gpio = 00000006, dir = 00000000
ra_and_print addr = be000600, val = ffffffbf
ra_and_print before = 00000000
ra_and_print after = 00000000
gpio_init: gpio = 7, dir = 0, val = -1
mtk_set_gpio_dir gpio = 00000007, dir = 00000000
ra_and_print addr = be000600, val = ffffff7f
ra_and_print before = 00000000
ra_and_print after = 00000000
gpio_init: gpio = 13, dir = 0, val = -1
mtk_set_gpio_dir gpio = 0000000d, dir = 00000000
ra_and_print addr = be000600, val = ffffdfff
ra_and_print before = 00000000
ra_and_print after = 00000000
gpio_init: gpio = 18, dir = 0, val = -1
mtk_set_gpio_dir gpio = 00000012, dir = 00000000
ra_and_print addr = be000600, val = fffbffff
ra_and_print before = 00000000
ra_and_print after = 00000000
gpio_init: gpio = 16, dir = 1, val = 0
mtk_set_gpio_dir gpio = 00000010, dir = 00000001
ra_or_print addr = be000600, val = 00010000
ra_or_print before = 00000000
ra_or_print after = 00010000
gpio_init: gpio = 27, dir = 1, val = 1
mtk_set_gpio_dir gpio = 0000001b, dir = 00000001
ra_or_print addr = be000600, val = 08000000
ra_or_print before = 00010000
ra_or_print after = 08010000
mtk_set_gpio_dir addr = be000060, shift = 0000000f
mtk_set_gpio_dir before = 0004d5ac
mtk_set_gpio_dir after = 0004d5ac
gpio_init: gpio = 28, dir = 1, val = 1
mtk_set_gpio_dir gpio = 0000001c, dir = 00000001
ra_or_print addr = be000600, val = 10000000
ra_or_print before = 08010000
ra_or_print after = 18010000
mtk_set_gpio_dir addr = be000060, shift = 0000000f
mtk_set_gpio_dir before = 0004d5ac
mtk_set_gpio_dir after = 0004d5ac
gpio_init: gpio = 29, dir = 1, val = 1
mtk_set_gpio_dir gpio = 0000001d, dir = 00000001
ra_or_print addr = be000600, val = 20000000
ra_or_print before = 18010000
ra_or_print after = 38010000
mtk_set_gpio_dir addr = be000060, shift = 0000000f
mtk_set_gpio_dir before = 0004d5ac
mtk_set_gpio_dir after = 0004d5ac
gpio_init: gpio = 31, dir = 1, val = 1
mtk_set_gpio_dir gpio = 0000001f, dir = 00000001
ra_or_print addr = be000600, val = 80000000
ra_or_print before = 38010000
ra_or_print after = b8010000
mtk_set_gpio_dir addr = be000060, shift = 0000000f
mtk_set_gpio_dir before = 0004d5ac
mtk_set_gpio_dir after = 0004d5ac
gpio_init: gpio = 33, dir = 1, val = 1
mtk_set_gpio_dir gpio = 00000021, dir = 00000001
ra_or_print addr = be000604, val = 00000002
ra_or_print before = 00000000
ra_or_print after = 00000002
mtk_set_gpio_dir addr = be000060, shift = 0000000f
mtk_set_gpio_dir before = 0004d5ac
mtk_set_gpio_dir after = 0004d5ac
relocate_code Pointer at: 8ffac000
Config XHCI 40M PLL
chip_prob raspi_read_devid: c2 20 18 bf ff
jedec=2018bfff
flash manufacture id: c2, device id 20 18
find flash: MX25L12805D
============================================
Ralink UBoot Version: 4.3.0.0
TZ Version: 2021-07-13
--------------------------------------------
ASIC MT7621A DualCore (MAC to MT7530 Mode)
DRAM_CONF_FROM: Auto-Detection
DRAM_TYPE: DDR3
DRAM bus: 16 bit
Xtal Mode=3 OCP Ratio=1/3
Flash component: SPI Flash
Date:Mar 28 2022 Time:08:12:25
============================================
icache: sets:256, ways:4, linesz:32 ,total:32768
dcache: sets:256, ways:4, linesz:32 ,total:32768
##### The CPU freq = 880 MHZ ####
estimate memory size =256 Mbytes
#Reset_MT7530
set LAN/WAN WLLLL
gpio_init: gpio = 6, dir = 0, val = -1
mtk_set_gpio_dir gpio = 00000006, dir = 00000000
ra_and_print addr = be000600, val = ffffffbf
ra_and_print before = b8010000
ra_and_print after = b8010000
gpio_init: gpio = 7, dir = 0, val = -1
mtk_set_gpio_dir gpio = 00000007, dir = 00000000
ra_and_print addr = be000600, val = ffffff7f
ra_and_print before = b8010000
ra_and_print after = b8010000
gpio_init: gpio = 13, dir = 0, val = -1
mtk_set_gpio_dir gpio = 0000000d, dir = 00000000
ra_and_print addr = be000600, val = ffffdfff
ra_and_print before = b8010000
ra_and_print after = b8010000
gpio_init: gpio = 18, dir = 0, val = -1
mtk_set_gpio_dir gpio = 00000012, dir = 00000000
ra_and_print addr = be000600, val = fffbffff
ra_and_print before = b8010000
ra_and_print after = b8010000
gpio_init: gpio = 16, dir = 1, val = 0
mtk_set_gpio_dir gpio = 00000010, dir = 00000001
ra_or_print addr = be000600, val = 00010000
ra_or_print before = b8010000
ra_or_print after = b8010000
gpio_init: gpio = 27, dir = 1, val = 1
mtk_set_gpio_dir gpio = 0000001b, dir = 00000001
ra_or_print addr = be000600, val = 08000000
ra_or_print before = b8010000
ra_or_print after = b8010000
mtk_set_gpio_dir addr = be000060, shift = 0000000f
mtk_set_gpio_dir before = 000485ac
mtk_set_gpio_dir after = 000485ac
gpio_init: gpio = 28, dir = 1, val = 1
mtk_set_gpio_dir gpio = 0000001c, dir = 00000001
ra_or_print addr = be000600, val = 10000000
ra_or_print before = b8010000
ra_or_print after = b8010000
mtk_set_gpio_dir addr = be000060, shift = 0000000f
mtk_set_gpio_dir before = 000485ac
mtk_set_gpio_dir after = 000485ac
gpio_init: gpio = 29, dir = 1, val = 1
mtk_set_gpio_dir gpio = 0000001d, dir = 00000001
ra_or_print addr = be000600, val = 20000000
ra_or_print before = b8010000
ra_or_print after = b8010000
mtk_set_gpio_dir addr = be000060, shift = 0000000f
mtk_set_gpio_dir before = 000485ac
mtk_set_gpio_dir after = 000485ac
gpio_init: gpio = 31, dir = 1, val = 1
mtk_set_gpio_dir gpio = 0000001f, dir = 00000001
ra_or_print addr = be000600, val = 80000000
ra_or_print before = b8010000
ra_or_print after = b8010000
mtk_set_gpio_dir addr = be000060, shift = 0000000f
mtk_set_gpio_dir before = 000485ac
mtk_set_gpio_dir after = 000485ac
gpio_init: gpio = 33, dir = 1, val = 1
mtk_set_gpio_dir gpio = 00000021, dir = 00000001
ra_or_print addr = be000604, val = 00000002
ra_or_print before = 00000002
ra_or_print after = 00000002
mtk_set_gpio_dir addr = be000060, shift = 0000000f
mtk_set_gpio_dir before = 000485ac
mtk_set_gpio_dir after = 000485ac
please select your keyboad
reset button = 1
before OperationSelect
Please choose the operation fengyz:
1: Load system code to SDRAM via TFTP.
2: Load system code then write to Flash via TFTP.
3: Boot system code via Flash (default).
4: Entr boot command line interface.
7: Load Boot Loader code then write to Flash via Serial.
9: Load Boot Loader code then write to Flash via TFTP.
You choosed 1
0
eth number = 1
end of if
1: System Load Linux to SDRAM via TFTP.
Please Input new ones /or Ctrl-C to discard
Input device IP (10.10.10.123) ==:10.10.10.123
Input server IP (10.10.10.3) ==:10.10.10.3
Input Linux Kernel filename Input Linux Kernel filename (23.05.2-ramips-mt7621-tozed_zlt-s12-pro-initramfs-kernel.bin) ==:23.05.2-ramips-mt7621-tozed_zlt-s12-pro-initramfs-kernel.bin
netboot_common, argc= 3
NetTxPacket = 0x8FFE5B80
KSEG1ADDR(NetTxPacket) = 0xAFFE5B80
NetLoop,call eth_halt !
NetLoop,call eth_init !
Trying Eth0 (10/100-M)
Waitting for RX_DMA_BUSY status Start... done
ETH_STATE_ACTIVE!!
TFTP from server 10.10.10.3; our IP address is 10.10.10.123
Filename '23.05.2-ramips-mt7621-tozed_zlt-s12-pro-initramfs-kernel.bin'.
TIMEOUT_COUNT=10,Load address: 0x80a00000
Loading: checksum bad
checksum bad
checksum bad
checksum bad
checksum bad
checksum bad
T Got ARP REPLY, set server/gtwy eth addr (18:67:b0:2e:79:c3)
Got it
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done
Bytes transferred = 5744064 (57a5c0 hex)
NetBootFileXferSize= 0057a5c0
Automatic boot of image at addr 0x80A00000 ...
## Booting image at 80a00000 ...
Image Name: MIPS OpenWrt Linux-5.15.137
Image Type: MIPS Linux Kernel Image (uncompressed)
Data Size: 5744000 Bytes = 5.5 MB
Load Address: 80001000
Entry Point: 80001000
Verifying Checksum ... OK
OK
No initrd
## Transferring control to Linux (at address 80001000) ...
## Giving linux memsize in MB, 256
Starting kernel ...
OpenWrt kernel loader for MIPS based SoC
Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
Decompressing kernel... done!
Starting kernel at 80001000...
[ 0.000000] Linux version 5.15.137 (builder@buildhost) (mipsel-openwrt-linux-musl-gcc (OpenWrt GCC 12.3.0 r23630-842932a63d) 12.3.0, GNU ld (GNU Binutils) 2.40.0) #0 SMP Tue Nov 14 13:38:11 2023
[ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[ 0.000000] printk: bootconsole [early0] enabled
[ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[ 0.000000] MIPS: machine is TOZED ZLT S12 PRO
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] VPE topology {2,2} total 4
[ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.000000] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x000000000fffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x000000000fffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x000000000fffffff]
[ 0.000000] percpu: Embedded 11 pages/cpu s14736 r8192 d22128 u45056
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 64960
[ 0.000000] Kernel command line: console=ttyS0,115200 rootfstype=squashfs,jffs2
[ 0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes, linear)
[ 0.000000] Writing ErrCtl register=00070d65
[ 0.000000] Readback ErrCtl register=00070d65
[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off
[ 0.000000] Memory: 246300K/262144K available (7300K kernel code, 624K rwdata, 880K rodata, 4048K init, 226K bss, 15844K reserved, 0K cma-reserved)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] rcu: Hierarchical RCU implementation.
[ 0.000000] Tracing variant of Tasks RCU enabled.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
[ 0.000000] NR_IRQS: 256
[ 0.000000] clocksource: GIC: mask: 0xffffffffffffffff max_cycles: 0xcaf478abb4, max_idle_ns: 440795247997 ns
[ 0.000005] sched_clock: 64 bits at 880MHz, resolution 1ns, wraps every 4398046511103ns
[ 0.008074] Calibrating delay loop... 586.13 BogoMIPS (lpj=2930688)
[ 0.066226] pid_max: default: 32768 minimum: 301
[ 0.071659] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[ 0.078873] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
[ 0.090830] rcu: Hierarchical SRCU implementation.
[ 0.096381] smp: Bringing up secondary CPUs ...
[ 0.101898] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.101928] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.101944] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.101995] CPU1 revision is: 0001992f (MIPS 1004Kc)
[ 0.161202] Synchronize counters for CPU 1: done.
[ 0.193888] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.193913] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.193924] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.193951] CPU2 revision is: 0001992f (MIPS 1004Kc)
[ 0.252829] Synchronize counters for CPU 2: done.
[ 0.283545] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
[ 0.283570] Primary data cache 32kB, 4-way, PIPT, no aliases, linesize 32 bytes
[ 0.283581] MIPS secondary cache 256kB, 8-way, linesize 32 bytes.
[ 0.283615] CPU3 revision is: 0001992f (MIPS 1004Kc)
[ 0.338029] Synchronize counters for CPU 3: done.
[ 0.367892] smp: Brought up 1 node, 4 CPUs
[ 0.377699] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[ 0.387529] futex hash table entries: 1024 (order: 3, 32768 bytes, linear)
[ 0.394700] pinctrl core: initialized pinctrl subsystem
[ 0.401659] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[ 0.408359] thermal_sys: Registered thermal governor 'step_wise'
[ 0.434838] clocksource: Switched to clocksource GIC
[ 0.441453] NET: Registered PF_INET protocol family
[ 0.446536] IP idents hash table entries: 4096 (order: 3, 32768 bytes, linear)
[ 0.454934] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes, linear)
[ 0.463232] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.470935] TCP established hash table entries: 2048 (order: 1, 8192 bytes, linear)
[ 0.478571] TCP bind hash table entries: 2048 (order: 2, 16384 bytes, linear)
[ 0.485678] TCP: Hash tables configured (established 2048 bind 2048)
[ 0.492143] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
[ 0.498653] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
[ 0.506001] NET: Registered PF_UNIX/PF_LOCAL protocol family
[ 0.511651] PCI: CLS 0 bytes, default 32
[ 0.518169] workingset: timestamp_bits=14 max_order=16 bucket_order=2
[ 0.533238] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 0.539099] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.
[ 0.550982] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)
[ 1.023564] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 1.029900] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 1.036320] mt7621_gpio 1e000600.gpio: registering 32 gpios
[ 1.042873] mt7621-pci 1e140000.pcie: host bridge /pcie@1e140000 ranges:
[ 1.049705] mt7621-pci 1e140000.pcie: No bus range found for /pcie@1e140000, using [bus 00-ff]
[ 1.058617] mt7621-pci 1e140000.pcie: MEM 0x0060000000..0x006fffffff -> 0x0060000000
[ 1.066815] mt7621-pci 1e140000.pcie: IO 0x001e160000..0x001e16ffff -> 0x0000000000
and this is the intrcution i followed.
Installation Instructions:
Stock firmware runs an old OpenWrt SNAPSHOT release. Installation can be
either via
a) webui (gain superadmin access, use the sysupgrade image),
b) sysupgrade (gain root shell access, use the sysupgrade image), or
c) tftpboot in the bootloader.
Instructions below are for c). Connect the USB-TTL serial converter as
follows when facing the board upright on the side of the buttons and
RJ45 ports, located under the WPS/Wi-Fi buttons from left to right:
(TX) (GND) (RX)
Baud rate is 115200.
- Connect the computer to the device via ethernet cable. Set a static
adddress of 10.10.10.3/24 to the wired interface.
- Start the TFTP server, point it to where the initramfs image is
located. Rename the image to 'test.bin'.
- Turn on the device. There will be a three-second delay before the
default 'Boot system code via flash' is selected.
- Interrupt the boot process by pressing 1 to 'System Load Linux to
SDRAM via TFTP'.
- Press enter to accept the default 'Input device IP (10.10.10.123)'.
- Press enter to accept the default 'Input server IP (10.10.10.3)'.
- Press enter to accept the default 'Input Linux Kernel filename ()',
or enter 'test.bin'.
- Wait for the initramfs image to finish loading.
- Reconnect the wired interface to any LAN ports of the device via
DHCP.
- Flash the sysupgrade image at
http://192.168.1.1/cgi-bin/luci/admin/system/flash