Hm,he maybe pushed patches for 4.17 upstream but ones he sent to mailing list gotta be for 4.14,otherwise they wouldnt be merged for a long time.
I spoke to him privately an confirmed that he is writing for mainline and only changes the kernel on the openwrt target he test and there is a change in api for dsa
but I couldn't get more from him regarding to the error and where to look for it, I'm trying to add some debug to the code, but the dts he mentioned is using 3 gpios and tplink has set up only 2 for the switch (taken from the mach file)
he also said he is pushing the patches for testing purposes only
I understand.
Then most likely reason you are getting that error is missing GPIO.
I am scratching my head why isnt the radio on CPE210 v2 working altough everything looking like it should.
Also,for some reason tx power wont go above 10 dBm
I saw this on the mailing list
+&pinmux {
+ switch_led_pins: pinmux_switch_led_pins {
+ pinctrl-single,bits = <0x0 0x0 0xf8>;
+ };
+};
did you tried it ?
Found the damn issue,I had two LEDs defined with the same GPIO pin.
I am suspecting an issue with calibration length passed.
Do you maybe have ART dump from one of your routers working under ath79 so I can confirm the offsets?
I can dump from 841n-v9,1043v1,1043v3,1043v4,mr3020
1043v4 has somewhat the layout as yours
but 1043v3 and v4 problems are not art related
Can you dump it from 841 and 1043 v1?
I just need to see if the ART offsets are the same
yes, but looking at the mach file, it seems that v4 is more like your board,
I'll make a dump with all 3 of them
Thanks,will check them out.
Thanks for your ath79 efforts
Checked it out and they all start at offset 0x1000 like I passed calibration location.
I have no idea why isnt the damn built in radio working then.
Like at all
Could you provide a boot log?
And probably a dump of your compiled dt?
fdtdump build_dir/target-xxx/linux-xxx/image-xxx.dtb
Sure,here is dtb
And boot log
And iw output when wlan0 is enabled
phy#0
Interface wlan0
ifindex 7
wdev 0x3
addr 70:4f:57:2c:38:4e
ssid OpenWrt
type AP
channel 11 (2462 MHz), width: 20 MHz, center1: 2462 MHz
txpower 10.00 dBm
You can see that txpower is at 10 despite being set to 20dBm
Does your device have a external amp for wifi?
Did your PR #642 works on your device normally?
Why is there a interrupt-controller with the same interrupt number as for wmac in your dts "qcom,qca9556-intc"?
Shouldn´t be gmac connected to this interrupt-controller?
he is using
wmac: gmac@18100000 {
compatible = "qca,qca9530-wmac";
reg = <0x18100000 0x230000>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
status = "disabled";
};
};
thisone works ok on my 9533 board rev1
Yes,there are 2 external LNA-s but unlike CPE210v1 in which LNA-s were connected to GPIO18 and GPIO19 it apears that they are connected to SoC XLNA0 and XLNA1 pins since SoC has dedicated pins for that.
Yes,it works using that linked PR.
Sure this will work... But why is cpu interrupt 2 used for wmac and the unused (only disabled pcie) interrupt-handler...?
If you take a look into arch/mips/ath79/irq.c there is also a write buffer flush for qca953x on wmac and pcie interrupts...
I also tried an Ubiquiti Unifi AP AC LR but it hangs like 1043 v4
[ 0.000000] Linux version 4.14.44 (build@droid) (gcc version 7.3.0 (OpenWrt GCC 7.3.0 r7054-64b53247c4)) #0 Fri Jun 1 19:01:03 2018
[ 0.000000] bootconsole [early0] enabled
[ 0.000000] CPU0 revision is: 00019750 (MIPS 74Kc)
[ 0.000000] MIPS: machine is Ubiquiti Uifi AC Lite
[ 0.000000] SoC: Qualcomm Atheros QCA956X ver 1 rev 0
[ 0.000000] Determined physical RAM map:
[ 0.000000] memory: 08000000 @ 00000000 (usable)
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] Primary instruction cache 64kB, VIPT, 4-way, linesize 32 bytes.
[ 0.000000] Primary data cache 32kB, 4-way, VIPT, cache aliases, linesize 32 bytes
[ 0.000000] Zone ranges:
[ 0.000000] Normal [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x0000000007ffffff]
[ 0.000000] random: get_random_bytes called from 0x8048873c with crng_init=0
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 32512
[ 0.000000] Kernel command line: console=ttyS0,115200n8 rootfstype=squashfs,jffs2
[ 0.000000] PID hash table entries: 512 (order: -1, 2048 bytes)
[ 0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[ 0.000000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.000000] Writing ErrCtl register=00000000
[ 0.000000] Readback ErrCtl register=00000000
[ 0.000000] Memory: 117164K/131072K available (3615K kernel code, 148K rwdata, 484K rodata, 7840K init, 207K bss, 13908K reserved, 0K cma-reserved)
[ 0.000000] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[ 0.000000] NR_IRQS: 51
[ 0.000000] CPU clock: 775.000 MHz
[ 0.000000] clocksource: MIPS: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 4932285024 ns
[ 0.000007] sched_clock: 32 bits at 387MHz, resolution 2ns, wraps every 5541893118ns
Calibrating delay loop... should be the next kernel print...
Looks like interrupts or system timer is not working...
Interrupts and system timer are firstly used in delay loop calibration and it seems this will never finish.
Which DTSi are you using for QCA9563 that is inside of UAP?