It seems that there is a bug somewhere, so the irq domain has only one IRQ. It is supposed to have 8 as defined in AR71XX_PCI_IRQ_COUNT. So the second one just is not cascaded. Maybe I am wrong.
the "no irq domain found" comes from an accidentally removed "interrupt-cells" in pci-controller node. But now I met some other errors and I'm checking it.
40/41 are just software defined IRQ values and you can find them in arch/mips/pci/pci-ar71xx.c. They are interrupts dispatched from a specific cpu interrupt(in a way I said above).
I've got it working on QCA9558. I'll post the dts fix for ar7100.dtsi later.
BTW: The address that waiting for parsing its IRQ will be masked by interrupt-map-mask and then matched
in interrupt-map. So changing the last value in interrupt-map-mask to 0 allows using one line for all 4 PCI interrupts.
@981213 Why are you modifying also the ar724x pcie driver?
ar724x is always a pcie interface and pcie isn´t a bus, so only one device per pcie interface.
Is this probably related to the write buffer flush? On ar71xx this was only implemented on interrupts for ge0 and ge1 and for ar934x also on pcie and wmac.
On ath79 it looks like the write buffer is flushed for almost everything (ge0, ge1, wmac, pci, usb) on soc´s from ar71xx till qca95xx...