Orange pi R1 plus support

So what i get from that is my workaround is not ideal. By the way, i got those ram values from rk3328-sdram-lpddr3-666.dtsi . And what about sd card fix? Probably this 1.8V-3.3V regulator is needed

  vcc_io_sdio: sdmmcio-regulator {
  compatible = "regulator-gpio";
  enable-active-high;
  gpios = <&gpio1 28 0>;
  pinctrl-0 = <&sdio_vcc_pin>;
  pinctrl-names = "default";
  regulator-name = "vcc_io_sdio";
  regulator-always-on;
  regulator-min-microvolt = <1800000>;
  regulator-max-microvolt = <3300000>;
  regulator-settling-time-us = <5000>;
  regulator-type = "voltage";
  startup-delay-us = <2000>;
  states = <1800000 0x1
     3300000 0x0>;

my workaround

it's actually a fix :+1:

what about sd card fix

uhs speed is disabled in dts already, try if it will hang during soft reboot

Soft Reboot

previously booted with a working non-uhs sd-card

root@OpenWrt:/# [   77.785000] mmc0: card 0260 removed
[   84.486844] mmc_host mmc0: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
[   84.575510] mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0)
[   84.576530] mmc0: new high speed SDHC card at address 1234
[   84.578672] mmcblk0: mmc0:1234 SA32G 28.8 GiB
[   84.580060] debugfs: Directory 'mmcblk0' with parent 'block' already present!
[   84.582032]  mmcblk0: p1 p2

root@OpenWrt:/# reboot
root@OpenWrt:/# [  102.171256] SQUASHFS error: Failed to read block 0x318fbc: -5
[  102.171816] SQUASHFS error: Unable to read metadata cache entry [318fbc]
[  102.172414] SQUASHFS error: Unable to read inode 0xddc0100
[  102.407005] SQUASHFS error: Failed to read block 0x31db7e: -5
[  102.407564] SQUASHFS error: Unable to read metadata cache entry [31db7e]
[  102.408164] SQUASHFS error: Unable to read inode 0x6ba16a2
[  106.550690] reboot: Restarting system

U-Boot TPL 2021.07-OpenWrt-r22962+4-cf19fd0cb5 (May 19 2023 - 05:22:00)
LPDDR3, 333MHz
BW=32 Col=10 Bk=8 CS0 Row=14 CS1 Row=14 CS=2 Die BW=16 Size=1024MB
Trying to boot from BOOTROM
Returning to boot ROM...

U-Boot SPL 2021.07-OpenWrt-r22962+4-cf19fd0cb5 (May 19 2023 - 05:22:00 +0000)
Trying to boot from MMC1
Card did not respond to voltage select! : -110
spl: mmc init failed with error: -95
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

Cold Boot

tried without uart too. pressed reset button a few times.

U-Boot TPL 2021.07-OpenWrt-r22962+4-cf19fd0cb5 (May 19 2023 - 05:22:00)
LPDDR3, 333MHz
BW=32 Col=10 Bk=8 CS0 Row=14 CS1 Row=14 CS=2 Die BW=16 Size=1024MB
Trying to boot from BOOTROM
Returning to boot ROM...

U-Boot SPL 2021.07-OpenWrt-r22962+4-cf19fd0cb5 (May 19 2023 - 05:22:00 +0000)
Trying to boot from MMC1
Card did not respond to voltage select! : -110
spl: mmc init failed with error: -95
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

You may try some luck with that old patch again: Orange pi R1 plus support - #266 by 1715173329

Anyway many developers tried to workaround this issue for years but there never exists a general fix for it.

Thank you so much Tianling for the clean PR.
Really looking forward to use R1 Plus LTS with clean OpenWrt and Bootloader.

I built an image based on your PR + the suggested patch and will test tomorrow.

Well i copied lines from u-boot rk3328-nanopi-r2s-u-boot.dtsi and rk3328-nanopi-r2s.dts
It is pretty straight-forward. And of course i am not sure which part of this patch made it boot (patch includes Orange pi R1 plus support - #264 by 1715173329) . This might not be the cleanest way to resolve UHS SD-card voltage issue. And does this break "non-LTS" version? If so, we need to adjust patch to patch only files of "LTS" version.

diff --git a/package/boot/uboot-rockchip/patches/103-rockchip-rk3328-Add-support-for-Orange-Pi-R1-Plus.patch b/package/boot/uboot-rockchip/patches/103-rockchip-rk3328-Add-support-for-Orange-Pi-R1-Plus.patch
index 90e36e5e4a..530c6dad1c 100644
--- a/package/boot/uboot-rockchip/patches/103-rockchip-rk3328-Add-support-for-Orange-Pi-R1-Plus.patch
+++ b/package/boot/uboot-rockchip/patches/103-rockchip-rk3328-Add-support-for-Orange-Pi-R1-Plus.patch
@@ -53,24 +53,24 @@ Signed-off-by: Tianling Shen <cnsztl@gmail.com>
 +};
 +
 +&gpio0 {
-+	bootph-pre-ram;
++	u-boot,dm-spl;
 +};
 +
 +&pinctrl {
-+	bootph-pre-ram;
++	u-boot,dm-spl;
 +};
 +
 +&sdmmc0m1_gpio {
-+	bootph-pre-ram;
++	u-boot,dm-spl;
 +};
 +
 +&pcfg_pull_up_4ma {
-+	bootph-pre-ram;
++	u-boot,dm-spl;
 +};
 +
 +/* Need this and all the pinctrl/gpio stuff above to set pinmux */
 +&vcc_sd {
-+	bootph-pre-ram;
++	u-boot,dm-spl;
 +};
 +
 +&gmac2io {
@@ -143,6 +143,24 @@ Signed-off-by: Tianling Shen <cnsztl@gmail.com>
 +		};
 +	};
 +
++	vcc_io_sdio: sdmmcio-regulator {
++		compatible = "regulator-gpio";
++		enable-active-high;
++		gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
++		pinctrl-0 = <&sdio_vcc_pin>;
++		pinctrl-names = "default";
++		regulator-name = "vcc_io_sdio";
++		regulator-always-on;
++		regulator-min-microvolt = <1800000>;
++		regulator-max-microvolt = <3300000>;
++		regulator-settling-time-us = <5000>;
++		regulator-type = "voltage";
++		startup-delay-us = <2000>;
++		states = <1800000 0x1
++			  3300000 0x0>;
++		vin-supply = <&vcc_io>;
++	};
++
 +	vcc_sd: sdmmc-regulator {
 +		compatible = "regulator-fixed";
 +		gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
@@ -347,8 +365,8 @@ Signed-off-by: Tianling Shen <cnsztl@gmail.com>
 +	pmuio-supply = <&vcc_io>;
 +	vccio1-supply = <&vcc_io>;
 +	vccio2-supply = <&vcc18_emmc>;
-+	vccio3-supply = <&vcc_io>;
-+	vccio4-supply = <&vcc_io>;
++	vccio3-supply = <&vcc_io_sdio>;
++	vccio4-supply = <&vcc_18>;
 +	vccio5-supply = <&vcc_io>;
 +	vccio6-supply = <&vcc_io>;
 +	status = "okay";
@@ -386,6 +404,12 @@ Signed-off-by: Tianling Shen <cnsztl@gmail.com>
 +			rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
 +		};
 +	};
++
++	sd {
++		sdio_vcc_pin: sdio-vcc-pin {
++			rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
++		};
++	};
 +};
 +
 +&pwm2 {
@@ -398,7 +422,12 @@ Signed-off-by: Tianling Shen <cnsztl@gmail.com>
 +	disable-wp;
 +	pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
 +	pinctrl-names = "default";
++	sd-uhs-sdr12;
++	sd-uhs-sdr25;
++	sd-uhs-sdr50;
++	sd-uhs-sdr104;
 +	vmmc-supply = <&vcc_sd>;
++	vqmmc-supply = <&vcc_io_sdio>;
 +	status = "okay";
 +};
 +
diff --git a/package/boot/uboot-rockchip/patches/104-rockchip-rk3328-Add-support-for-Orange-Pi-R1-Plus-LT.patch b/package/boot/uboot-rockchip/patches/104-rockchip-rk3328-Add-support-for-Orange-Pi-R1-Plus-LT.patch
index 72470005e6..b22ea5b640 100644
--- a/package/boot/uboot-rockchip/patches/104-rockchip-rk3328-Add-support-for-Orange-Pi-R1-Plus-LT.patch
+++ b/package/boot/uboot-rockchip/patches/104-rockchip-rk3328-Add-support-for-Orange-Pi-R1-Plus-LT.patch
@@ -50,24 +50,24 @@ Signed-off-by: Tianling Shen <cnsztl@gmail.com>
 +};
 +
 +&gpio0 {
-+	bootph-pre-ram;
++	u-boot,dm-spl;
 +};
 +
 +&pinctrl {
-+	bootph-pre-ram;
++	u-boot,dm-spl;
 +};
 +
 +&sdmmc0m1_gpio {
-+	bootph-pre-ram;
++	u-boot,dm-spl;
 +};
 +
 +&pcfg_pull_up_4ma {
-+	bootph-pre-ram;
++	u-boot,dm-spl;
 +};
 +
 +/* Need this and all the pinctrl/gpio stuff above to set pinmux */
 +&vcc_sd {
-+	bootph-pre-ram;
++	u-boot,dm-spl;
 +};
 +
 +&gmac2io {
diff --git a/package/boot/uboot-rockchip/patches/900-rockchip-rk3328-UHS-Fix.patch b/package/boot/uboot-rockchip/patches/900-rockchip-rk3328-UHS-Fix.patch
new file mode 100644
index 0000000000..88b3efe589
--- /dev/null
+++ b/package/boot/uboot-rockchip/patches/900-rockchip-rk3328-UHS-Fix.patch
@@ -0,0 +1,43 @@
+diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
+index b0db1bcd9a..e5fc2a68d4 100644
+--- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
++++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
+@@ -33,6 +33,10 @@
+ 	bootph-pre-ram;
+ };
+ 
++&vcc_io_sdio {
++	u-boot,dm-spl;
++};
++
+ &gmac2io {
+ 	snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ 	snps,reset-active-low;
+diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus.dts b/arch/arm/dts/rk3328-orangepi-r1-plus.dts
+index e38681ae77..5986b07777 100644
+--- a/arch/arm/dts/rk3328-orangepi-r1-plus.dts
++++ b/arch/arm/dts/rk3328-orangepi-r1-plus.dts
+@@ -307,7 +307,7 @@
+ 	bus-width = <4>;
+ 	cap-sd-highspeed;
+ 	disable-wp;
+-	pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>;
++	pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>, <&sdmmc0m1_gpio>;
+ 	pinctrl-names = "default";
+ 	vmmc-supply = <&vcc_sd>;
+ 	status = "okay";
+diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig
+index 3cb3b5c33e..1a8022b0d6 100644
+--- a/configs/orangepi-r1-plus-lts-rk3328_defconfig
++++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
+@@ -57,6 +57,10 @@ CONFIG_FASTBOOT_BUF_ADDR=0x800800
+ CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
+ CONFIG_ROCKCHIP_GPIO=y
+ CONFIG_SYS_I2C_ROCKCHIP=y
++CONFIG_MMC_IO_VOLTAGE=y
++CONFIG_SPL_MMC_IO_VOLTAGE=y
++CONFIG_MMC_UHS_SUPPORT=y
++CONFIG_SPL_MMC_UHS_SUPPORT=y
+ CONFIG_MMC_DW=y
+ CONFIG_MMC_DW_ROCKCHIP=y
+ CONFIG_SF_DEFAULT_SPEED=20000000

edit: I forgot to mention i tried u-boot 2023.07-rc2 with no modification it was successful i mange to get to u-boot console but unable to boot openwrt though.

in 2023.07-rc2 rk3328 was also converted to use "standard boot", that however, didn't seem to work well with openwrt, needs more investigation (suspect it's related to bootscript).

And of course i am not sure which part of this patch made it boot

bootph-pre-ram -> u-boot,dm-spl i guess
the patch is backported from newer version and some property names need to be adapted

I will try to isolate to that then.

That's it. Everything is fine now.

1 Like

Thank you for test! Would you mind leaving a Tested-by tag so I can add it to commit message?

It formats as Tested-by: first-name last-name <email>

Sure! But where? Like i said i am a noob.

Just leave it here :wink:

Tested-by: Volkan Yetik <no3iverson@gmail.com>

1 Like

Thank you!

I keep testing it further. So far i found out that eth0 is not working correctly. Maybe backport motorcomm yt8531 driver too? I don't even now which one is which!! LOL

pc->router on eth1 - rate: 1000 pps

Packets: sent=39599, rcvd=39599, error=0, lost=0 (0.0% loss) in 39.600327 sec
RTTs in ms: min/avg/max/dev: 0.102 / 1.604 / 21.802 / 0.445
Bandwidth in kbytes/sec: sent=59.997, rcvd=59.997

pc->router on eth0 - rate: 1000 pps

Packets: sent=39599, rcvd=37691, error=0, lost=1908 (4.8% loss) in 39.603737 sec
RTTs in ms: min/avg/max/dev: 0.066 / 0.920 / 21.937 / 0.955
Bandwidth in kbytes/sec: sent=59.992, rcvd=57.102

router->gateway on eth0 - rate: 1 pps

42 packets transmitted, 36 packets received, 14% packet loss
round-trip min/avg/max = 0.819/0.964/1.494 ms

pc->gateway eth1->eth0 - rate: 10 pps

Packets: sent=395, rcvd=225, error=0, lost=170 (43.0% loss) in 39.414933 sec
RTTs in ms: min/avg/max/dev: 0.990 / 1.188 / 1.936 / 0.099
Bandwidth in kbytes/sec: sent=0.601, rcvd=0.342

i see there is already a driver for it.

yep, if the driver didnt work you wouldn see that eth0 port at all
unfortunately i dont own that device any longer, not sure what's going wrong with it

I meant it is already backported by you. All of them are in this PR.

I know that :wink:

I returned this device 1 year ago...
But in my memory I didn't ever hear anybody reported this issue.

Could you please check our ImmortalWrt firmware and see if it has the same regression?

Link: https://downloads.immortalwrt.org/snapshots/targets/rockchip/armv8/immortalwrt-rockchip-armv8-xunlong_orangepi-r1-plus-lts-squashfs-sysupgrade.img.gz