I don't remember the details, but basically, Lantiq has two instances of the interrupt controller. Each is connected to a separate VPE. Every interrupt is connected to both interrupt controllers. Interrupts are mapped to specific lines of the CPU's interrupt controller:
0-31 -> IM2,
31-63 -> IM3,
etc.
Interrupts are scheduled to the appropriate VPE based on the mask bits in the ICU. Does this answer your question in somehow?
There was once an effort to rewrite the interrupt controller[1] and send it upstream, but it was never completed.
Okay, I think it’s a pretty clear picture that the Lantiq interrupt controller did not follow the spec re 34K Manual (MD00534) Section 6.3.1.3 rev 1.13 page 136
Oh that is really interesting, because AFAIK that flag does not come from the intc, it comes from the CPU, so I think probably somewhere in the lantiq prom / init code, it’s shutting it off so that the intc won’t have to deal with VEIC.
EDIT: Okay I think you’re right and they either killed that flag off in the MIPS core, or the bootloader is manipulating some registers to make it disappear. If it was what I was thinking, the flag would still be there but VEIC would just not be running in Linux.
Just an update for those out of the loop. A number of patches were merged for a few .dts device variants and early Ethernet support was added. https://github.com/openwrt/openwrt/pull/23135
Hey, sorry to jump in here — i've been reading this thread for a while and it helped me a lot.
I have another EN751221 device running OpenWrt and i wanted to share it, since it's the same SoC family: the TP-Link Archer XR500v (a GPON HGW, looks like a rebadged TrendChip/EcoNet design).
Two honest things first:
I'm not really a kernel dev. I did a big part of this with AI help and a lot of trial-and-error on the real board. But everything i say here is tested on the actual device, not just "it compiles".
And big thanks to @cjdelisle — without your EN751221 mainline source this would not even boot. It really worked thanks to that
What is working right now (OpenWrt 6.12, on the real hardware):
LAN, 4x GbE — this was the hardest part. The board has the dual cascaded MT7530 (the on-die one + the MCM one over MDIO 0x1f). I ended up modeling it as a nested DSA tree (the MCM switch as a child of the on-die switch mdio bus) and that brought up all 4 LAN ports + bridge + internet, without the mdio-master code. Maybe there is a cleaner way to express it, feedback very welcome.
WiFi 2.4GHz (MT7603 / mt7603e) + 5GHz (MT7662 / mt76x2e), both as AP
USB 2.0, 256MB RAM, all the panel LEDs working (no blob)
Phone / VoIP, 2x FXS (Le9642 SLIC over ZSI) — clean SIP calls, the driver is a reconstruction
GPON WAN: not supported (it's a separate MAC block)
The device was basically undocumented anywhere, so i wrote docs for each subsystem. Repo + docs:
Sorry if my english is not perfect . If someone has one of these, or wants to look at the DSA part, i would love to compare notes.
I've opened a PR ( #23533 in OpenWrt) to add support for the ChinaMobile GS3101, this has a persistent UBI filesystem () which I will be adding to other variants soon.
I've creates an amazon store where people who don't have EcoNet devices can buy GS3101s. It's experimental at this point but if it works out, I can add more devices. It's 30€ for a package of 2 devices with OpenWrt pre-installed.
NOTE: The GS3101 wifi chip is unreliable and so it is disabled.