Omada Er7212pc with Marvell (DB-88F3720-DDR3)

Hardware Questions and Recommendations
65

OK update.
Curl + python FTP worked OK and was less hassle to configure.

the source release already gives us a device tree file which is nice.
Doesn't look like it has all the dsa and labelling stuff?
Nor does it have the flash partitions.

The directory looks like it's an openwrt build system but I haven't tried to date it.
Kernel looks like 4.4? Also it has compatible as oc200v2 haha. Other parts have copyright 2017?

Device tree says 115200n8 for serial.

I found partition.json and that looks like it has the base address and sizes. Will need to verify on hardware with the actual flash dump.

Please forgive any transcription errors I didn't double check but it should look something like this:

this is the SPI flash for bootloader.

name base size
u-boot 0x00000000 0x000E8000
tddp 0x000E8000 0x00010000
u-boot-env 0x000F8000 0x00008000

This is the emmc (i.e. the sd card controller in the device tree)

name base size
mbr 0x00000000 0x00010000
partition 0x00010000 0x00010000
device-info 0x00020000 0x00010000
support-list 0x00030000 0x00010000
firmware-info 0x00040000 0x00010000
dtb 0x00070000 0x00010000
kernel 0x00080000 0x01000000
kernel-recovery 0x01080000 0x01000000
rootfs 0x02080000 0x10000000
rootfs-recovery 0x12080000 0x10000000
user-config 0x22080000 0x00A00000
data 0x22A80000 0xDB300000

edit:
Also looks like they give you the script to make the update flash file and the magic word.

./tplink/configs/er7212pc_un_v1/makeflash.py

edit:
Using strings on the binary of mtd0 yielded the following as the u-boot environment?

I'll try to work on extracting the binaries for the fdt and see if I can map it to what's provided in the source release.

IDK how one triggers the httpd stuff in the bootloader on these targets? I would assume there's TP link documentation somewhere?

bootcmd=run set_bootargs; run loadfdt; run loadkernel; booti $kernel_addr - $fdt_addr; if test ${booti_result} = failed; then httpd; fi
bootdelay=1
baudrate=115200
ethprime=eth1
ipaddr=192.168.0.10
serverip=192.168.0.101
preboot=
gatewayip=192.168.0.1
netmask=255.255.255.0
kernel_addr=0x5000000
initrd_addr=0xa00000
initrd_size=0x2000000
fdt_addr=0x4f00000
loadaddr=0x5000000
fdt_high=0xffffffffffffffff
hostname=oc200v2
netdev=eth0
ethaddr=<mac>
eth1addr=<mac+1>
eth2addr=<mac+2>
eth3addr=<mac+3>
2 Likes
66

In typical TP Link fashion, a V2 revision was released with totally different hardware. The source code indicates it is based on the MT7986 SoC with MT7531 switch chips.

1 Like
67

special strategy for the V2.
However the main chip MT7986 always has the two 2.5gb ports.

68

The MT7986's 2.5 links each connect to a MT7531 switch. Each switch serves 5 RJ45 ports, and 1 SFP.

Relevant snippets from the DTS:

gsw: gsw@0 {
	compatible = "mediatek,mt753x";
	mediatek,ethsys = <&ethsys>;
	#address-cells = <1>;
	#size-cells = <0>;
};

gsw1: gsw1@1 {
	compatible = "mediatek,mt753x";
	mediatek,ethsys = <&ethsys>;
	#address-cells = <1>;
	#size-cells = <0>;
};

&gsw {
	mediatek,mdio = <&mdio>;
	mediatek,portmap = "wllll";
	mediatek,mdio_master_pinmux = <1>;
	mediatek,smi-addr = <0x1e>;
	reset-gpios = <&pio 32 0>;
	interrupt-parent = <&pio>;
	interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
	status = "okay";

	gsw_port5: port@5 {
                compatible = "mediatek,mt753x-port";
                reg = <5>;
                phy-mode = "sgmii";
                fixed-link {
                        speed = <1000>;
                        full-duplex;
                };
        };
	gsw_port6: port@6 {
			compatible = "mediatek,mt753x-port";
			reg = <6>;
			phy-mode = "sgmii";
			fixed-link {
				speed = <2500>;
				full-duplex;
			};
	};
};

&gsw1 {
	mediatek,mdio = <&mdio>;
	mediatek,portmap = "wllll";
	mediatek,mdio_master_pinmux = <1>;
	reset-gpios = <&pio 23 0>;
	interrupt-parent = <&pio>;
	interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
	status = "okay";
	gsw1_port5: port@5 {
                compatible = "mediatek,mt753x-port";
                reg = <5>;
                phy-mode = "sgmii";
                fixed-link {
                        speed = <1000>;
                        full-duplex;
                };
        };
	
	gsw1_port6: port@6 {
			compatible = "mediatek,mt753x-port";
			reg = <6>;
			phy-mode = "sgmii";
			fixed-link {
				speed = <2500>;
				full-duplex;
			};
	};
};

&eth {
	status = "okay";

	gmac0: mac@0 {
		compatible = "mediatek,eth-mac";
		reg = <0>;
		phy-mode = "2500base-x";

		fixed-link {
			speed = <2500>;
			full-duplex;
			pause;
		};
	};

	gmac1: mac@1 {
		compatible = "mediatek,eth-mac";
		reg = <1>;
		phy-mode = "2500base-x";

		fixed-link {
			speed = <2500>;
			full-duplex;
			pause;
		};
	};
};
69

Very interesting, a very different approach. The v2 has a real boost compared to the v1.

I really hope we can make a stable release for these devices.

70

I'm very tempted to buy a V2 to work on it. I'm okay with crafting a DTS etc, but I have no experience working with bootloaders etc. Since it's such a new device, I'm afraid there would not be many people to collaborate.

71

Nice work! I have a ER7212PC v1 also. Where are you at with the build? I would like to help out where i can. I've never built firmware before but i can follow directions and help provide whats missing, if anything.