Mips (MT76x8 MT7621) Cache problem (not truly Lede related)

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Guys,

I realize its more a programming question, but I tried asking on other forums and no good answer...

I'm trying to use the scatter/gather DMA function within the mentioned SoC's. It seems I'm running in some kind of CPU cache problem. I understand the "dma_map_sg", "unmap" and "sync" functions, but for some reason the data is still corrupted.

If I "add" enough delays in the form of "dev_info" / "printk" to debug this problem, the problem disappears. I tried adding "bounce" buffers, but that (obviously) reduces performance but doesn't seem to solve the problem.

Would you be so kind and point me in the right direction, cause the devs on this forum seem to be the most knowledgeable on this topic (even linux-mips didn't really help).

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You may want to email Neil Brown about this. He recently fixed a cache coherency issue with mt7621 where the first core was getting its cache invalidated but not the second.

I've actually noticed that MIPS seems to have many cache coherency issues. Check this email thread: http://lists.infradead.org/pipermail/openwrt-devel/2018-May/012135.html

I don't think it's the same issue you're having. But it's a similar issue. Data corruption in 32 byte chunks.

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