Hi, i post here the dts archive. I’m certanly using the dsa driver, but i think that’s neccesary for using the switch? Am I right?
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/regulator/st,stm32mp25-regulator.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "stm32mp257.dtsi"
#include "stm32mp25xf.dtsi"
#include "stm32mp25-pinctrl.dtsi"
#include "stm32mp25xxak-pinctrl.dtsi"
#include "stm32mp257f-ev1-ca35tdcid-resmem.dtsi"
/ {
model = "GradDeck by Gradhoc";
compatible = "st,stm32mp257f-ev1", "st,stm32mp257";
aliases {
ethernet0 = ð1;
ethernet1 = ð2;
serial0 = &uart5;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x1 0x0>;
};
/* Switch RTL8367S usando interfaz SMI */
switch1: switch@0 {
compatible = "realtek,rtl8365mb";
/* SMI interface - bit-banging usando GPIOs */
mdc-gpios = <&gpioc 6 GPIO_ACTIVE_HIGH>;
mdio-gpios = <&gpioc 5 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpioa 2 GPIO_ACTIVE_LOW>;
reset-assert-us = <50000>;
reset-deassert-us = <300000>;
/* MDIO interno para los PHYs integrados del switch */
mdio {
compatible = "realtek,smi-mdio";
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
phy-handle = <&phy0>;
};
port@1 {
reg = <1>;
label = "lan2";
phy-handle = <&phy1>;
};
port@2 {
reg = <2>;
label = "lan3";
phy-handle = <&phy2>;
};
port@7 {
reg = <7>;
label = "cpu";
ethernet = <ð2>;
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
};
};
};
&a35ss_syscfg {
status = "okay";
};
&arm_wdt {
timeout-sec = <32>;
status = "okay";
};
&combophy {
clocks = <&rcc CK_BUS_USB3PCIEPHY>, <&rcc CK_KER_USB3PCIEPHY>;
clock-names = "apb-clk", "ker-clk";
st,rx_equalizer = <1>;
status = "okay";
};
&crc {
status = "disabled";
};
&cryp1 {
status = "disabled";
};
/* ETH1 - WAN con PHY RTL8211F */
ð1 {
status = "okay";
pinctrl-0 = <ð1_mdio_pins_mx>, <ð1_rgmii_pins_mx>;
pinctrl-1 = <ð1_mdio_sleep_pins_mx>, <ð1_rgmii_sleep_pins_mx>;
pinctrl-names = "default", "sleep";
phy-mode = "rgmii-id";
max-speed = <1000>;
phy-handle = <&phy1_eth1>;
st,ext-phyclk;
mdio1 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy1_eth1: ethernet-phy@5 {
compatible = "ethernet-phy-id001c.c916";
reg = <5>;
reset-gpios = <&gpiof 3 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <80000>;
realtek,eee-disable;
};
};
};
ð2 {
status = "okay";
pinctrl-0 = <ð2_rgmii_pins_a>;
pinctrl-1 = <ð2_rgmii_sleep_pins_a>;
pinctrl-names = "default", "sleep";
/* Probar sin delays primero */
phy-mode = "rgmii-id";
max-speed = <1000>;
st,ext-phyclk;
st,eth-ptp-from-rcc;
clock-names = "stmmaceth",
"mac-clk-tx",
"mac-clk-rx",
"ptp_ref",
"ethstp",
"eth-ck";
clocks = <&rcc CK_ETH2_MAC>,
<&rcc CK_ETH2_TX>,
<&rcc CK_ETH2_RX>,
<&rcc CK_KER_ETH2PTP>,
<&rcc CK_ETH2_STP>,
<&rcc CK_KER_ETH2>;
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
&gpu {
status = "okay";
};
&hpdma {
memory-region = <&hpdma1_lli>;
};
&hpdma2 {
memory-region = <&hpdma2_lli>;
};
&hpdma3 {
memory-region = <&hpdma3_lli>;
};
&ipcc1 {
status = "okay";
};
&ipcc2 {
status = "okay";
};
&lptimer3 {
status = "okay";
timer {
status = "okay";
};
};
&pcie_rc {
pinctrl-names = "default", "init", "sleep";
pinctrl-0 = <&pcie_pins_a>;
pinctrl-1 = <&pcie_init_pins_a>;
pinctrl-2 = <&pcie_sleep_pins_a>;
status = "okay";
};
&rtc {
status = "okay";
};
&sdmmc2 {
pinctrl-names = "default", "opendrain", "sleep";
pinctrl-0 = <&sdmmc2_pins_mx>;
pinctrl-1 = <&sdmmc2_opendrain_pins_mx>;
pinctrl-2 = <&sdmmc2_sleep_pins_mx>;
vmmc-supply = <&scmi_vdd_emmc>;
vqmmc-supply = <&scmi_v1v8>;
status = "okay";
};
&scmi_regu {
scmi_vddio1: regulator@0 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
scmi_vddcore: regulator@b {
reg = <VOLTD_SCMI_STPMIC2_BUCK2>;
regulator-name = "vddcore";
};
scmi_v1v8: regulator@e {
reg = <VOLTD_SCMI_STPMIC2_BUCK5>;
regulator-name = "v1v8";
};
scmi_v3v3: regulator@10 {
reg = <VOLTD_SCMI_STPMIC2_BUCK7>;
regulator-name = "v3v3";
};
scmi_vdd_emmc: regulator@12 {
reg = <VOLTD_SCMI_STPMIC2_LDO2>;
regulator-name = "vdd_emmc";
};
scmi_vdd3v3_usb: regulator@14 {
reg = <VOLTD_SCMI_STPMIC2_LDO4>;
regulator-name = "vdd3v3_usb";
};
scmi_vdd_sdcard: regulator@17 {
reg = <VOLTD_SCMI_STPMIC2_LDO7>;
regulator-name = "vdd_sdcard";
};
};
&uart5 {
pinctrl-names = "default", "idle", "sleep";
pinctrl-0 = <&uart5_pins_mx>;
pinctrl-1 = <&uart5_idle_pins_mx>;
pinctrl-2 = <&uart5_sleep_pins_mx>;
status = "okay";
};
