Looking for info and possibility of (future) support of TP-Link Omada er605 Router

Weird, must still be testing

I see 6.1 support was added to ramips 11 days ago, mediatek was switched to 6.1 for snapshots 5 days ago.
https://git.openwrt.org/?p=openwrt/openwrt.git;a=shortlog;h=refs/heads/master;pg=1

Yes, still in testing mode.

Have you been able to obtain a v1 or shall I send you mine?

Does anybody know exactly how to wire up a USB to serial adapter to the ER605? I can't access the web interface or SSH from my router after some opkg updates on a snapshot router.

At the moment, I don't have the time to work on v1 support.

Thank you for replying.

Morning, decided to replace my aging TP-Link 1043ND V2 with something newer, whilst been concious of costs so went for the ER605.

Followed the instructions through on the github repo to the tea - had to do things slightly differently because I wasn't using the ER605 as my main router, just connected it to my network with a different IP and couldn't see anywhere within the UI to set a custom DNS/Gateway, so it had no internet access (suppose I could have connected the WAN port to one of my switch ports). So pulled the files from a local web server.

Anyway, all up and running and the process went absolutely fine.

I've noticed this in the system logs though and just want to check if this can be ignored:

Mon Apr  1 10:27:49 2024 kern.notice kernel: [    0.650504] 5 fixed-partitions partitions found on MTD device mt7621-nand
Mon Apr  1 10:27:49 2024 kern.notice kernel: [    0.657307] Creating 5 MTD partitions on "mt7621-nand":
Mon Apr  1 10:27:49 2024 kern.notice kernel: [    0.662519] 0x000000000000-0x000000080000 : "u-boot"
Mon Apr  1 10:27:49 2024 kern.notice kernel: [    0.676541] 0x000000080000-0x000000100000 : "u-boot-env"
Mon Apr  1 10:27:49 2024 kern.notice kernel: [    0.690715] 0x000000100000-0x000000140000 : "factory"
Mon Apr  1 10:27:49 2024 kern.notice kernel: [    0.700874] 0x000000140000-0x000007e00000 : "firmware"
Mon Apr  1 10:27:49 2024 kern.notice kernel: [    2.625132] 0x000007e00000-0x000008000000 : "panic-ops"
Mon Apr  1 10:27:49 2024 kern.err kernel: [    2.796075] mtk_soc_eth 1e100000.ethernet: generated random MAC address 4e:00:eb:d4:af:2a
Mon Apr  1 10:27:49 2024 kern.err kernel: [    2.804412] mtk_soc_eth 1e100000.ethernet: generated random MAC address 3e:c1:c5:15:52:06

Can't see those MAC addresses within the Interfaces at all, and the MAC addresses associated with the LAN/WAN ports do seem to stick on reboot.

Just another little update since switching to the ER605 v2 from the 1043ND v2 - download/upload speeds do seem to be just as good as I achieved on the old router, but the actual latency of the connection seems far worse.

Here in the UK thinkbroadband have a service to monitor the latency/packet loss of your connection, quite simple in terms of just pinging your Public WAN addres every minute and plotting it on a graph.

Now Virgin Media is quite well known for having higher latency due to the nature of DOCSIS networks, but since swapping the router yesterday morning there is a noticible jump.

I've enabled the software & hardware flow offload within the firewall section & packet steering was already enabled within global network options - tried turning this off but made no difference.

Any ideas/suggestions?

Hello, I tried @chill1Penguin's guide at GitHub except for the firmware backup which I didn't get to work. Got to boot the openwrt initramfs image, then uploaded the 23.05 sysupgrade image. I waited for 30 minutes after flashing the sysupgrade image and still no sign of life, only the power light is on and the router boots to emergency mode which does nothing when you try to flash through the web ui. Is there any way I can recover the router? Not looking to restore the stock firmware as I bought this to flash Openwrt on.

Also, here's the diagram for the UART headers on the board:

I soldered on a UART console on the router, here's the output from the console:


===================================================================
                MT7621   stage1 code Dec 16 2019 17:45:55 (ASIC)
                CPU=500000000 HZ BUS=166666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11000000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL2 FB_DL: 0x7, 1/0 = 524/500 1D000000
PLL4 FB_DL: 0x15, 1/0 = 529/495 55000000
PLL3 FB_DL: 0x1d, 1/0 = 546/478 75000000
DDR patch working
do DDR setting..[01F40000]
Apply DDR3 Setting...(use default AC)
          0    8   16   24   32   40   48   56   64   72   80   88   96  104  11                                                                                        2  120
      --------------------------------------------------------------------------                                                                                        ------
0000:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0001:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0002:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0003:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0004:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0005:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0006:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0007:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0008:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0009:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
000A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
000B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
000C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
000D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            1    1
000E:|    0    0    0    0    0    0    0    0    1    1    1    1    1    1                                                                                            1    1
000F:|    0    0    0    1    1    1    1    1    1    1    1    1    1    0                                                                                            0    0
0010:|    1    1    1    1    1    1    1    1    0    0    0    0    0    0                                                                                            0    0
0011:|    1    1    1    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0012:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0013:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0014:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0015:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0016:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0017:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0018:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
0019:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
001A:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
001B:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
001C:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
001D:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
001E:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
001F:|    0    0    0    0    0    0    0    0    0    0    0    0    0    0                                                                                            0    0
DRAMC_DQSCTL1[0e0]=13000000
DRAMC_DQSGCTL[124]=80000033
rank 0 coarse = 15
rank 0 fine = 64
B:|    0    0    0    0    0    0    0    1    1    1    0    0    0    0    0                                                                                            0
opt_dle value:8
DRAMC_DDR2CTL[07c]=C287220D
DRAMC_PADCTL4[0e4]=000022B3
DRAMC_DQIDLY1[210]=07050506
DRAMC_DQIDLY2[214]=01030304
DRAMC_DQIDLY3[218]=08070606
DRAMC_DQIDLY4[21c]=09050A08
DRAMC_R0DELDLY[018]=00001C1C
==================================================================
                RX      DQS perbit delay software calibration
==================================================================
1.0-15 bit dq delay value
==================================================================
bit|     0  1  2  3  4  5  6  7  8  9
--------------------------------------
0 |    5 3 4 5 3 3 2 1 3 6
10 |    5 5 6 8 3 8
--------------------------------------

==================================================================
2.dqs window
x=pass dqs delay value (min~max)center
y=0-7bit DQ of every group
input delay:DQS0 =28 DQS1 = 28
==================================================================
bit     DQS0     bit      DQS1
0  (1~54)27  8  (1~50)25
1  (1~52)26  9  (1~55)28
2  (1~54)27  10  (1~52)26
3  (0~52)26  11  (1~49)25
4  (1~54)27  12  (1~51)26
5  (1~56)28  13  (1~51)26
6  (1~53)27  14  (2~51)26
7  (1~56)28  15  (1~54)27
==================================================================
3.dq delay value last
==================================================================
bit|    0  1  2  3  4  5  6  7  8   9
--------------------------------------
0 |    6 5 5 7 4 3 3 1 6 6
10 |    7 8 8 10 5 9
==================================================================
==================================================================
     TX  perbyte calibration
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqsdly_pass[0]=15,  finish count=1
dqs_perbyte_dly.last_dqsdly_pass[1]=15,  finish count=2
DQ loop=15, cmp_err_1 = ffff05fe
DQ loop=14, cmp_err_1 = ffff019a
DQ loop=13, cmp_err_1 = ffff0182
DQ loop=12, cmp_err_1 = ffff0002
dqs_perbyte_dly.last_dqdly_pass[1]=12,  finish count=1
DQ loop=11, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=11,  finish count=2
byte:0, (DQS,DQ)=(a,8)
byte:1, (DQS,DQ)=(9,8)
DRAMC_DQODLY1[200]=88888888
DRAMC_DQODLY2[204]=88888888
20,data:9a
[EMI] DRAMC calibration passed

===================================================================
                MT7621   stage1 code done
                CPU=500000000 HZ BUS=166666666 HZ
===================================================================

U-Boot SPL 2018.09 (Dec 21 2022 - 20:39:08 +0800)
Trying to boot from NAND

Any chance to recover this?