I realize some IRQs cannot be balanced but I am not seeing any difference here in terms of what is being balanced. Hardware is RPi4. Is the conclusion that only irq11, IPI0, IPI1, and IPI5 can be balanced and that they are doing so by something else?
Any thoughts are appreciated.
With irqbalance:
CPU0 CPU1 CPU2 CPU3
11: 15081967 15068518 5342430 4361340 GICv2 30 Level arch_timer
14: 639535 0 0 0 GICv2 65 Level fe00b880.mailbox
17: 12 0 0 0 GICv2 153 Level uart-pl011
20: 31 0 0 0 GICv2 114 Level DMA IRQ
27: 1 0 0 0 GICv2 66 Level VCHIQ doorbell
28: 269012 0 0 0 GICv2 158 Level mmc1, mmc0
35: 459841672 0 0 0 GICv2 189 Level eth0
36: 351174703 0 0 0 GICv2 190 Level eth0
42: 0 0 0 0 GICv2 175 Level PCIe PME, aerdrv
43: 28925802 0 0 0 BRCM STB PCIe MSI 524288 Edge xhci_hcd
IPI0: 9622 10363 10642 12569 Rescheduling interrupts
IPI1: 376961 97416958 74494146 94990913 Function call interrupts
IPI2: 0 0 0 0 CPU stop interrupts
IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
IPI4: 0 0 0 0 Timer broadcast interrupts
IPI5: 1065906 837730 1017399 764542 IRQ work interrupts
IPI6: 0 0 0 0 CPU wake-up interrupts
Err: 0
Without irqbalance:
# cat /proc/interrupts
CPU0 CPU1 CPU2 CPU3
11: 46858 1587140 60911 443193 GICv2 30 Level arch_timer
14: 9620 0 0 0 GICv2 65 Level fe00b880.mailbox
17: 12 0 0 0 GICv2 153 Level uart-pl011
20: 31 0 0 0 GICv2 114 Level DMA IRQ
27: 1 0 0 0 GICv2 66 Level VCHIQ doorbell
28: 15676 0 0 0 GICv2 158 Level mmc1, mmc0
35: 5799505 0 0 0 GICv2 189 Level eth0
36: 3804625 0 0 0 GICv2 190 Level eth0
42: 0 0 0 0 GICv2 175 Level PCIe PME, aerdrv
43: 835746 0 0 0 BRCM STB PCIe MSI 524288 Edge xhci_hcd
IPI0: 2675 2378 1987 1897 Rescheduling interrupts
IPI1: 25709 1645239 175854 1652499 Function call interrupts
IPI2: 0 0 0 0 CPU stop interrupts
IPI3: 0 0 0 0 CPU stop (for crash dump) interrupts
IPI4: 0 0 0 0 Timer broadcast interrupts
IPI5: 7390 3128 13045 4519 IRQ work interrupts
IPI6: 0 0 0 0 CPU wake-up interrupts
Err: 0