Finally I solved this issue by myself (again)
At first i used @chunkeey 's staging tree, which has switched to DSA driver (Kernel 4.19 only)
That didn't fix the issue, but at least it didn't panic anymore
[ 0.692126] libphy: ipq40xx_mdio: probed
[ 0.698865] libphy: Fixed MDIO Bus: probed
[ 1.895127] PHY 0 single test PSGMII issue happen!
[ 2.768637] PHY 1 single test PSGMII issue happen!
[ 3.642123] PHY 2 single test PSGMII issue happen!
[ 4.515581] PHY 3 single test PSGMII issue happen!
[ 5.389077] PHY 4 single test PSGMII issue happen!
[ 6.262583] PHY0 test see issue!
[ 6.266638] PHY1 test see issue!
[ 6.270683] PHY2 test see issue!
[ 6.274733] PHY3 test see issue!
[ 6.278777] PHY4 test see issue!
... repeat 100 times
And as he mentioned in this reply Ipq4018 dk01.1 kernel panic , a patch is needed to reset the phy via a GPIO pin
patch, slightly modified
diff --git a/target/linux/ipq40xx/patches-4.19/857-ipq40xx-Fix-mdio-driver-to-work-with-IPQ40xx-SoC.patch b/target/linux/ipq40xx/patches-4.19/857-ipq40xx-Fix-mdio-driver-to-work-with-IPQ40xx-SoC.patch
new file mode 100644
index 0000000000..1545ed477a
--- /dev/null
+++ b/target/linux/ipq40xx/patches-4.19/857-ipq40xx-Fix-mdio-driver-to-work-with-IPQ40xx-SoC.patch
@@ -0,0 +1,91 @@
+From 1d8433be4af4a5862b8805a5668d404bd6fde945 Mon Sep 17 00:00:00 2001
+From: Ram Chandra Jangir <rjangir at codeaurora.org>
+Date: Tue, 28 Mar 2017 22:32:07 +0530
+Subject: [PATCH] ipq40xx: Fix mdio driver to work with IPQ40xx SoC
+
+- Add phy-reset-gpio support in probe function to fix hang
+ at board booting.
+- Add proper assignment of mii_bus read/write operations
+
+Signed-off-by: Ram Chandra Jangir <rjangir at codeaurora.org>
+---
+ drivers/net/phy/mdio-ipq40xx.c | 56 +++++++++++++++++++++++++++++++++++++++---
+ 1 file changed, 51 insertions(+), 1 deletions(-)
+
+diff --git a/drivers/net/phy/mdio-ipq40xx.c b/drivers/net/phy/mdio-ipq40xx.c
+index 335d531..6f13c96 100644
+--- a/drivers/net/phy/mdio-ipq40xx.c
++++ b/drivers/net/phy/mdio-ipq40xx.c
+@@ -22,6 +22,7 @@
+ #include <linux/of_mdio.h>
+ #include <linux/phy.h>
+ #include <linux/platform_device.h>
++#include <linux/of_gpio.h>
+
+ #define MDIO_CTRL_0_REG 0x40
+ #define MDIO_CTRL_1_REG 0x44
+@@ -121,11 +122,61 @@ static int ipq40xx_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
+ return 0;
+ }
+
++static int ipq40xx_phy_reset(struct platform_device *pdev)
++{
++ struct device_node *mdio_node;
++ int phy_reset_gpio_number;
++ int ret;
++
++ mdio_node = of_find_node_by_name(NULL, "mdio");
++ if (!mdio_node) {
++ dev_err(&pdev->dev, "Could not find mdio node\n");
++ return -ENOENT;
++ }
++
++ ret = of_get_named_gpio(mdio_node, "phy-reset-gpio", 0);
++ if (ret < 0) {
++ dev_warn(&pdev->dev, "Could not find DT gpio phy-reset-gpio missing/malformed:%d\n",ret);
++ ret = 0;
++ return ret;
++ }
++
++ phy_reset_gpio_number = ret;
++
++ ret = gpio_request(phy_reset_gpio_number, "phy-reset-gpio");
++ if (ret) {
++ dev_err(&pdev->dev, "Can't get phy-reset-gpio %d\n", ret);
++ return ret;
++ }
++
++ ret = gpio_direction_output(phy_reset_gpio_number, 0x0);
++ if (ret) {
++ dev_err(&pdev->dev,
++ "Can't set direction for phy-reset-gpio %d\n", ret);
++ goto phy_reset_out;
++ }
++
++ usleep_range(1000, 10005);
++
++ gpio_set_value(phy_reset_gpio_number, 0x01);
++
++phy_reset_out:
++ gpio_free(phy_reset_gpio_number);
++
++ return ret;
++}
++
+ static int ipq40xx_mdio_probe(struct platform_device *pdev)
+ {
+ struct ipq40xx_mdio_data *am;
+ struct resource *res;
+- int i;
++ int i, ret;
++
++ ret = ipq40xx_phy_reset(pdev);
++ if (ret) {
++ dev_err(&pdev->dev, "Could not find qca8075 reset gpio\n");
++ return ret;
++ }
+
+ am = devm_kzalloc(&pdev->dev, sizeof(*am), GFP_KERNEL);
+ if (!am)
+--
+2.7.2
And here's the working DTS (with DSA driver):
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Some model";
compatible = "some,model", "qcom,ipq4019";
aliases {
ethernet0 = &gmac;
};
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};
soc {
tcsr@1949000 {
compatible = "qcom,tcsr";
reg = <0x1949000 0x100>;
qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
};
tcsr@194b000 {
compatible = "qcom,tcsr";
reg = <0x194b000 0x100>;
qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
status = "okay";
};
tcsr@1957000 {
compatible = "qcom,tcsr";
reg = <0x1957000 0x100>;
qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
};
usb2: usb2@60f8800 {
status = "okay";
dwc3@6000000 {
#address-cells = <1>;
#size-cells = <0>;
usb2_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
};
serial@78af000 {
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
status = "okay";
};
serial@78b0000 {
status = "okay";
};
i2c@78b7000 {
status = "okay";
};
usb3_ss_phy: ssphy@9a000 {
status = "okay";
};
usb3_hs_phy: hsphy@a6000 {
status = "okay";
};
usb3: usb3@8af8800 {
status = "okay";
dwc3@8a00000 {
#address-cells = <1>;
#size-cells = <0>;
usb3_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
usb3_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};
crypto@8e3a000 {
status = "okay";
};
watchdog@b017000 {
status = "okay";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&mdio {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
phy-reset-gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>;
};
&psgmii_phy {
status = "okay";
};
&ess {
status = "okay";
ports {
/delete-node/ port@1;
/delete-node/ port@2;
/delete-node/ port@3;
port@4 {
label = "lan";
};
port@5 {
label = "wan";
};
};
};
&gmac {
status = "okay";
};
&blsp_dma {
status = "okay";
};
&cryptobam {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&tlmm {
serial_0_pins: serial0-pinmux {
mux {
pins = "gpio16", "gpio17";
function = "blsp_uart0";
bias-disable;
};
};
spi_0_pins: spi_0_pinmux {
pinmux {
function = "blsp_spi0";
pins = "gpio13", "gpio14", "gpio15";
};
pinmux_cs {
function = "gpio";
pins = "gpio12";
};
pinconf {
pins = "gpio13", "gpio14", "gpio15";
drive-strength = <12>;
bias-disable;
};
pinconf_cs {
pins = "gpio12";
drive-strength = <2>;
bias-disable;
output-high;
};
};
mdio_pins: mdio_pinmux {
mux_1 {
pins = "gpio6";
function = "mdio";
bias-pull-up;
};
mux_2 {
pins = "gpio7";
function = "mdc";
bias-pull-up;
};
};
};
&usb3_ss_phy {
status = "okay";
};
&usb3_hs_phy {
status = "okay";
};
&usb2_hs_phy {
status = "okay";
};
&wifi0 {
status = "okay";
};
&wifi1 {
status = "okay";
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
flash@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <24000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "0:SBL1";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "0:MIBIB";
reg = <0x40000 0x20000>;
read-only;
};
partition@60000 {
label = "0:QSEE";
reg = <0x60000 0x60000>;
read-only;
};
partition@c0000 {
label = "0:CDT";
reg = <0xc0000 0x10000>;
read-only;
};
partition@d0000 {
label = "0:DDRPARAMS";
reg = <0xd0000 0x10000>;
read-only;
};
partition@e0000 {
label = "0:APPSBLENV";
reg = <0xe0000 0x10000>;
read-only;
};
partition@f0000 {
label = "0:APPSBL";
reg = <0xf0000 0x80000>;
read-only;
};
partition@170000 {
label = "0:ART";
reg = <0x170000 0x10000>;
read-only;
};
partition@180000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x180000 0x1e80000>;
};
};
};
};