FW ENV broken on ESPRESSOBIN-ULTRA (21.02-RC3)

I assume it's PCI WLAN?

If so, the module is bugged, so you gotta toggle the power enable during boot, easiest way is to modify the bootscript and add:

# Reset Wifi PDn GPIO pin to workaround hardware issues
echo "Resetting PCIe WLAN card"
gpio clear GPIO14
sleep 2
gpio set GPIO14

Before the load command

I'll try that. Any word from Globalscale on the mtd fix?

What MTD fix?

Dont expect Globalscale to do anything, they have their Ubuntu fork and that's it.

You said you were waiting on some info from Globalscale. No worries. I think I have a fix for the mtd issue.

First, I have a confession. I am not an openwrt user. I've got the ultra running in Debian 11 with the 6.0 Linux kernel mainline. Assuming openwrt has it set up similarly, I was able to apply the .dts for the spi flash in armada-3720-espressobin-ultra.dts to the (for me) much more functional armada-3720-ccpe.dts. Since there is no upload, I'll pastebin the result: https://h0c.us/v/DpQh/r

Compiling this to a .dtb with make dtbs and pointing to it in /boot allowed me to read the environment using fw_printenv, pointing to /dev/mtd2 as expected.

I hope this helps you all.

Upstream DTS will work as well:

It took some time to get it upstream, but SPI NOR will work.

Yep I tried that file and one thing I like about the ccpe .dts is that wifi comes up without needing a power cycle.

I wonder if this is a significant difference between the two:

@@ -335,8 +417,8 @@
                 pcie_reset_pins: pcie-reset-pins {
-                    groups = "pcie1";
-                    function = "pcie";
+                    groups = "pcie1"; /* this actually controls "pcie1_reset" */
+                    function = "gpio";
                 pcie_clkreq_pins: pcie-clkreq-pins {

In the ccpe dts, it is set to pcie, whereas in the ultra dts it is set to gpio.

The GPIO reset did not work for me. The wifi is still not coming up with the espressobin-ultra dtb file.

PCI device is not visible at all or?

Yeah the PCI devise is gone from lspci.

I'll be more detailed... Although I don't have a ton of detail. Here is what I did:

  • I rebooted the device, and pressed a key to get into U-boot.
  • I typed the above gpio commands manually.
  • I then typed 'boot' to continue the boot process
  • No pcie device showing up.

To get it working again, I went back to a patched armada-3720-ccpe.dtb (that includes the fix for the mtd). For some reason with this other .dtb, the pcie comes right up.

That is really, really weird as I am supporting a lot of these Ultra-s and with the bootscript PCI power toggle card works fine

Are you using the boot loader that came with the device or did you build your own boot loader with the new dtb?

Both the stock bootloader as well as mainline U-boot will do the same, DTB doesnt matter for the bootloader, all that adding gpio toggle does is resets the PCI card before booting, that has been working for me a long time

I am in contact with Kevin Liu at Globalscale so hopefully he has some insight.

@robimarko what board revision(s) do you have?


Also, we should share notes. Do you get these errors in your journalctl as well?

Oct 17 12:13:08 espressobin-ultra kernel: debugfs: Directory 'd0060900.xor' with parent 'dmaengine' already present!
Oct 17 12:13:08 espressobin-ultra kernel: Unsupported CPU frequency 1200 MHz
Oct 17 12:13:11 espressobin-ultra kernel: mv88e6085 d0032004.mdio-mii:03: p3: hw VLAN 1 already used by port 1 in br0
Oct 17 12:13:11 espressobin-ultra kernel: mv88e6085 d0032004.mdio-mii:03: p2: hw VLAN 1 already used by port 1 in br0
Oct 17 12:13:14 espressobin-ultra kernel: Bluetooth: hci0: unexpected event for opcode 0x0000

I dont have the revision set at all, only SN

What worked for me was to use the Globalscale .dts file which has some differences from the one in mainline kernel.

Note this commit:


Sorry if there is a better way to transmit this, but can you try the .dts below on your system? Works great for me, and no power cycle needed.


// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
 * Device Tree file for ESPRESSObin-Ultra board.
 * Copyright (C) 2019 Globalscale technologies, Inc.
 * Jason Hung <jhung@globalscaletechnologies.com>


#include "armada-3720-espressobin.dtsi"

/ {
	model = "Globalscale Marvell ESPRESSOBin Ultra Board";
	compatible = "globalscale,espressobin-ultra", "marvell,armada3720",

	aliases {
		/* ethernet1 is WAN port */
		ethernet1 = &switch0port5;
		ethernet2 = &switch0port1;
		ethernet3 = &switch0port2;
		ethernet4 = &switch0port3;
		ethernet5 = &switch0port4;

	/delete-node/ regulator;

	reg_usb3_vbus: usb3-vbus {
		compatible = "regulator-fixed";
		regulator-name = "usb3-vbus";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		gpio = <&gpionb 19 GPIO_ACTIVE_HIGH>;

	usb3_phy: usb3-phy {
		compatible = "usb-nop-xceiv";
		vcc-supply = <&reg_usb3_vbus>;

	gpio-leds {
		pinctrl-names = "default";
		compatible = "gpio-leds";
		/* No assigned functions to the LEDs by default */
		led1 {
			label = "ebin-ultra:blue:led1";
			gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
		led2 {
			label = "ebin-ultra:green:led2";
			gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
		led3 {
			label = "ebin-ultra:red:led3";
			gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
		led4 {
			label = "ebin-ultra:yellow:led4";
			gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;

&sdhci0 {
	status = "okay";

&sdhci1 {
	/delete-property/ vqmmc-supply;
	status = "disabled";

&spi0 {
	flash@0 {
		spi-max-frequency = <20000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "firmware";
				reg = <0x0 0x3e0000>;
			partition@3e0000 {
				label = "hw-info";
				reg = <0x3e0000 0x10000>;
			partition@3f0000 {
				label = "u-boot-env";
				reg = <0x3f0000 0x10000>;

&i2c0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	clock-frequency = <100000>;

	rtc@51 {
		compatible = "nxp,pcf8563";
		reg = <0x51>;

&usb3 {
	usb-phy = <&usb3_phy>;
	status = "okay";

&mdio {
	extphy: ethernet-phy@1 {
		reg = <1>;

		reset-gpios = <&gpionb 2 GPIO_ACTIVE_LOW>;

&switch0 {
	reg = <3>;

	reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>;

	ports {
		switch0port1: port@1 {
			reg = <1>;
			label = "lan0";
			phy-handle = <&switch0phy0>;

		switch0port2: port@2 {
			reg = <2>;
			label = "lan1";
			phy-handle = <&switch0phy1>;

		switch0port3: port@3 {
			reg = <3>;
			label = "lan2";
			phy-handle = <&switch0phy2>;

		switch0port4: port@4 {
			reg = <4>;
			label = "lan3";
			phy-handle = <&switch0phy3>;

		switch0port5: port@5 {
			reg = <5>;
			label = "wan";
			phy-handle = <&extphy>;
			phy-mode = "sgmii";

	mdio {
		switch0phy3: switch0phy3@14 {
			reg = <0x14>;

I honestly dont know when will I get around to it