First try to support CPE210 v2 - will not boot

I did have <linux/ar8216_platform.h> included in begging but from what I have seen in mach files of other devices that use QCA953X SoC it is sometimes included and sometimes not.

Good catch with MAC init, although I know that mac KSEG1ADDR is not correct.
I simplified the setup based on your mach file.
Much simpler and does the same job

Can you further explain the issue with LEDs?
Also, you are using @pepe2k s modified U-boot?

haven't noticed at first you have tl_ap143_setup which is then called from within cpe210_v2_setup function- this was the code about LEDs and button; now you removed ath79_switch_data.phy4_mii_en = 1; - i don't know if it is needed, cpe has 2 eth ports? my device only 1.

yes i use modified u-boot

No,v2 of CPE210 has only one port so that is not needed.
Modified U-boot would be great but even V1 of CPE does not yet have it.

for V2 you could probably simply base it on my patch with GPIO adjustments to your board:

possibly you could build standard header image without safeloader parts that would boot just fine from modified u-boot

I could try that.
Hopefully Flashrom and Pi combo will work for recovery if it gets bricked

ch341a does the job if you have it

Unfortunately not,but will order one since they are really cheap.
Only got Pi+Flashrom combo and some Pomona clips.
Looks like Flashrom support all of generic 25Q64 SPI Flash chips.

I read my flash chip that way. Did not try writing so far.

@MartinS You traced reset button to GPIO 17?

Thats right

I am trying to port custom u-boot like @psyborg uses so GPIO pins are crucial.
Also @MartinS do RSSI LED use the same pins like in v1 or are they different?
Also @psyborg any chance of helping figuring out how to correctly configure ap143.h GPIO-s?
This is current one:

I dont have v1 so i cant tell.

You dont have to have it.
You can see all GPIO pins here(CPE510 uses the same ones as CPE210):

Ok They are the same.

Function GPIO
LAN Led 11
L1 13
L2 14
L3 15
L4 16
Button 17
Serial TX 10
Serial RX 9

Great, only remaining GPIO-s I can think of are LNA enable GPIOs.
But since they did not touch these GPIOs I doubt those are changed.

@psyborg I am having issues setting things after bootargs.
Load adress should match one at bootm?
Here is what printenv outputs:

yes. about gpio21 & 22 try to find out what they do on CPE v1

@psyborg I will try to find out what do GPIO 21 and 22 do.
They are not mentioned in mach file or anywhere else except this PR which looks weird to me since it misses a lot of stuff.
I dont think they are even used
Hm,my bootm adress matches CFG_ENV_ADDR of other devices.
That looks weird to me.

there are GPIO 21 and 22? on my pinout there are only GPIO 0 to 17.

That is for v1 which uses AR9344.
Datasheet for AR9344:
I took that GPIO config from PR I linked above but it looks faulty.

Also, its shame that TP-Link just linked same GPL sources for v2 that they have linked for v1.
They are obviously completely missing ap-143 configuration.

I have asked for real GPL sources, that would really ease this porting.