Afraid my EAP615WALL is still bootlooping on the Snapshot sysupgrade image. This despite the resolution of https://github.com/openwrt/openwrt/issues/19403.
What's odd is that it does boot an FTP'ed initramfs-kernel image. As well as the Stable 24.10.2 image. I'm not sure whether the LZMA dictionary size was the root cause, at least of the issues I've encountered.
Early part of bootlogs
Snapshot Sysupgrade:
incorrect device type in firmware
SF: Detected xm25qh128a with page size 256 Bytes, erase size 64 KiB, total 16 MiB
Reading from flash 0xa0000 to mem 0x80010000, size 0x364060 ...
## Loading kernel from FIT Image at 80010000 ...
Using 'config-1' configuration
Trying 'kernel-1' kernel subimage
Description: MIPS OpenWrt Linux-6.12.40
Type: Kernel Image
Compression: lzma compressed
Data Start: 0x800100e4
Data Size: 3540580 Bytes = 3.4 MiB
Architecture: MIPS
OS: Linux
Load Address: 0x80001000
Entry Point: 0x80001000
Hash algo: crc32
Hash value: 6d92ad30
Hash algo: sha1
Hash value: d205c80c3940afabb6d9e697d9a7a02d80e98d6f
Verifying Hash Integrity ... crc32+ sha1+ OK
## Loading fdt from FIT Image at 80010000 ...
Using 'config-1' configuration
Trying 'fdt-1' fdt subimage
Description: MIPS OpenWrt tplink_eap615-wall-v1 device tree blob
Type: Flat Device Tree
Compression: uncompressed
Data Start: 0x8037088c
Data Size: 12936 Bytes = 12.6 KiB
Architecture: MIPS
Hash algo: crc32
Hash value: 42d1c875
Hash algo: sha1
Hash value: 72ee4516fa6b437ebf6ee729b6846329a972f91c
Verifying Hash Integrity ... crc32+ sha1+ OK
Booting using the fdt blob at 0x8037088c
Uncompressing Kernel Image ... lzma compressed: uncompress error 1
Must RESET board to recover
===================================================================
MT7621 stage1 code Dec 16 2019 17:45:55 (ASIC)
CPU=500000000 HZ BUS=166666666 HZ
==================================================================
PLL3 FB_DL: 0xa, 1/0 = 611/413 29000000
PLL2 FB_DL: 0xe, 1/0 = 568/456 39000000
PLL4 FB_DL: 0x14, 1/0 = 602/422 51000000
DDR patch working
do DDR setting..[01F40000]
Apply DDR3 Setting...(use default AC)
0 8 16 24 32 40 48 56 64 72 80 88 96 104 112 120
--------------------------------------------------------------------------------
0000:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0001:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0002:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0003:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0004:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0005:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0006:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0007:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0008:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0009:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
000D:| 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
000E:| 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1
000F:| 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0
0010:| 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0
0011:| 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0012:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0013:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0014:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0015:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0016:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0017:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0018:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
0019:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001A:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001B:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001C:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001D:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001E:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
001F:| 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
DRAMC_DQSCTL1[0e0]=13000000
DRAMC_DQSGCTL[124]=80000033
rank 0 coarse = 15
rank 0 fine = 56
B:| 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0
opt_dle value:9
DRAMC_DDR2CTL[07c]=C287221D
DRAMC_PADCTL4[0e4]=000022B3
DRAMC_DQIDLY1[210]=0D0D090E
DRAMC_DQIDLY2[214]=0A0F0B0D
DRAMC_DQIDLY3[218]=0A0B080A
DRAMC_DQIDLY4[21c]=0A090C08
DRAMC_R0DELDLY[018]=00002020
==================================================================
RX DQS perbit delay software calibration
==================================================================
1.0-15 bit dq delay value
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 12 8 11 11 11 10 15 9 8 7
10 | 11 10 7 10 9 9
--------------------------------------
==================================================================
2.dqs window
x=pass dqs delay value (min~max)center
y=0-7bit DQ of every group
input delay:DQS0 =32 DQS1 = 32
==================================================================
bit DQS0 bit DQS1
0 (1~60)30 8 (1~60)30
1 (1~62)31 9 (1~62)31
2 (1~60)30 10 (1~63)32
3 (1~60)30 11 (1~63)32
4 (1~60)30 12 (1~61)31
5 (1~61)31 13 (1~60)30
6 (1~64)32 14 (1~63)32
7 (1~61)31 15 (1~61)31
==================================================================
3.dq delay value last
==================================================================
bit| 0 1 2 3 4 5 6 7 8 9
--------------------------------------
0 | 14 9 13 13 13 11 15 10 10 8
10 | 11 10 8 12 9 10
==================================================================
==================================================================
TX perbyte calibration
==================================================================
DQS loop = 15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqsdly_pass[0]=15, finish count=1
dqs_perbyte_dly.last_dqsdly_pass[1]=15, finish count=2
DQ loop=15, cmp_err_1 = ffff0000
dqs_perbyte_dly.last_dqdly_pass[0]=15, finish count=1
dqs_perbyte_dly.last_dqdly_pass[1]=15, finish count=2
byte:0, (DQS,DQ)=(8,8)
byte:1, (DQS,DQ)=(8,8)
DRAMC_DQODLY1[200]=88888888
DRAMC_DQODLY2[204]=88888888
20,data:88
[EMI] DRAMC calibration passed
===================================================================
MT7621 stage1 code done
CPU=500000000 HZ BUS=166666666 HZ
===================================================================
U-Boot SPL 2018.09 (Feb 20 2021 - 09:43:17 +0800)
Trying to boot from NOR
U-Boot 2018.09 (Feb 20 2021 - 09:43:17 +0800)
CPU: MediaTek MT7621AT ver 1, eco 3
Clocks: CPU: 880MHz, DDR: 1200MHz, Bus: 220MHz, XTAL: 40MHz
Model: MediaTek MT7621 reference board
DRAM: 128 MiB
Loading Environment from SPI Flash... SF: Detected xm25qh128a with page size 256 Bytes, erase size 64 KiB, total 16 MiB
*** Warning - bad CRC, using default environment
In: uartlite0@1e000c00
Out: uartlite0@1e000c00
Err: uartlite0@1e000c00
Net:
Warning: eth@1e100000 (eth0) using random MAC address - ba:6e:8b:bd:30:cf
eth0: eth@1e100000
reset button is not pressed for 10s.
turn on led
Hit any key to stop autoboot: 0
=>
initramfs-kernel:
TFTP from server 192.168.1.2; our IP address is 192.168.1.1
Filename 'openwrt-ramips-mt7621-tplink_eap615-wall-v1-initramfs-kernel.bin'.
Load address: 0x84000000
Loading: #################################################################
#################################################################
#################################################################
#################################################################
#################################################################
#################################################################
#################################################################
###########################################################
6.2 MiB/s
done
Bytes transferred = 7535416 (72fb38 hex)
=> bootm
loading kernel from FIT Image at 84000000 ...
Using 'config-1' configuration
Trying 'kernel-1' kernel subimage
Description: MIPS OpenWrt Linux-6.12.40
Type: Kernel Image
Compression: lzma compressed
Data Start: 0x840000e4
Data Size: 7520569 Bytes = 7.2 MiB
Architecture: MIPS
OS: Linux
Load Address: 0x80001000
Entry Point: 0x80001000
Hash algo: crc32
Hash value: 350ed42c
Hash algo: sha1
Hash value: 96c030fadf7f1b5a90388255176484194e92ff7b
Verifying Hash Integrity ... crc32+ sha1+ OK
## Loading fdt from FIT Image at 84000000 ...
Using 'config-1' configuration
Trying 'fdt-1' fdt subimage
Description: MIPS OpenWrt tplink_eap615-wall-v1 device tree blob
Type: Flat Device Tree
Compression: uncompressed
Data Start: 0x8472c364
Data Size: 12936 Bytes = 12.6 KiB
Architecture: MIPS
Hash algo: crc32
Hash value: 42d1c875
Hash algo: sha1
Hash value: 72ee4516fa6b437ebf6ee729b6846329a972f91c
Verifying Hash Integrity ... crc32+ sha1+ OK
Booting using the fdt blob at 0x8472c364
Uncompressing Kernel Image ... OK
Loading Device Tree to 87e67000, end 87e6d287 ... OK
[ 0.000000] Linux version 6.12.40 (builder@buildhost) (mipsel-openwrt-linux-m usl-gcc (OpenWrt GCC 14.3.0 r30609-ed7d62caf2) 14.3.0, GNU ld (GNU Binutils) 2.4 2) #0 SMP Sun Jul 27 16:50:03 2025
[ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
...
OpenWRT Stable 24.10.2
incorrect device type in firmware
## Loading kernel from FIT Image at bfca0000 ...
Using 'config-1' configuration
Trying 'kernel-1' kernel subimage
Description: MIPS OpenWrt Linux-6.6.93
Type: Kernel Image
Compression: lzma compressed
Data Start: 0xbfca00e4
Data Size: 3177203 Bytes = 3 MiB
Architecture: MIPS
OS: Linux
Load Address: 0x80001000
Entry Point: 0x80001000
Hash algo: crc32
Hash value: f80bb357
Hash algo: sha1
Hash value: 20e7f829e7bf488d6b06c50c222e1f114cb693b5
Verifying Hash Integrity ... crc32+ sha1+ OK
## Loading fdt from FIT Image at bfca0000 ...
Using 'config-1' configuration
Trying 'fdt-1' fdt subimage
Description: MIPS OpenWrt tplink_eap615-wall-v1 device tree blob
Type: Flat Device Tree
Compression: uncompressed
Data Start: 0xbffa7d1c
Data Size: 12628 Bytes = 12.3 KiB
Architecture: MIPS
Hash algo: crc32
Hash value: 7a2f2684
Hash algo: sha1
Hash value: 18aad5e0c77bef4a59c81a3af1482a3b4f49c725
Verifying Hash Integrity ... crc32+ sha1+ OK
Booting using the fdt blob at 0xbffa7d1c
Uncompressing Kernel Image ... OK
Loading Device Tree to 87e66000, end 87e6c153 ... OK
[ 0.000000] Linux version 6.6.93 (builder@buildhost) (mipsel-openwrt-linux-musl-gcc (OpenWrt GCC 13.3.0 r28739-d9340319c6) 13.3.0, GNU ld (GNU Binutils) 2.42) #0 SMP Mon Jun 23 20:40:36 2025
[ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
...