Disable UART to have GPIOs

[leventelist]

I want to disable an UART1 on a WIZFI hardware to have GPIO 13 as gpio. I came up with this DTS, but I still have my UART shown up, and the GPIO is not accessible.

It is strange, since if I do dmesg | grep tty

I get this:

[ 0.000000] Kernel command line: console=ttyS0,115200 rootfstype=squashfs,jffs2
[ 0.363683] console [ttyS0] disabled
[ 0.367318] 10000c00.uartlite: ttyS0 at MMIO 0x10000c00 (irq = 20, base_baud = 2500000) is a Palmchip BK-3103
[ 0.377014] console [ttyS0] enabled

However, ls /dev/tty* shows this:

/dev/ttyS0 /dev/ttyS1

I use LEDE17.01.1

My dts files are as follows:

rt5350.dtsi:

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "ralink,rt5350-soc";

	cpus {
		cpu@0 {
			compatible = "mips,mips24KEc";
		};
	};

	chosen {
		bootargs = "console=ttyS0,57600";
	};

	cpuintc: cpuintc@0 {
		#address-cells = <0>;
		#interrupt-cells = <1>;
		interrupt-controller;
		compatible = "mti,cpu-interrupt-controller";
	};

	aliases {
		spi0 = &spi0;
		spi1 = &spi1;
		serial0 = &uartlite;
		i2c = &i2c;
	};

	palmbus: palmbus@10000000 {
		compatible = "palmbus";
		reg = <0x10000000 0x200000>;
		ranges = <0x0 0x10000000 0x1FFFFF>;

		#address-cells = <1>;
		#size-cells = <1>;

		sysc: sysc@0 {
			compatible = "ralink,rt5350-sysc", "ralink,rt3050-sysc";
			reg = <0x0 0x100>;
		};

		timer: timer@100 {
			compatible = "ralink,rt5350-timer", "ralink,rt2880-timer";
			reg = <0x100 0x20>;

			interrupt-parent = <&intc>;
			interrupts = <1>;
		};

		watchdog: watchdog@120 {
			compatible = "ralink,rt5350-wdt", "ralink,rt2880-wdt";
			reg = <0x120 0x10>;

			resets = <&rstctrl 8>;
			reset-names = "wdt";

			interrupt-parent = <&intc>;
			interrupts = <1>;
		};

		intc: intc@200 {
			compatible = "ralink,rt5350-intc", "ralink,rt2880-intc";
			reg = <0x200 0x100>;

			resets = <&rstctrl 19>;
			reset-names = "intc";

			interrupt-controller;
			#interrupt-cells = <1>;

			interrupt-parent = <&cpuintc>;
			interrupts = <2>;
		};

		memc: memc@300 {
			compatible = "ralink,rt5350-memc", "ralink,rt3050-memc";
			reg = <0x300 0x100>;

			resets = <&rstctrl 20>;
			reset-names = "mc";

			interrupt-parent = <&intc>;
			interrupts = <3>;
		};

		gpio0: gpio@600 {
			compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
			reg = <0x600 0x34>;

			resets = <&rstctrl 13>;
			reset-names = "pio";

			interrupt-parent = <&intc>;
			interrupts = <6>;

			gpio-controller;
			#gpio-cells = <2>;

			ralink,gpio-base = <0>;
			ralink,num-gpios = <22>;
			ralink,register-map = [ 00 04 08 0c
						20 24 28 2c
						30 34 ];
		};

		gpio1: gpio@660 {
			compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
			reg = <0x660 0x24>;

			interrupt-parent = <&intc>;
			interrupts = <6>;

			gpio-controller;
			#gpio-cells = <2>;

			ralink,gpio-base = <22>;
			ralink,num-gpios = <6>;
			ralink,register-map = [ 00 04 08 0c
						10 14 18 1c
						20 24 ];

			status = "disabled";
		};

		i2c: i2c@900 {
			compatible = "ralink,rt2880-i2c";
			reg = <0x900 0x100>;

			resets = <&rstctrl 16>;
			reset-names = "i2c";

			#address-cells = <1>;
			#size-cells = <0>;

			pinctrl-names = "default";
			pinctrl-0 = <&i2c_pins>;

			status = "disabled";
		};

		i2s: i2s@a00 {
			compatible = "ralink,rt3352-i2s";
			reg = <0xa00 0x100>;

			resets = <&rstctrl 17>;
			reset-names = "i2s";

			interrupt-parent = <&intc>;
			interrupts = <10>;

			txdma-req = <2>;
			rxdma-req = <3>;

			dmas = <&gdma 4>,
				<&gdma 6>;
			dma-names = "tx", "rx";

			status = "disabled";
		};

		spi0: spi@b00 {
			compatible = "ralink,rt5350-spi", "ralink,rt2880-spi";
			reg = <0xb00 0x40>;

			resets = <&rstctrl 18>;
			reset-names = "spi";

			#address-cells = <1>;
			#size-cells = <0>;

			pinctrl-names = "default";
			pinctrl-0 = <&spi_pins>;

			status = "disabled";
		};

		spi1: spi@b40 {
			compatible = "ralink,rt5350-spi", "ralink,rt2880-spi";
			reg = <0xb40 0x60>;

			resets = <&rstctrl 18>;
			reset-names = "spi";

			#address-cells = <1>;
			#size-cells = <0>;

			pinctrl-names = "default";
			pinctrl-0 = <&spi_cs1>;

			status = "disabled";
		};

		uartlite: uartlite@c00 {
			compatible = "ralink,rt5350-uart", "ralink,rt2880-uart", "ns16550a";
			reg = <0xc00 0x100>;

			resets = <&rstctrl 19>;
			reset-names = "uartl";

			interrupt-parent = <&intc>;
			interrupts = <12>;

			pinctrl-names = "default";
			pinctrl-0 = <&uartlite_pins>;

			reg-shift = <2>;
		};

		systick: systick@d00 {
			compatible = "ralink,rt5350-systick", "ralink,cevt-systick";
			reg = <0xd00 0x10>;

			interrupt-parent = <&cpuintc>;
			interrupts = <7>;
		};

		gdma: gdma@2800 {
			compatible = "ralink,rt3883-gdma";
			reg = <0x2800 0x800>;

			resets = <&rstctrl 14>;
			reset-names = "dma";

			interrupt-parent = <&intc>;
			interrupts = <7>;

			#dma-cells = <1>;
			#dma-channels = <16>;
			#dma-requests = <16>;

			status = "disabled";
		};
	};

	pinctrl: pinctrl {
		compatible = "ralink,rt2880-pinmux";

		pinctrl-names = "default";
		pinctrl-0 = <&state_default>;

		state_default: pinctrl0 {
		};

		i2c_pins: i2c {
			i2c {
				ralink,group = "i2c";
				ralink,function = "i2c";
			};
		};

		spi_pins: spi {
			spi {
				ralink,group = "spi";
				ralink,function = "spi";
			};
		};

		phy_led_pins: phy_led {
			phy_led {
				ralink,group = "led";
				ralink,function = "led";
			};
		};

		uartlite_pins: uartlite {
			uart {
				ralink,group = "uartlite";
				ralink,function = "uartlite";
			};
		};

		spi_cs1: spi1 {
			spi1 {
				ralink,group = "spi_cs1";
				ralink,function = "spi_cs1";
			};
		};
	};

	rstctrl: rstctrl {
		compatible = "ralink,rt5350-reset", "ralink,rt2880-reset";
		#reset-cells = <1>;
	};

	clkctrl: clkctrl {
		compatible = "ralink,rt2880-clock";
		#clock-cells = <1>;
	};

	usbphy: usbphy {
		compatible = "ralink,rt3352-usbphy";
		#phy-cells = <1>;

		resets = <&rstctrl 22 &rstctrl 25>;
		reset-names = "host", "device";
		clocks = <&clkctrl 18>;
		clock-names = "host";
	};

	ethernet: ethernet@10100000 {
		compatible = "ralink,rt5350-eth";
		reg = <0x10100000 0x10000>;

		resets = <&rstctrl 21 &rstctrl 23>;
		reset-names = "fe", "esw";

		interrupt-parent = <&cpuintc>;
		interrupts = <5>;

		mediatek,switch = <&esw>;
	};

	esw: esw@10110000 {
		compatible = "ralink,rt5350-esw", "ralink,rt3050-esw";
		reg = <0x10110000 0x8000>;

		resets = <&rstctrl 23>;
		reset-names = "esw";

		interrupt-parent = <&intc>;
		interrupts = <17>;
	};

	wmac: wmac@10180000 {
		compatible = "ralink,rt5350-wmac", "ralink,rt2880-wmac";
		reg = <0x10180000 0x40000>;

		interrupt-parent = <&cpuintc>;
		interrupts = <6>;

		ralink,eeprom = "soc_wmac.eeprom";
	};

	ehci: ehci@101c0000 {
		compatible = "generic-ehci";
		reg = <0x101c0000 0x1000>;

		phys = <&usbphy 1>;
		phy-names = "usb";

		interrupt-parent = <&intc>;
		interrupts = <18>;
	};

	ohci: ohci@101c1000 {
		compatible = "generic-ohci";
		reg = <0x101c1000 0x1000>;

		phys = <&usbphy 1>;
		phy-names = "usb";

		interrupt-parent = <&intc>;
		interrupts = <18>;
	};
};

WIZFI630A.dts:

/dts-v1/;

#include "rt5350.dtsi"

#include <dt-bindings/input/input.h>

/ {
	compatible = "wizfi630a", "ralink,rt5350-soc";
	model = "WIZnet WizFi630A";

	chosen {
		bootargs = "console=ttyS0,115200";
	};

	gpio-export {
		compatible = "gpio-export";
		#size-cells = <0>;
	};

	gpio-leds {
		compatible = "gpio-leds";

		run {
			label = "wizfi630a::run";
			gpios = <&gpio0 12 1>;
		};

		wifi {
			label = "wizfi630a::wifi";
			gpios = <&gpio0 17 1>;
		};
	};

};

&gpio1 {
	status = "okay";
};

&spi0 {
	status = "okay";

	m25p80@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "jedec,spi-nor";
		reg = <0>;
		linux,modalias = "m25p80", "w25q128";
		spi-max-frequency = <10000000>;

		partition@0 {
			#size-cells = <1>;
			label = "uboot";
			reg = <0x0 0x30000>;
			read-only;
		};

		partition@30000 {
			#size-cells = <1>;
			label = "uboot-env";
			reg = <0x30000 0x10000>;
			read-only;
		};

		factory: partition@40000 {
			#size-cells = <1>;
			label = "factory";
			reg = <0x40000 0x10000>;
			read-only;
		};

		partition@50000 {
			#size-cells = <1>;
			label = "firmware";
			reg = <0x50000 0xfb0000>;
		};
	};
};

/*Enable i2c*/
&i2c {

	status = "okay";
};

&uartlite {
	compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
	reg = <0xc00 0x100>;
	resets = <&rstctrl 19>;
	reset-names = "uartl";
	interrupt-parent = <&intc>;
	interrupts = <12>;
	reg-shift = <2>;
	pinctrl-names = "default";
	pinctrl-0 = <&uartlite_pins>;
};

&pinctrl {
	state_default: pinctrl0 {
		gpio {
			ralink,group = "jtag" ;
			ralink,function = "gpio";
		};
	};

	uartlite_pins: uartlite {
		uart {
			ralink,group = "uartlite";
			ralink,function = "uartlite";
		};
	};
};

&ethernet {
	mtd-mac-address = <&factory 0x4>;
};

&esw {
	mediatek,portmap = <0x17>;
};

&wmac {
	ralink,mtd-eeprom = <&factory 0>;
};

&ehci {
	status = "okay";
};

&ohci {
	status = "okay";
};

Any help are welcome.

[WorldDestroyer]

Did you solve this problem?

[slh]

Completely disabling the main UART for other purposes is not a reasonable endeavour, yes you can prevent the kernel/ userspace from using it, but the bootloader remains - and in most cases also a few ROM messages.

[WorldDestroyer]

I have 2 UARTs, but not enough gpio, which I can get by disabling UART

[Corne]

You have to 'reset' the pinmux by adding the following line in the dts file(s), the part for the state_default

pinctrl: pinctrl {
		compatible = "ralink,rt2880-pinmux";
		pinctrl-names = "default";
		pinctrl-0 = <&state_default>;

		state_default: pinctrl0 {

		default {
				ralink,group = "uart1","uart2";
				ralink,function = "gpio";
			};
		};

		spi_pins: spi {
			spi {
				ralink,group = "spi";
				ralink,function = "spi";
			};
		};

[joniuz]

Hello,

I have the same problem using a Linkit Smart 7688.

I was using OpenWrt CHAOS CALMER (15.05+linkit, r47501) and the GPIO 12 and GPIO 13, all worked perfect. But I needed to update the Python version from 2.7 to 3

I compiled OpenWrt 18.07 and now the GPIO 12 and GPIO 13 are unusable, these pins are used for UART_TXD0 and UART_RXT0.

There is a way to setupt these PIN as GPIOS again?

Thanks
Jose

[stragies]

Does this problem still exist on current git master? 18.xy is ancient.

[joniuz]

Hi Alex

With the version 21.02.0 I have other issue that you can see in this post

Linkit Smart 7688 GPIO pin map on OpenWrt 21.02.0

Hello I'm trying to upgrade a bunch of devices based on Linkit Smart 7688 with the original installed version Chaos Calmer 15.05.1 to a newest version with Python 3 support. My main problem has been the GPIO ports, I can't change them, because I need to keep the hardware backwards compatibility. [Linkit_Smart_7688] My first problem is in all the new versions I can't use the GPIO 12 and GPIO 13 because seems they are used by the UART 0. How can I disable the UART 0 or change it to a normal G…

I think both problems are related.